]>
Commit | Line | Data |
---|---|---|
c440bfe6 SR |
1 | # |
2 | # (C) Copyright 2007 | |
3 | # Stefan Roese, DENX Software Engineering, sr@denx.de. | |
4 | # | |
1a459660 | 5 | # SPDX-License-Identifier: GPL-2.0+ |
c440bfe6 SR |
6 | # |
7 | # | |
8 | # AMCC 405EZ Reference Platform (Acadia) board | |
9 | # | |
10 | ||
11 | # | |
14d0a02a | 12 | # CONFIG_SYS_TEXT_BASE for SPL: |
c440bfe6 SR |
13 | # |
14 | # On 4xx platforms the SPL is located at 0xfffff000...0xffffffff, | |
15 | # in the last 4kBytes of memory space in cache. | |
16 | # We will copy this SPL into internal SRAM in start.S. So we set | |
14d0a02a | 17 | # CONFIG_SYS_TEXT_BASE to starting address in internal SRAM here. |
c440bfe6 | 18 | # |
14d0a02a | 19 | CONFIG_SYS_TEXT_BASE = 0xf8004000 |
c440bfe6 SR |
20 | |
21 | # PAD_TO used to generate a 16kByte binary needed for the combined image | |
14d0a02a | 22 | # -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x4000 |
df8a24cd | 23 | PAD_TO = 0xf8008000 |
c440bfe6 SR |
24 | |
25 | ifeq ($(debug),1) | |
26 | PLATFORM_CPPFLAGS += -DDEBUG | |
27 | endif | |
28 | ||
29 | ifeq ($(dbcr),1) | |
6d0f6bcf | 30 | PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000 |
c440bfe6 | 31 | endif |