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9a1a0aed MH |
1 | /* |
2 | * Copyright 2009 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License as | |
6 | * published by the Free Software Foundation; either version 2 of | |
7 | * the License, or (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
18 | * MA 02111-1307 USA | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <common.h> | |
23 | #include <ns16550.h> | |
24 | #include <asm/io.h> | |
25 | #include <nand.h> | |
26 | ||
27 | u32 sysclk_tbl[] = { | |
28 | 33333000, 39999600, 49999500, 66666000, | |
29 | 83332500, 99999000, 133332000, 166665000 | |
30 | }; | |
31 | ||
32 | void board_init_f(ulong bootflag) | |
33 | { | |
34 | int px_spd; | |
35 | u32 plat_ratio, bus_clk, sys_clk; | |
36 | ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; | |
9a1a0aed MH |
37 | |
38 | #if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM) | |
39 | /* for FPGA */ | |
f51cdaf1 BB |
40 | set_lbc_br(3, CONFIG_SYS_BR3_PRELIM); |
41 | set_lbc_or(3, CONFIG_SYS_OR3_PRELIM); | |
9a1a0aed MH |
42 | #else |
43 | #error CONFIG_SYS_BR3_PRELIM, CONFIG_SYS_OR3_PRELIM must be defined | |
44 | #endif | |
45 | ||
46 | /* initialize selected port with appropriate baud rate */ | |
47 | px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); | |
48 | sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK]; | |
49 | plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; | |
50 | bus_clk = sys_clk * plat_ratio / 2; | |
51 | ||
52 | NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, | |
53 | bus_clk / 16 / CONFIG_BAUDRATE); | |
54 | ||
55 | puts("\nNAND boot... "); | |
56 | ||
57 | /* copy code to RAM and jump to it - this should not return */ | |
58 | /* NOTE - code has to be copied out of NAND buffer before | |
59 | * other blocks can be read. | |
60 | */ | |
61 | relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, | |
62 | CONFIG_SYS_NAND_U_BOOT_RELOC); | |
63 | } | |
64 | ||
65 | void board_init_r(gd_t *gd, ulong dest_addr) | |
66 | { | |
67 | nand_boot(); | |
68 | } | |
69 | ||
70 | void putc(char c) | |
71 | { | |
72 | if (c == '\n') | |
73 | NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); | |
74 | ||
75 | NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); | |
76 | } | |
77 | ||
78 | void puts(const char *str) | |
79 | { | |
80 | while (*str) | |
81 | putc(*str++); | |
82 | } |