[thirdparty/u-boot.git] / post / tests.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2002
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 */

#include <common.h>

#include <post.h>

extern int ocm_post_test (int flags);
extern int cache_post_test (int flags);
extern int watchdog_post_test (int flags);
extern int i2c_post_test (int flags);
extern int rtc_post_test (int flags);
extern int memory_post_test (int flags);
extern int cpu_post_test (int flags);
extern int fpu_post_test (int flags);
extern int uart_post_test (int flags);
extern int ether_post_test (int flags);
extern int spi_post_test (int flags);
extern int usb_post_test (int flags);
extern int spr_post_test (int flags);
extern int sysmon_post_test (int flags);
extern int dsp_post_test (int flags);
extern int codec_post_test (int flags);
extern int ecc_post_test (int flags);
extern int flash_post_test(int flags);

extern int dspic_init_post_test (int flags);
extern int dspic_post_test (int flags);
extern int gdc_post_test (int flags);
extern int fpga_post_test (int flags);
extern int lwmon5_watchdog_post_test(int flags);
extern int sysmon1_post_test(int flags);
extern int coprocessor_post_test(int flags);
extern int led_post_test(int flags);
extern int button_post_test(int flags);
extern int memory_regions_post_test(int flags);

extern int sysmon_init_f (void);

extern void sysmon_reloc (void);


struct post_test post_list[] =
{
#if CONFIG_POST & CONFIG_SYS_POST_OCM
    {
	"OCM test",
	"ocm",
	"This test checks on chip memory (OCM).",
	POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP,
	&ocm_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_OCM
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_CACHE
    {
	"Cache test",
	"cache",
	"This test verifies the CPU cache operation.",
	POST_RAM | POST_ALWAYS,
	&cache_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_CACHE
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
#if defined(CONFIG_POST_WATCHDOG)
	CONFIG_POST_WATCHDOG,
#else
    {
	"Watchdog timer test",
	"watchdog",
	"This test checks the watchdog timer.",
	POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT,
	&watchdog_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_WATCHDOG
    },
#endif
#endif
#if CONFIG_POST & CONFIG_SYS_POST_I2C
    {
	"I2C test",
	"i2c",
	"This test verifies the I2C operation.",
	POST_RAM | POST_ALWAYS,
	&i2c_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_I2C
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_RTC
    {
	"RTC test",
	"rtc",
	"This test verifies the RTC operation.",
	POST_RAM | POST_SLOWTEST | POST_MANUAL,
	&rtc_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_RTC
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
    {
	"Memory test",
	"memory",
	"This test checks RAM.",
	POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL,
	&memory_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_MEMORY
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_CPU
    {
	"CPU test",
	"cpu",
	"This test verifies the arithmetic logic unit of"
	" CPU.",
	POST_RAM | POST_ALWAYS,
	&cpu_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_CPU
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_FPU
    {
	"FPU test",
	"fpu",
	"This test verifies the arithmetic logic unit of"
	" FPU.",
	POST_RAM | POST_ALWAYS,
	&fpu_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_FPU
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_UART
#if defined(CONFIG_POST_UART)
	CONFIG_POST_UART,
#else
    {
	"UART test",
	"uart",
	"This test verifies the UART operation.",
	POST_RAM | POST_SLOWTEST | POST_MANUAL,
	&uart_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_UART
    },
#endif /* CONFIG_POST_UART */
#endif
#if CONFIG_POST & CONFIG_SYS_POST_ETHER
    {
	"ETHERNET test",
	"ethernet",
	"This test verifies the ETHERNET operation.",
	POST_RAM | POST_ALWAYS,
	&ether_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_ETHER
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_USB
    {
	"USB test",
	"usb",
	"This test verifies the USB operation.",
	POST_RAM | POST_ALWAYS,
	&usb_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_USB
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_SPR
    {
	"SPR test",
	"spr",
	"This test checks SPR contents.",
	POST_RAM | POST_ALWAYS,
	&spr_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_SPR
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
    {
	"SYSMON test",
	"sysmon",
	"This test monitors system hardware.",
	POST_RAM | POST_ALWAYS,
	&sysmon_post_test,
	&sysmon_init_f,
	&sysmon_reloc,
	CONFIG_SYS_POST_SYSMON
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_DSP
    {
	"DSP test",
	"dsp",
	"This test checks any connected DSP(s).",
	POST_RAM | POST_ALWAYS,
	&dsp_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_DSP
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_CODEC
    {
	"CODEC test",
	"codec",
	"This test checks any connected codec(s).",
	POST_RAM | POST_MANUAL,
	&codec_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_CODEC
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_ECC
    {
	"ECC test",
	"ecc",
	"This test checks the ECC facility of memory.",
	POST_ROM | POST_ALWAYS | POST_PREREL,
	&ecc_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_ECC
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
	CONFIG_POST_BSPEC1,
#endif
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
	CONFIG_POST_BSPEC2,
#endif
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
	CONFIG_POST_BSPEC3,
#endif
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
	CONFIG_POST_BSPEC4,
#endif
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
	CONFIG_POST_BSPEC5,
#endif
#if CONFIG_POST & CONFIG_SYS_POST_COPROC
    {
	"Coprocessors communication test",
	"coproc_com",
	"This test checks communication with coprocessors.",
	POST_RAM | POST_ALWAYS | POST_CRITICAL,
	&coprocessor_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_COPROC
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_FLASH
    {
	"Parallel NOR flash test",
	"flash",
	"This test verifies parallel flash operations.",
	POST_RAM | POST_SLOWTEST | POST_MANUAL,
	&flash_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_FLASH
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_MEM_REGIONS
    {
	"Memory regions test",
	"mem_regions",
	"This test checks regularly placed regions of the RAM.",
	POST_ROM | POST_SLOWTEST | POST_PREREL,
	&memory_regions_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_MEM_REGIONS
    },
#endif
};

unsigned int post_list_size = ARRAY_SIZE(post_list);
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
324f6cfd WD	2	/*
	3	* (C) Copyright 2002
	4	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
324f6cfd WD	5	*/
	6
	7	#include <common.h>
	8
324f6cfd WD	9	#include <post.h>
324f6cfd WD	10
6e8ec682	11	extern int ocm_post_test (int flags);
324f6cfd WD	12	extern int cache_post_test (int flags);
	13	extern int watchdog_post_test (int flags);
	14	extern int i2c_post_test (int flags);
	15	extern int rtc_post_test (int flags);
	16	extern int memory_post_test (int flags);
	17	extern int cpu_post_test (int flags);
a11e0696	18	extern int fpu_post_test (int flags);
324f6cfd WD	19	extern int uart_post_test (int flags);
	20	extern int ether_post_test (int flags);
	21	extern int spi_post_test (int flags);
	22	extern int usb_post_test (int flags);
	23	extern int spr_post_test (int flags);
4532cb69	24	extern int sysmon_post_test (int flags);
5a8c51cd	25	extern int dsp_post_test (int flags);
79fa88f3	26	extern int codec_post_test (int flags);
531e3e8b	27	extern int ecc_post_test (int flags);
f6f7395e	28	extern int flash_post_test(int flags);
4532cb69	29
65b20dce YT	30	extern int dspic_init_post_test (int flags);
	31	extern int dspic_post_test (int flags);
	32	extern int gdc_post_test (int flags);
	33	extern int fpga_post_test (int flags);
	34	extern int lwmon5_watchdog_post_test(int flags);
	35	extern int sysmon1_post_test(int flags);
29fd7ceb	36	extern int coprocessor_post_test(int flags);
2151374f MF	37	extern int led_post_test(int flags);
2151374f MF	38	extern int button_post_test(int flags);
8d3fcb5e	39	extern int memory_regions_post_test(int flags);
65b20dce	40
4532cb69 WD	41	extern int sysmon_init_f (void);
	42
	43	extern void sysmon_reloc (void);
	44
324f6cfd WD	45
	46	struct post_test post_list[] =
	47	{
6d0f6bcf	48	#if CONFIG_POST & CONFIG_SYS_POST_OCM
6e8ec682 YT	49	{
	50	"OCM test",
	51	"ocm",
	52	"This test checks on chip memory (OCM).",
7845d490	53	POST_ROM \| POST_ALWAYS \| POST_PREREL \| POST_CRITICAL \| POST_STOP,
6e8ec682 YT	54	&ocm_post_test,
	55	NULL,
	56	NULL,
6d0f6bcf	57	CONFIG_SYS_POST_OCM
6e8ec682 YT	58	},
6e8ec682 YT	59	#endif
6d0f6bcf	60	#if CONFIG_POST & CONFIG_SYS_POST_CACHE
324f6cfd	61	{
8bde7f77 WD	62	"Cache test",
	63	"cache",
	64	"This test verifies the CPU cache operation.",
	65	POST_RAM \| POST_ALWAYS,
	66	&cache_post_test,
	67	NULL,
	68	NULL,
6d0f6bcf	69	CONFIG_SYS_POST_CACHE
324f6cfd WD	70	},
324f6cfd WD	71	#endif
6d0f6bcf	72	#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
65b20dce YT	73	#if defined(CONFIG_POST_WATCHDOG)
	74	CONFIG_POST_WATCHDOG,
	75	#else
324f6cfd	76	{
8bde7f77 WD	77	"Watchdog timer test",
	78	"watchdog",
	79	"This test checks the watchdog timer.",
8564acf9	80	POST_RAM \| POST_POWERON \| POST_SLOWTEST \| POST_MANUAL \| POST_REBOOT,
8bde7f77 WD	81	&watchdog_post_test,
	82	NULL,
	83	NULL,
6d0f6bcf	84	CONFIG_SYS_POST_WATCHDOG
324f6cfd WD	85	},
324f6cfd WD	86	#endif
65b20dce	87	#endif
6d0f6bcf	88	#if CONFIG_POST & CONFIG_SYS_POST_I2C
324f6cfd	89	{
8bde7f77 WD	90	"I2C test",
	91	"i2c",
	92	"This test verifies the I2C operation.",
	93	POST_RAM \| POST_ALWAYS,
	94	&i2c_post_test,
	95	NULL,
	96	NULL,
6d0f6bcf	97	CONFIG_SYS_POST_I2C
324f6cfd WD	98	},
324f6cfd WD	99	#endif
6d0f6bcf	100	#if CONFIG_POST & CONFIG_SYS_POST_RTC
324f6cfd	101	{
8bde7f77 WD	102	"RTC test",
	103	"rtc",
	104	"This test verifies the RTC operation.",
8564acf9	105	POST_RAM \| POST_SLOWTEST \| POST_MANUAL,
8bde7f77 WD	106	&rtc_post_test,
	107	NULL,
	108	NULL,
6d0f6bcf	109	CONFIG_SYS_POST_RTC
324f6cfd WD	110	},
324f6cfd WD	111	#endif
6d0f6bcf	112	#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
324f6cfd	113	{
8bde7f77 WD	114	"Memory test",
	115	"memory",
	116	"This test checks RAM.",
8564acf9	117	POST_ROM \| POST_POWERON \| POST_SLOWTEST \| POST_PREREL,
8bde7f77 WD	118	&memory_post_test,
	119	NULL,
	120	NULL,
6d0f6bcf	121	CONFIG_SYS_POST_MEMORY
324f6cfd WD	122	},
324f6cfd WD	123	#endif
6d0f6bcf	124	#if CONFIG_POST & CONFIG_SYS_POST_CPU
324f6cfd	125	{
8bde7f77 WD	126	"CPU test",
	127	"cpu",
	128	"This test verifies the arithmetic logic unit of"
	129	" CPU.",
	130	POST_RAM \| POST_ALWAYS,
	131	&cpu_post_test,
	132	NULL,
	133	NULL,
6d0f6bcf	134	CONFIG_SYS_POST_CPU
324f6cfd WD	135	},
324f6cfd WD	136	#endif
6d0f6bcf	137	#if CONFIG_POST & CONFIG_SYS_POST_FPU
a11e0696 IL	138	{
	139	"FPU test",
	140	"fpu",
	141	"This test verifies the arithmetic logic unit of"
	142	" FPU.",
	143	POST_RAM \| POST_ALWAYS,
	144	&fpu_post_test,
	145	NULL,
	146	NULL,
6d0f6bcf	147	CONFIG_SYS_POST_FPU
a11e0696 IL	148	},
a11e0696 IL	149	#endif
6d0f6bcf	150	#if CONFIG_POST & CONFIG_SYS_POST_UART
834a45d7 SR	151	#if defined(CONFIG_POST_UART)
	152	CONFIG_POST_UART,
	153	#else
324f6cfd	154	{
8bde7f77 WD	155	"UART test",
	156	"uart",
	157	"This test verifies the UART operation.",
8564acf9	158	POST_RAM \| POST_SLOWTEST \| POST_MANUAL,
8bde7f77 WD	159	&uart_post_test,
	160	NULL,
	161	NULL,
6d0f6bcf	162	CONFIG_SYS_POST_UART
324f6cfd	163	},
834a45d7	164	#endif /* CONFIG_POST_UART */
324f6cfd	165	#endif
6d0f6bcf	166	#if CONFIG_POST & CONFIG_SYS_POST_ETHER
324f6cfd	167	{
8bde7f77 WD	168	"ETHERNET test",
	169	"ethernet",
	170	"This test verifies the ETHERNET operation.",
5735bca5	171	POST_RAM \| POST_ALWAYS,
8bde7f77 WD	172	&ether_post_test,
	173	NULL,
	174	NULL,
6d0f6bcf	175	CONFIG_SYS_POST_ETHER
324f6cfd WD	176	},
324f6cfd WD	177	#endif
6d0f6bcf	178	#if CONFIG_POST & CONFIG_SYS_POST_USB
324f6cfd	179	{
8bde7f77 WD	180	"USB test",
	181	"usb",
	182	"This test verifies the USB operation.",
5735bca5	183	POST_RAM \| POST_ALWAYS,
8bde7f77 WD	184	&usb_post_test,
	185	NULL,
	186	NULL,
6d0f6bcf	187	CONFIG_SYS_POST_USB
324f6cfd WD	188	},
324f6cfd WD	189	#endif
6d0f6bcf	190	#if CONFIG_POST & CONFIG_SYS_POST_SPR
324f6cfd	191	{
8bde7f77 WD	192	"SPR test",
	193	"spr",
	194	"This test checks SPR contents.",
b2e2142c	195	POST_RAM \| POST_ALWAYS,
8bde7f77 WD	196	&spr_post_test,
	197	NULL,
	198	NULL,
6d0f6bcf	199	CONFIG_SYS_POST_SPR
324f6cfd WD	200	},
324f6cfd WD	201	#endif
6d0f6bcf	202	#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
4532cb69	203	{
8bde7f77 WD	204	"SYSMON test",
	205	"sysmon",
	206	"This test monitors system hardware.",
	207	POST_RAM \| POST_ALWAYS,
	208	&sysmon_post_test,
	209	&sysmon_init_f,
	210	&sysmon_reloc,
6d0f6bcf	211	CONFIG_SYS_POST_SYSMON
4532cb69 WD	212	},
4532cb69 WD	213	#endif
6d0f6bcf	214	#if CONFIG_POST & CONFIG_SYS_POST_DSP
5a8c51cd WD	215	{
	216	"DSP test",
	217	"dsp",
	218	"This test checks any connected DSP(s).",
5735bca5	219	POST_RAM \| POST_ALWAYS,
5a8c51cd WD	220	&dsp_post_test,
	221	NULL,
	222	NULL,
6d0f6bcf	223	CONFIG_SYS_POST_DSP
5a8c51cd WD	224	},
5a8c51cd WD	225	#endif
6d0f6bcf	226	#if CONFIG_POST & CONFIG_SYS_POST_CODEC
79fa88f3 WD	227	{
	228	"CODEC test",
	229	"codec",
	230	"This test checks any connected codec(s).",
	231	POST_RAM \| POST_MANUAL,
	232	&codec_post_test,
	233	NULL,
	234	NULL,
6d0f6bcf	235	CONFIG_SYS_POST_CODEC
79fa88f3 WD	236	},
79fa88f3 WD	237	#endif
6d0f6bcf	238	#if CONFIG_POST & CONFIG_SYS_POST_ECC
531e3e8b PK	239	{
	240	"ECC test",
	241	"ecc",
8dafa874 LJ	242	"This test checks the ECC facility of memory.",
8dafa874 LJ	243	POST_ROM \| POST_ALWAYS \| POST_PREREL,
531e3e8b PK	244	&ecc_post_test,
	245	NULL,
	246	NULL,
6d0f6bcf	247	CONFIG_SYS_POST_ECC
531e3e8b PK	248	},
531e3e8b PK	249	#endif
6d0f6bcf	250	#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
65b20dce YT	251	CONFIG_POST_BSPEC1,
65b20dce YT	252	#endif
6d0f6bcf	253	#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
65b20dce YT	254	CONFIG_POST_BSPEC2,
65b20dce YT	255	#endif
6d0f6bcf	256	#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
65b20dce YT	257	CONFIG_POST_BSPEC3,
65b20dce YT	258	#endif
6d0f6bcf	259	#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
65b20dce YT	260	CONFIG_POST_BSPEC4,
65b20dce YT	261	#endif
6d0f6bcf	262	#if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
65b20dce YT	263	CONFIG_POST_BSPEC5,
65b20dce YT	264	#endif
29fd7ceb AG	265	#if CONFIG_POST & CONFIG_SYS_POST_COPROC
	266	{
	267	"Coprocessors communication test",
	268	"coproc_com",
	269	"This test checks communication with coprocessors.",
	270	POST_RAM \| POST_ALWAYS \| POST_CRITICAL,
	271	&coprocessor_post_test,
	272	NULL,
	273	NULL,
	274	CONFIG_SYS_POST_COPROC
f6f7395e MF	275	},
	276	#endif
	277	#if CONFIG_POST & CONFIG_SYS_POST_FLASH
	278	{
	279	"Parallel NOR flash test",
	280	"flash",
	281	"This test verifies parallel flash operations.",
	282	POST_RAM \| POST_SLOWTEST \| POST_MANUAL,
	283	&flash_post_test,
	284	NULL,
	285	NULL,
	286	CONFIG_SYS_POST_FLASH
	287	},
29fd7ceb	288	#endif
8d3fcb5e VL	289	#if CONFIG_POST & CONFIG_SYS_POST_MEM_REGIONS
	290	{
	291	"Memory regions test",
	292	"mem_regions",
	293	"This test checks regularly placed regions of the RAM.",
	294	POST_ROM \| POST_SLOWTEST \| POST_PREREL,
	295	&memory_regions_post_test,
	296	NULL,
	297	NULL,
	298	CONFIG_SYS_POST_MEM_REGIONS
	299	},
	300	#endif
324f6cfd WD	301	};
324f6cfd WD	302
d2397817	303	unsigned int post_list_size = ARRAY_SIZE(post_list);