projects / thirdparty / kernel / stable-queue.git / blame
| Commit | Line | Data |
|---|---|---|
| 9547e94c SL |
1 | From 2891fcf3b3b20211dabf0e9a95851d3c56618620 Mon Sep 17 00:00:00 2001 |
| 2 | From: Jungseung Lee <js07.lee@samsung.com> | |
| 3 | Date: Tue, 29 Dec 2015 05:47:00 +0100 | |
| 4 | Subject: ARM: 8494/1: mm: Enable PXN when running non-LPAE kernel on LPAE | |
| 5 | processor | |
| 6 | ||
| 7 | [ Upstream commit ad84f56bf6d620fe6ed4d57ce6ec9945684d7f35 ] | |
| 8 | ||
| 9 | The VMSA field of MMFR0 (bottom 4 bits) is incremented for each | |
| 10 | added feature. PXN is supported if the value is >= 4 and LPAE | |
| 11 | is supported if it is >= 5. | |
| 12 | ||
| 13 | In case a kernel with CONFIG_ARM_LPAE disabled is used on a | |
| 14 | processor that supports LPAE, we can still use PXN in short | |
| 15 | descriptors. So check for >= 4 not == 4. | |
| 16 | ||
| 17 | Signed-off-by: Jungseung Lee <js07.lee@samsung.com> | |
| 18 | Acked-by: Catalin Marinas <catalin.marinas@arm.com> | |
| 19 | Signed-off-by: Ben Hutchings <ben@decadent.org.uk> | |
| 20 | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> | |
| 21 | Signed-off-by: Sasha Levin <sashal@kernel.org> | |
| 22 | --- | |
| 23 | arch/arm/mm/mmu.c | 2 +- | |
| 24 | 1 file changed, 1 insertion(+), 1 deletion(-) | |
| 25 | ||
| 26 | diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c | |
| 27 | index e47cffd25c6c..aead23f15213 100644 | |
| 28 | --- a/arch/arm/mm/mmu.c | |
| 29 | +++ b/arch/arm/mm/mmu.c | |
| 30 | @@ -572,7 +572,7 @@ static void __init build_mem_type_table(void) | |
| 31 | * in the Short-descriptor translation table format descriptors. | |
| 32 | */ | |
| 33 | if (cpu_arch == CPU_ARCH_ARMv7 && | |
| 34 | - (read_cpuid_ext(CPUID_EXT_MMFR0) & 0xF) == 4) { | |
| 35 | + (read_cpuid_ext(CPUID_EXT_MMFR0) & 0xF) >= 4) { | |
| 36 | user_pmd_table |= PMD_PXNTABLE; | |
| 37 | } | |
| 38 | #endif | |
| 39 | -- | |
| 40 | 2.19.1 | |
| 41 |