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37ddba70 GKH |
1 | From 5d24f455c182d5116dd5db8e1dc501115ecc9c2c Mon Sep 17 00:00:00 2001 |
2 | From: Joe Burmeister <joe.burmeister@devtank.co.uk> | |
3 | Date: Mon, 13 May 2019 11:23:57 +0100 | |
4 | Subject: tty: max310x: Fix external crystal register setup | |
5 | ||
6 | From: Joe Burmeister <joe.burmeister@devtank.co.uk> | |
7 | ||
8 | commit 5d24f455c182d5116dd5db8e1dc501115ecc9c2c upstream. | |
9 | ||
10 | The datasheet states: | |
11 | ||
12 | Bit 4: ClockEnSet the ClockEn bit high to enable an external clocking | |
13 | (crystal or clock generator at XIN). Set the ClockEn bit to 0 to disable | |
14 | clocking | |
15 | Bit 1: CrystalEnSet the CrystalEn bit high to enable the crystal | |
16 | oscillator. When using an external clock source at XIN, CrystalEn must | |
17 | be set low. | |
18 | ||
19 | The bit 4, MAX310X_CLKSRC_EXTCLK_BIT, should be set and was not. | |
20 | ||
21 | This was required to make the MAX3107 with an external crystal on our | |
22 | board able to send or receive data. | |
23 | ||
24 | Signed-off-by: Joe Burmeister <joe.burmeister@devtank.co.uk> | |
25 | Cc: stable <stable@vger.kernel.org> | |
26 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
27 | ||
28 | --- | |
29 | drivers/tty/serial/max310x.c | 2 +- | |
30 | 1 file changed, 1 insertion(+), 1 deletion(-) | |
31 | ||
32 | --- a/drivers/tty/serial/max310x.c | |
33 | +++ b/drivers/tty/serial/max310x.c | |
34 | @@ -571,7 +571,7 @@ static int max310x_set_ref_clk(struct ma | |
35 | } | |
36 | ||
37 | /* Configure clock source */ | |
38 | - clksrc = xtal ? MAX310X_CLKSRC_CRYST_BIT : MAX310X_CLKSRC_EXTCLK_BIT; | |
39 | + clksrc = MAX310X_CLKSRC_EXTCLK_BIT | (xtal ? MAX310X_CLKSRC_CRYST_BIT : 0); | |
40 | ||
41 | /* Configure PLL */ | |
42 | if (pllcfg) { |