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Commit | Line | Data |
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6fa88700 GKH |
1 | From 8bd6a7e35d130a16394561aaf443fcdc07bf22ca Mon Sep 17 00:00:00 2001 |
2 | From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
3 | Date: Fri, 1 Jun 2018 10:59:21 -0400 | |
4 | Subject: [PATCH 05/76] x86/bugs: Switch the selection of mitigation from CPU | |
5 | vendor to CPU features | |
6 | ||
7 | commit 108fab4b5c8f12064ef86e02cb0459992affb30f upstream. | |
8 | ||
9 | Both AMD and Intel can have SPEC_CTRL_MSR for SSBD. | |
10 | ||
11 | However AMD also has two more other ways of doing it - which | |
12 | are !SPEC_CTRL MSR ways. | |
13 | ||
14 | Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
15 | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> | |
16 | Cc: Kees Cook <keescook@chromium.org> | |
17 | Cc: kvm@vger.kernel.org | |
18 | Cc: KarimAllah Ahmed <karahmed@amazon.de> | |
19 | Cc: andrew.cooper3@citrix.com | |
20 | Cc: "H. Peter Anvin" <hpa@zytor.com> | |
21 | Cc: Borislav Petkov <bp@suse.de> | |
22 | Cc: David Woodhouse <dwmw@amazon.co.uk> | |
23 | Link: https://lkml.kernel.org/r/20180601145921.9500-4-konrad.wilk@oracle.com | |
24 | Signed-off-by: Ben Hutchings <ben@decadent.org.uk> | |
25 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
26 | --- | |
27 | arch/x86/kernel/cpu/bugs.c | 11 +++-------- | |
28 | 1 file changed, 3 insertions(+), 8 deletions(-) | |
29 | ||
30 | diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c | |
31 | index b1146405ce8a..878832580f7f 100644 | |
32 | --- a/arch/x86/kernel/cpu/bugs.c | |
33 | +++ b/arch/x86/kernel/cpu/bugs.c | |
34 | @@ -534,17 +534,12 @@ static enum ssb_mitigation __init __ssb_select_mitigation(void) | |
35 | * Intel uses the SPEC CTRL MSR Bit(2) for this, while AMD may | |
36 | * use a completely different MSR and bit dependent on family. | |
37 | */ | |
38 | - switch (boot_cpu_data.x86_vendor) { | |
39 | - case X86_VENDOR_INTEL: | |
40 | - case X86_VENDOR_AMD: | |
41 | - if (!static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL)) { | |
42 | - x86_amd_ssb_disable(); | |
43 | - break; | |
44 | - } | |
45 | + if (!static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL)) | |
46 | + x86_amd_ssb_disable(); | |
47 | + else { | |
48 | x86_spec_ctrl_base |= SPEC_CTRL_SSBD; | |
49 | x86_spec_ctrl_mask |= SPEC_CTRL_SSBD; | |
50 | wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base); | |
51 | - break; | |
52 | } | |
53 | } | |
54 | ||
55 | -- | |
56 | 2.21.0 | |
57 |