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Commit | Line | Data |
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90128b7b SL |
1 | From 9490ea0442fdc95dcf1faec4d57561222c434535 Mon Sep 17 00:00:00 2001 |
2 | From: Sasha Levin <sashal@kernel.org> | |
3 | Date: Fri, 23 Feb 2024 17:11:21 +0800 | |
4 | Subject: arm64: dts: mediatek: mt8183: Add power-domains properity to mfgcfg | |
5 | ||
6 | From: Ikjoon Jang <ikjn@chromium.org> | |
7 | ||
8 | [ Upstream commit 1781f2c461804c0123f59afc7350e520a88edffb ] | |
9 | ||
10 | mfgcfg clock is under MFG_ASYNC power domain. | |
11 | ||
12 | Fixes: e526c9bc11f8 ("arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile") | |
13 | Fixes: 37fb78b9aeb7 ("arm64: dts: mediatek: Add mt8183 power domains controller") | |
14 | Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> | |
15 | Signed-off-by: Ikjoon Jang <ikjn@chromium.org> | |
16 | Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> | |
17 | Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> | |
18 | Link: https://lore.kernel.org/r/20240223091122.2430037-1-wenst@chromium.org | |
19 | Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | |
20 | Signed-off-by: Sasha Levin <sashal@kernel.org> | |
21 | --- | |
22 | arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 + | |
23 | 1 file changed, 1 insertion(+) | |
24 | ||
25 | diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi | |
26 | index 97f84aa9fc6e1..1c93f41bc0880 100644 | |
27 | --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi | |
28 | +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi | |
29 | @@ -577,6 +577,7 @@ | |
30 | compatible = "mediatek,mt8183-mfgcfg", "syscon"; | |
31 | reg = <0 0x13000000 0 0x1000>; | |
32 | #clock-cells = <1>; | |
33 | + power-domains = <&spm MT8183_POWER_DOMAIN_MFG_ASYNC>; | |
34 | }; | |
35 | ||
36 | mmsys: syscon@14000000 { | |
37 | -- | |
38 | 2.43.0 | |
39 |