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7563275a GKH |
1 | From 944001201ca0196bcdb088129e5866a9f379d08c Mon Sep 17 00:00:00 2001 |
2 | From: Dave Airlie <airlied@redhat.com> | |
3 | Date: Tue, 20 Jul 2010 13:15:31 +1000 | |
4 | Subject: drm/i915: enable low power render writes on GEN3 hardware. | |
5 | ||
6 | From: Dave Airlie <airlied@redhat.com> | |
7 | ||
8 | commit 944001201ca0196bcdb088129e5866a9f379d08c upstream. | |
9 | ||
10 | A lot of 945GMs have had stability issues for a long time, this manifested as X hangs, blitter engine hangs, and lots of crashes. | |
11 | ||
12 | one such report is at: | |
13 | https://bugs.freedesktop.org/show_bug.cgi?id=20560 | |
14 | ||
15 | along with numerous distro bugzillas. | |
16 | ||
17 | This only took a week of digging and hair ripping to figure out. | |
18 | ||
19 | Tracked down and tested on a 945GM Lenovo T60, | |
20 | previously running | |
21 | x11perf -copypixwin500 | |
22 | or | |
23 | x11perf -copywinpix500 | |
24 | repeatedly would cause the GPU to wedge within 4 or 5 tries, with random busy bits set. | |
25 | ||
26 | After this patch no hangs were observed. | |
27 | ||
28 | Signed-off-by: Dave Airlie <airlied@redhat.com> | |
29 | Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> | |
30 | ||
31 | --- | |
32 | drivers/gpu/drm/i915/i915_gem.c | 10 ++++++++++ | |
33 | 1 file changed, 10 insertions(+) | |
34 | ||
35 | --- a/drivers/gpu/drm/i915/i915_gem.c | |
36 | +++ b/drivers/gpu/drm/i915/i915_gem.c | |
37 | @@ -4697,6 +4697,16 @@ i915_gem_load(struct drm_device *dev) | |
38 | list_add(&dev_priv->mm.shrink_list, &shrink_list); | |
39 | spin_unlock(&shrink_list_lock); | |
40 | ||
41 | + /* On GEN3 we really need to make sure the ARB C3 LP bit is set */ | |
42 | + if (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { | |
43 | + u32 tmp = I915_READ(MI_ARB_STATE); | |
44 | + if (!(tmp & MI_ARB_C3_LP_WRITE_ENABLE)) { | |
45 | + /* arb state is a masked write, so set bit + bit in mask */ | |
46 | + tmp = MI_ARB_C3_LP_WRITE_ENABLE | (MI_ARB_C3_LP_WRITE_ENABLE << MI_ARB_MASK_SHIFT); | |
47 | + I915_WRITE(MI_ARB_STATE, tmp); | |
48 | + } | |
49 | + } | |
50 | + | |
51 | /* Old X drivers will take 0-2 for front, back, depth buffers */ | |
52 | dev_priv->fence_reg_start = 3; | |
53 |