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2ce07e76 GKH |
1 | From 7ccafc5f75c87853f3c49845d5a884f2376e03ce Mon Sep 17 00:00:00 2001 |
2 | From: Kees Cook <kees.cook@canonical.com> | |
3 | Date: Tue, 24 May 2011 16:29:26 -0700 | |
4 | Subject: x86, cpufeature: Update CPU feature RDRND to RDRAND | |
5 | ||
6 | From: Kees Cook <kees.cook@canonical.com> | |
7 | ||
8 | commit 7ccafc5f75c87853f3c49845d5a884f2376e03ce upstream. | |
9 | ||
10 | The Intel manual changed the name of the CPUID bit to match the | |
11 | instruction name. We should follow suit for sanity's sake. (See Intel SDM | |
12 | Volume 2, Table 3-20 "Feature Information Returned in the ECX Register".) | |
13 | ||
14 | [ hpa: we can only do this at this time because there are currently no CPUs | |
15 | with this feature on the market, hence this is pre-hardware enabling. | |
16 | However, Cc:'ing stable so that stable can present a consistent ABI. ] | |
17 | ||
18 | Signed-off-by: Kees Cook <kees.cook@canonical.com> | |
19 | Link: http://lkml.kernel.org/r/20110524232926.GA27728@outflux.net | |
20 | Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> | |
21 | Cc: Fenghua Yu <fenghua.yu@intel.com> | |
22 | Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> | |
23 | ||
24 | --- | |
25 | arch/x86/include/asm/cpufeature.h | 2 +- | |
26 | 1 file changed, 1 insertion(+), 1 deletion(-) | |
27 | ||
28 | --- a/arch/x86/include/asm/cpufeature.h | |
29 | +++ b/arch/x86/include/asm/cpufeature.h | |
30 | @@ -125,7 +125,7 @@ | |
31 | #define X86_FEATURE_OSXSAVE (4*32+27) /* "" XSAVE enabled in the OS */ | |
32 | #define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */ | |
33 | #define X86_FEATURE_F16C (4*32+29) /* 16-bit fp conversions */ | |
34 | -#define X86_FEATURE_RDRND (4*32+30) /* The RDRAND instruction */ | |
35 | +#define X86_FEATURE_RDRAND (4*32+30) /* The RDRAND instruction */ | |
36 | #define X86_FEATURE_HYPERVISOR (4*32+31) /* Running on a hypervisor */ | |
37 | ||
38 | /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ |