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[thirdparty/kernel/stable-queue.git] / releases / 3.1.1 / ath9k_hw-fix-regression-of-register-offset-for-ar9003-chips.patch
CommitLineData
1b8ee047
GKH
1From 52d6d4ef5e6d1517688e27c11c01ab303ec681dd Mon Sep 17 00:00:00 2001
2From: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
3Date: Thu, 20 Oct 2011 14:22:43 +0530
4Subject: ath9k_hw: Fix regression of register offset for AR9003 chips
5
6From: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
7
8commit 52d6d4ef5e6d1517688e27c11c01ab303ec681dd upstream.
9
10My recent commits (3782c69d, 324c74a) introduced regression
11for register offset selection that based on the macversion.
12Not using parentheses in proper manner for ternary operator
13leads to select wrong offset for the registers.
14
15This issue was observed with AR9462 chip that immediate disconnect
16after the association with the following message
17
18ieee80211 phy3: wlan0: Failed to send nullfunc to AP 00:23:69:12:ea:47
19after 500ms, disconnecting.
20
21Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
22Signed-off-by: John W. Linville <linville@tuxdriver.com>
23Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
24
25---
26 drivers/net/wireless/ath/ath9k/ar9003_phy.h | 12 ++++++------
27 1 file changed, 6 insertions(+), 6 deletions(-)
28
29--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
30+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
31@@ -572,12 +572,12 @@
32
33 #define AR_PHY_TXGAIN_TABLE (AR_SM_BASE + 0x300)
34
35-#define AR_PHY_TX_IQCAL_CONTROL_1 (AR_SM_BASE + AR_SREV_9485(ah) ? \
36- 0x3c8 : 0x448)
37-#define AR_PHY_TX_IQCAL_START (AR_SM_BASE + AR_SREV_9485(ah) ? \
38- 0x3c4 : 0x440)
39-#define AR_PHY_TX_IQCAL_STATUS_B0 (AR_SM_BASE + AR_SREV_9485(ah) ? \
40- 0x3f0 : 0x48c)
41+#define AR_PHY_TX_IQCAL_CONTROL_1 (AR_SM_BASE + (AR_SREV_9485(ah) ? \
42+ 0x3c8 : 0x448))
43+#define AR_PHY_TX_IQCAL_START (AR_SM_BASE + (AR_SREV_9485(ah) ? \
44+ 0x3c4 : 0x440))
45+#define AR_PHY_TX_IQCAL_STATUS_B0 (AR_SM_BASE + (AR_SREV_9485(ah) ? \
46+ 0x3f0 : 0x48c))
47 #define AR_PHY_TX_IQCAL_CORR_COEFF_B0(_i) (AR_SM_BASE + \
48 (AR_SREV_9485(ah) ? \
49 0x3d0 : 0x450) + ((_i) << 2))