[thirdparty/kernel/stable-queue.git] / releases / 3.16.3 / mips-asm-reg.h-make-32-and-64-bit-definitions-available-at-the-same-time.patch

From bcec7c8da6b092b1ff3327fd83c2193adb12f684 Mon Sep 17 00:00:00 2001
From: Alex Smith <alex@alex-smith.me.uk>
Date: Wed, 23 Jul 2014 14:40:08 +0100
Subject: MIPS: asm/reg.h: Make 32- and 64-bit definitions available at the same time

From: Alex Smith <alex@alex-smith.me.uk>

commit bcec7c8da6b092b1ff3327fd83c2193adb12f684 upstream.

Get rid of the WANT_COMPAT_REG_H test and instead define both the 32-
and 64-bit register offset definitions at the same time with
MIPS{32,64}_ prefixes, then define the existing EF_* names to the
correct definitions for the kernel's bitness.

This patch is a prerequisite of the following bug fix patch.

Signed-off-by: Alex Smith <alex@alex-smith.me.uk>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7451/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/include/asm/reg.h      |  256 +++++++++++++++++++++++++--------------
 arch/mips/kernel/binfmt_elfo32.c |   32 +---
 2 files changed, 180 insertions(+), 108 deletions(-)

--- a/arch/mips/include/asm/reg.h
+++ b/arch/mips/include/asm/reg.h
@@ -12,116 +12,194 @@
 #ifndef __ASM_MIPS_REG_H
 #define __ASM_MIPS_REG_H
 
-
-#if defined(CONFIG_32BIT) || defined(WANT_COMPAT_REG_H)
-
-#define EF_R0			6
-#define EF_R1			7
-#define EF_R2			8
-#define EF_R3			9
-#define EF_R4			10
-#define EF_R5			11
-#define EF_R6			12
-#define EF_R7			13
-#define EF_R8			14
-#define EF_R9			15
-#define EF_R10			16
-#define EF_R11			17
-#define EF_R12			18
-#define EF_R13			19
-#define EF_R14			20
-#define EF_R15			21
-#define EF_R16			22
-#define EF_R17			23
-#define EF_R18			24
-#define EF_R19			25
-#define EF_R20			26
-#define EF_R21			27
-#define EF_R22			28
-#define EF_R23			29
-#define EF_R24			30
-#define EF_R25			31
+#define MIPS32_EF_R0		6
+#define MIPS32_EF_R1		7
+#define MIPS32_EF_R2		8
+#define MIPS32_EF_R3		9
+#define MIPS32_EF_R4		10
+#define MIPS32_EF_R5		11
+#define MIPS32_EF_R6		12
+#define MIPS32_EF_R7		13
+#define MIPS32_EF_R8		14
+#define MIPS32_EF_R9		15
+#define MIPS32_EF_R10		16
+#define MIPS32_EF_R11		17
+#define MIPS32_EF_R12		18
+#define MIPS32_EF_R13		19
+#define MIPS32_EF_R14		20
+#define MIPS32_EF_R15		21
+#define MIPS32_EF_R16		22
+#define MIPS32_EF_R17		23
+#define MIPS32_EF_R18		24
+#define MIPS32_EF_R19		25
+#define MIPS32_EF_R20		26
+#define MIPS32_EF_R21		27
+#define MIPS32_EF_R22		28
+#define MIPS32_EF_R23		29
+#define MIPS32_EF_R24		30
+#define MIPS32_EF_R25		31
 
 /*
  * k0/k1 unsaved
  */
-#define EF_R26			32
-#define EF_R27			33
+#define MIPS32_EF_R26		32
+#define MIPS32_EF_R27		33
 
-#define EF_R28			34
-#define EF_R29			35
-#define EF_R30			36
-#define EF_R31			37
+#define MIPS32_EF_R28		34
+#define MIPS32_EF_R29		35
+#define MIPS32_EF_R30		36
+#define MIPS32_EF_R31		37
 
 /*
  * Saved special registers
  */
-#define EF_LO			38
-#define EF_HI			39
+#define MIPS32_EF_LO		38
+#define MIPS32_EF_HI		39
 
-#define EF_CP0_EPC		40
-#define EF_CP0_BADVADDR		41
-#define EF_CP0_STATUS		42
-#define EF_CP0_CAUSE		43
-#define EF_UNUSED0		44
-
-#define EF_SIZE			180
-
-#endif
-
-#if defined(CONFIG_64BIT) && !defined(WANT_COMPAT_REG_H)
-
-#define EF_R0			 0
-#define EF_R1			 1
-#define EF_R2			 2
-#define EF_R3			 3
-#define EF_R4			 4
-#define EF_R5			 5
-#define EF_R6			 6
-#define EF_R7			 7
-#define EF_R8			 8
-#define EF_R9			 9
-#define EF_R10			10
-#define EF_R11			11
-#define EF_R12			12
-#define EF_R13			13
-#define EF_R14			14
-#define EF_R15			15
-#define EF_R16			16
-#define EF_R17			17
-#define EF_R18			18
-#define EF_R19			19
-#define EF_R20			20
-#define EF_R21			21
-#define EF_R22			22
-#define EF_R23			23
-#define EF_R24			24
-#define EF_R25			25
+#define MIPS32_EF_CP0_EPC	40
+#define MIPS32_EF_CP0_BADVADDR	41
+#define MIPS32_EF_CP0_STATUS	42
+#define MIPS32_EF_CP0_CAUSE	43
+#define MIPS32_EF_UNUSED0	44
+
+#define MIPS32_EF_SIZE		180
+
+#define MIPS64_EF_R0		0
+#define MIPS64_EF_R1		1
+#define MIPS64_EF_R2		2
+#define MIPS64_EF_R3		3
+#define MIPS64_EF_R4		4
+#define MIPS64_EF_R5		5
+#define MIPS64_EF_R6		6
+#define MIPS64_EF_R7		7
+#define MIPS64_EF_R8		8
+#define MIPS64_EF_R9		9
+#define MIPS64_EF_R10		10
+#define MIPS64_EF_R11		11
+#define MIPS64_EF_R12		12
+#define MIPS64_EF_R13		13
+#define MIPS64_EF_R14		14
+#define MIPS64_EF_R15		15
+#define MIPS64_EF_R16		16
+#define MIPS64_EF_R17		17
+#define MIPS64_EF_R18		18
+#define MIPS64_EF_R19		19
+#define MIPS64_EF_R20		20
+#define MIPS64_EF_R21		21
+#define MIPS64_EF_R22		22
+#define MIPS64_EF_R23		23
+#define MIPS64_EF_R24		24
+#define MIPS64_EF_R25		25
 
 /*
  * k0/k1 unsaved
  */
-#define EF_R26			26
-#define EF_R27			27
+#define MIPS64_EF_R26		26
+#define MIPS64_EF_R27		27
 
 
-#define EF_R28			28
-#define EF_R29			29
-#define EF_R30			30
-#define EF_R31			31
+#define MIPS64_EF_R28		28
+#define MIPS64_EF_R29		29
+#define MIPS64_EF_R30		30
+#define MIPS64_EF_R31		31
 
 /*
  * Saved special registers
  */
-#define EF_LO			32
-#define EF_HI			33
-
-#define EF_CP0_EPC		34
-#define EF_CP0_BADVADDR		35
-#define EF_CP0_STATUS		36
-#define EF_CP0_CAUSE		37
+#define MIPS64_EF_LO		32
+#define MIPS64_EF_HI		33
 
-#define EF_SIZE			304	/* size in bytes */
+#define MIPS64_EF_CP0_EPC	34
+#define MIPS64_EF_CP0_BADVADDR	35
+#define MIPS64_EF_CP0_STATUS	36
+#define MIPS64_EF_CP0_CAUSE	37
+
+#define MIPS64_EF_SIZE		304	/* size in bytes */
+
+#if defined(CONFIG_32BIT)
+
+#define EF_R0			MIPS32_EF_R0
+#define EF_R1			MIPS32_EF_R1
+#define EF_R2			MIPS32_EF_R2
+#define EF_R3			MIPS32_EF_R3
+#define EF_R4			MIPS32_EF_R4
+#define EF_R5			MIPS32_EF_R5
+#define EF_R6			MIPS32_EF_R6
+#define EF_R7			MIPS32_EF_R7
+#define EF_R8			MIPS32_EF_R8
+#define EF_R9			MIPS32_EF_R9
+#define EF_R10			MIPS32_EF_R10
+#define EF_R11			MIPS32_EF_R11
+#define EF_R12			MIPS32_EF_R12
+#define EF_R13			MIPS32_EF_R13
+#define EF_R14			MIPS32_EF_R14
+#define EF_R15			MIPS32_EF_R15
+#define EF_R16			MIPS32_EF_R16
+#define EF_R17			MIPS32_EF_R17
+#define EF_R18			MIPS32_EF_R18
+#define EF_R19			MIPS32_EF_R19
+#define EF_R20			MIPS32_EF_R20
+#define EF_R21			MIPS32_EF_R21
+#define EF_R22			MIPS32_EF_R22
+#define EF_R23			MIPS32_EF_R23
+#define EF_R24			MIPS32_EF_R24
+#define EF_R25			MIPS32_EF_R25
+#define EF_R26			MIPS32_EF_R26
+#define EF_R27			MIPS32_EF_R27
+#define EF_R28			MIPS32_EF_R28
+#define EF_R29			MIPS32_EF_R29
+#define EF_R30			MIPS32_EF_R30
+#define EF_R31			MIPS32_EF_R31
+#define EF_LO			MIPS32_EF_LO
+#define EF_HI			MIPS32_EF_HI
+#define EF_CP0_EPC		MIPS32_EF_CP0_EPC
+#define EF_CP0_BADVADDR		MIPS32_EF_CP0_BADVADDR
+#define EF_CP0_STATUS		MIPS32_EF_CP0_STATUS
+#define EF_CP0_CAUSE		MIPS32_EF_CP0_CAUSE
+#define EF_UNUSED0		MIPS32_EF_UNUSED0
+#define EF_SIZE			MIPS32_EF_SIZE
+
+#elif defined(CONFIG_64BIT)
+
+#define EF_R0			MIPS64_EF_R0
+#define EF_R1			MIPS64_EF_R1
+#define EF_R2			MIPS64_EF_R2
+#define EF_R3			MIPS64_EF_R3
+#define EF_R4			MIPS64_EF_R4
+#define EF_R5			MIPS64_EF_R5
+#define EF_R6			MIPS64_EF_R6
+#define EF_R7			MIPS64_EF_R7
+#define EF_R8			MIPS64_EF_R8
+#define EF_R9			MIPS64_EF_R9
+#define EF_R10			MIPS64_EF_R10
+#define EF_R11			MIPS64_EF_R11
+#define EF_R12			MIPS64_EF_R12
+#define EF_R13			MIPS64_EF_R13
+#define EF_R14			MIPS64_EF_R14
+#define EF_R15			MIPS64_EF_R15
+#define EF_R16			MIPS64_EF_R16
+#define EF_R17			MIPS64_EF_R17
+#define EF_R18			MIPS64_EF_R18
+#define EF_R19			MIPS64_EF_R19
+#define EF_R20			MIPS64_EF_R20
+#define EF_R21			MIPS64_EF_R21
+#define EF_R22			MIPS64_EF_R22
+#define EF_R23			MIPS64_EF_R23
+#define EF_R24			MIPS64_EF_R24
+#define EF_R25			MIPS64_EF_R25
+#define EF_R26			MIPS64_EF_R26
+#define EF_R27			MIPS64_EF_R27
+#define EF_R28			MIPS64_EF_R28
+#define EF_R29			MIPS64_EF_R29
+#define EF_R30			MIPS64_EF_R30
+#define EF_R31			MIPS64_EF_R31
+#define EF_LO			MIPS64_EF_LO
+#define EF_HI			MIPS64_EF_HI
+#define EF_CP0_EPC		MIPS64_EF_CP0_EPC
+#define EF_CP0_BADVADDR		MIPS64_EF_CP0_BADVADDR
+#define EF_CP0_STATUS		MIPS64_EF_CP0_STATUS
+#define EF_CP0_CAUSE		MIPS64_EF_CP0_CAUSE
+#define EF_SIZE			MIPS64_EF_SIZE
 
 #endif /* CONFIG_64BIT */
 
--- a/arch/mips/kernel/binfmt_elfo32.c
+++ b/arch/mips/kernel/binfmt_elfo32.c
@@ -72,12 +72,6 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_N
 
 #include <asm/processor.h>
 
-/*
- * When this file is selected, we are definitely running a 64bit kernel.
- * So using the right regs define in asm/reg.h
- */
-#define WANT_COMPAT_REG_H
-
 /* These MUST be defined before elf.h gets included */
 extern void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs);
 #define ELF_CORE_COPY_REGS(_dest, _regs) elf32_core_copy_regs(_dest, _regs);
@@ -149,21 +143,21 @@ void elf32_core_copy_regs(elf_gregset_t
 {
 	int i;
 
-	for (i = 0; i < EF_R0; i++)
+	for (i = 0; i < MIPS32_EF_R0; i++)
 		grp[i] = 0;
-	grp[EF_R0] = 0;
+	grp[MIPS32_EF_R0] = 0;
 	for (i = 1; i <= 31; i++)
-		grp[EF_R0 + i] = (elf_greg_t) regs->regs[i];
-	grp[EF_R26] = 0;
-	grp[EF_R27] = 0;
-	grp[EF_LO] = (elf_greg_t) regs->lo;
-	grp[EF_HI] = (elf_greg_t) regs->hi;
-	grp[EF_CP0_EPC] = (elf_greg_t) regs->cp0_epc;
-	grp[EF_CP0_BADVADDR] = (elf_greg_t) regs->cp0_badvaddr;
-	grp[EF_CP0_STATUS] = (elf_greg_t) regs->cp0_status;
-	grp[EF_CP0_CAUSE] = (elf_greg_t) regs->cp0_cause;
-#ifdef EF_UNUSED0
-	grp[EF_UNUSED0] = 0;
+		grp[MIPS32_EF_R0 + i] = (elf_greg_t) regs->regs[i];
+	grp[MIPS32_EF_R26] = 0;
+	grp[MIPS32_EF_R27] = 0;
+	grp[MIPS32_EF_LO] = (elf_greg_t) regs->lo;
+	grp[MIPS32_EF_HI] = (elf_greg_t) regs->hi;
+	grp[MIPS32_EF_CP0_EPC] = (elf_greg_t) regs->cp0_epc;
+	grp[MIPS32_EF_CP0_BADVADDR] = (elf_greg_t) regs->cp0_badvaddr;
+	grp[MIPS32_EF_CP0_STATUS] = (elf_greg_t) regs->cp0_status;
+	grp[MIPS32_EF_CP0_CAUSE] = (elf_greg_t) regs->cp0_cause;
+#ifdef MIPS32_EF_UNUSED0
+	grp[MIPS32_EF_UNUSED0] = 0;
 #endif
 }
Commit	Line	Data
c8fb49aa GKH	1	From bcec7c8da6b092b1ff3327fd83c2193adb12f684 Mon Sep 17 00:00:00 2001
	2	From: Alex Smith <alex@alex-smith.me.uk>
	3	Date: Wed, 23 Jul 2014 14:40:08 +0100
	4	Subject: MIPS: asm/reg.h: Make 32- and 64-bit definitions available at the same time
	5
	6	From: Alex Smith <alex@alex-smith.me.uk>
	7
	8	commit bcec7c8da6b092b1ff3327fd83c2193adb12f684 upstream.
	9
	10	Get rid of the WANT_COMPAT_REG_H test and instead define both the 32-
	11	and 64-bit register offset definitions at the same time with
	12	MIPS{32,64}_ prefixes, then define the existing EF_* names to the
	13	correct definitions for the kernel's bitness.
	14
	15	This patch is a prerequisite of the following bug fix patch.
	16
	17	Signed-off-by: Alex Smith <alex@alex-smith.me.uk>
	18	Cc: linux-mips@linux-mips.org
	19	Patchwork: https://patchwork.linux-mips.org/patch/7451/
	20	Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
	21	Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
	22
	23	---
	24	arch/mips/include/asm/reg.h \| 256 +++++++++++++++++++++++++--------------
	25	arch/mips/kernel/binfmt_elfo32.c \| 32 +---
	26	2 files changed, 180 insertions(+), 108 deletions(-)
	27
	28	--- a/arch/mips/include/asm/reg.h
	29	+++ b/arch/mips/include/asm/reg.h
	30	@@ -12,116 +12,194 @@
	31	#ifndef __ASM_MIPS_REG_H
	32	#define __ASM_MIPS_REG_H
	33
	34	-
	35	-#if defined(CONFIG_32BIT) \|\| defined(WANT_COMPAT_REG_H)
	36	-
	37	-#define EF_R0 6
	38	-#define EF_R1 7
	39	-#define EF_R2 8
	40	-#define EF_R3 9
	41	-#define EF_R4 10
	42	-#define EF_R5 11
	43	-#define EF_R6 12
	44	-#define EF_R7 13
	45	-#define EF_R8 14
	46	-#define EF_R9 15
	47	-#define EF_R10 16
	48	-#define EF_R11 17
	49	-#define EF_R12 18
	50	-#define EF_R13 19
	51	-#define EF_R14 20
	52	-#define EF_R15 21
	53	-#define EF_R16 22
	54	-#define EF_R17 23
	55	-#define EF_R18 24
	56	-#define EF_R19 25
	57	-#define EF_R20 26
	58	-#define EF_R21 27
	59	-#define EF_R22 28
	60	-#define EF_R23 29
	61	-#define EF_R24 30
	62	-#define EF_R25 31
	63	+#define MIPS32_EF_R0 6
	64	+#define MIPS32_EF_R1 7
65	+#define MIPS32_EF_R2 8
66	+#define MIPS32_EF_R3 9
67	+#define MIPS32_EF_R4 10
68	+#define MIPS32_EF_R5 11
69	+#define MIPS32_EF_R6 12
70	+#define MIPS32_EF_R7 13
71	+#define MIPS32_EF_R8 14
72	+#define MIPS32_EF_R9 15
73	+#define MIPS32_EF_R10 16
74	+#define MIPS32_EF_R11 17
75	+#define MIPS32_EF_R12 18
76	+#define MIPS32_EF_R13 19
77	+#define MIPS32_EF_R14 20
78	+#define MIPS32_EF_R15 21
79	+#define MIPS32_EF_R16 22
80	+#define MIPS32_EF_R17 23
81	+#define MIPS32_EF_R18 24
82	+#define MIPS32_EF_R19 25
83	+#define MIPS32_EF_R20 26
84	+#define MIPS32_EF_R21 27
85	+#define MIPS32_EF_R22 28
86	+#define MIPS32_EF_R23 29
87	+#define MIPS32_EF_R24 30
88	+#define MIPS32_EF_R25 31
89
90	/*
91	* k0/k1 unsaved
92	*/
93	-#define EF_R26 32
94	-#define EF_R27 33
95	+#define MIPS32_EF_R26 32
96	+#define MIPS32_EF_R27 33
97
98	-#define EF_R28 34
99	-#define EF_R29 35
100	-#define EF_R30 36
101	-#define EF_R31 37
102	+#define MIPS32_EF_R28 34
103	+#define MIPS32_EF_R29 35
104	+#define MIPS32_EF_R30 36
105	+#define MIPS32_EF_R31 37
106
107	/*
108	* Saved special registers
109	*/
110	-#define EF_LO 38
111	-#define EF_HI 39
112	+#define MIPS32_EF_LO 38
113	+#define MIPS32_EF_HI 39
114
115	-#define EF_CP0_EPC 40
116	-#define EF_CP0_BADVADDR 41
117	-#define EF_CP0_STATUS 42
118	-#define EF_CP0_CAUSE 43
119	-#define EF_UNUSED0 44
120	-
121	-#define EF_SIZE 180
122	-
123	-#endif
124	-
125	-#if defined(CONFIG_64BIT) && !defined(WANT_COMPAT_REG_H)
126	-
127	-#define EF_R0 0
128	-#define EF_R1 1
129	-#define EF_R2 2
130	-#define EF_R3 3
131	-#define EF_R4 4
132	-#define EF_R5 5
133	-#define EF_R6 6
134	-#define EF_R7 7
135	-#define EF_R8 8
136	-#define EF_R9 9
137	-#define EF_R10 10
138	-#define EF_R11 11
139	-#define EF_R12 12
140	-#define EF_R13 13
141	-#define EF_R14 14
142	-#define EF_R15 15
143	-#define EF_R16 16
144	-#define EF_R17 17
145	-#define EF_R18 18
146	-#define EF_R19 19
147	-#define EF_R20 20
148	-#define EF_R21 21
149	-#define EF_R22 22
150	-#define EF_R23 23
151	-#define EF_R24 24
152	-#define EF_R25 25
153	+#define MIPS32_EF_CP0_EPC 40
154	+#define MIPS32_EF_CP0_BADVADDR 41
155	+#define MIPS32_EF_CP0_STATUS 42
156	+#define MIPS32_EF_CP0_CAUSE 43
157	+#define MIPS32_EF_UNUSED0 44
158	+
159	+#define MIPS32_EF_SIZE 180
160	+
161	+#define MIPS64_EF_R0 0
162	+#define MIPS64_EF_R1 1
163	+#define MIPS64_EF_R2 2
164	+#define MIPS64_EF_R3 3
165	+#define MIPS64_EF_R4 4
166	+#define MIPS64_EF_R5 5
167	+#define MIPS64_EF_R6 6
168	+#define MIPS64_EF_R7 7
169	+#define MIPS64_EF_R8 8
170	+#define MIPS64_EF_R9 9
171	+#define MIPS64_EF_R10 10
172	+#define MIPS64_EF_R11 11
173	+#define MIPS64_EF_R12 12
174	+#define MIPS64_EF_R13 13
175	+#define MIPS64_EF_R14 14
176	+#define MIPS64_EF_R15 15
177	+#define MIPS64_EF_R16 16
178	+#define MIPS64_EF_R17 17
179	+#define MIPS64_EF_R18 18
180	+#define MIPS64_EF_R19 19
181	+#define MIPS64_EF_R20 20
182	+#define MIPS64_EF_R21 21
183	+#define MIPS64_EF_R22 22
184	+#define MIPS64_EF_R23 23
185	+#define MIPS64_EF_R24 24
186	+#define MIPS64_EF_R25 25
187
188	/*
189	* k0/k1 unsaved
190	*/
191	-#define EF_R26 26
192	-#define EF_R27 27
193	+#define MIPS64_EF_R26 26
194	+#define MIPS64_EF_R27 27
195
196
197	-#define EF_R28 28
198	-#define EF_R29 29
199	-#define EF_R30 30
200	-#define EF_R31 31
201	+#define MIPS64_EF_R28 28
202	+#define MIPS64_EF_R29 29
203	+#define MIPS64_EF_R30 30
204	+#define MIPS64_EF_R31 31
205
206	/*
207	* Saved special registers
208	*/
209	-#define EF_LO 32
210	-#define EF_HI 33
211	-
212	-#define EF_CP0_EPC 34
213	-#define EF_CP0_BADVADDR 35
214	-#define EF_CP0_STATUS 36
215	-#define EF_CP0_CAUSE 37
216	+#define MIPS64_EF_LO 32
217	+#define MIPS64_EF_HI 33
218
219	-#define EF_SIZE 304 /* size in bytes */
220	+#define MIPS64_EF_CP0_EPC 34
221	+#define MIPS64_EF_CP0_BADVADDR 35
222	+#define MIPS64_EF_CP0_STATUS 36
223	+#define MIPS64_EF_CP0_CAUSE 37
224	+
225	+#define MIPS64_EF_SIZE 304 /* size in bytes */
226	+
227	+#if defined(CONFIG_32BIT)
228	+
229	+#define EF_R0 MIPS32_EF_R0
230	+#define EF_R1 MIPS32_EF_R1
231	+#define EF_R2 MIPS32_EF_R2
232	+#define EF_R3 MIPS32_EF_R3
233	+#define EF_R4 MIPS32_EF_R4
234	+#define EF_R5 MIPS32_EF_R5
235	+#define EF_R6 MIPS32_EF_R6
236	+#define EF_R7 MIPS32_EF_R7
237	+#define EF_R8 MIPS32_EF_R8
238	+#define EF_R9 MIPS32_EF_R9
239	+#define EF_R10 MIPS32_EF_R10
240	+#define EF_R11 MIPS32_EF_R11
241	+#define EF_R12 MIPS32_EF_R12
242	+#define EF_R13 MIPS32_EF_R13
243	+#define EF_R14 MIPS32_EF_R14
244	+#define EF_R15 MIPS32_EF_R15
245	+#define EF_R16 MIPS32_EF_R16
246	+#define EF_R17 MIPS32_EF_R17
247	+#define EF_R18 MIPS32_EF_R18
248	+#define EF_R19 MIPS32_EF_R19
249	+#define EF_R20 MIPS32_EF_R20
250	+#define EF_R21 MIPS32_EF_R21
251	+#define EF_R22 MIPS32_EF_R22
252	+#define EF_R23 MIPS32_EF_R23
253	+#define EF_R24 MIPS32_EF_R24
254	+#define EF_R25 MIPS32_EF_R25
255	+#define EF_R26 MIPS32_EF_R26
256	+#define EF_R27 MIPS32_EF_R27
257	+#define EF_R28 MIPS32_EF_R28
258	+#define EF_R29 MIPS32_EF_R29
259	+#define EF_R30 MIPS32_EF_R30
260	+#define EF_R31 MIPS32_EF_R31
261	+#define EF_LO MIPS32_EF_LO
262	+#define EF_HI MIPS32_EF_HI
263	+#define EF_CP0_EPC MIPS32_EF_CP0_EPC
264	+#define EF_CP0_BADVADDR MIPS32_EF_CP0_BADVADDR
265	+#define EF_CP0_STATUS MIPS32_EF_CP0_STATUS
266	+#define EF_CP0_CAUSE MIPS32_EF_CP0_CAUSE
267	+#define EF_UNUSED0 MIPS32_EF_UNUSED0
268	+#define EF_SIZE MIPS32_EF_SIZE
269	+
270	+#elif defined(CONFIG_64BIT)
271	+
272	+#define EF_R0 MIPS64_EF_R0
273	+#define EF_R1 MIPS64_EF_R1
274	+#define EF_R2 MIPS64_EF_R2
275	+#define EF_R3 MIPS64_EF_R3
276	+#define EF_R4 MIPS64_EF_R4
277	+#define EF_R5 MIPS64_EF_R5
278	+#define EF_R6 MIPS64_EF_R6
279	+#define EF_R7 MIPS64_EF_R7
280	+#define EF_R8 MIPS64_EF_R8
281	+#define EF_R9 MIPS64_EF_R9
282	+#define EF_R10 MIPS64_EF_R10
283	+#define EF_R11 MIPS64_EF_R11
284	+#define EF_R12 MIPS64_EF_R12
285	+#define EF_R13 MIPS64_EF_R13
286	+#define EF_R14 MIPS64_EF_R14
287	+#define EF_R15 MIPS64_EF_R15
288	+#define EF_R16 MIPS64_EF_R16
289	+#define EF_R17 MIPS64_EF_R17
290	+#define EF_R18 MIPS64_EF_R18
291	+#define EF_R19 MIPS64_EF_R19
292	+#define EF_R20 MIPS64_EF_R20
293	+#define EF_R21 MIPS64_EF_R21
294	+#define EF_R22 MIPS64_EF_R22
295	+#define EF_R23 MIPS64_EF_R23
296	+#define EF_R24 MIPS64_EF_R24
297	+#define EF_R25 MIPS64_EF_R25
298	+#define EF_R26 MIPS64_EF_R26
299	+#define EF_R27 MIPS64_EF_R27
300	+#define EF_R28 MIPS64_EF_R28
301	+#define EF_R29 MIPS64_EF_R29
302	+#define EF_R30 MIPS64_EF_R30
303	+#define EF_R31 MIPS64_EF_R31
304	+#define EF_LO MIPS64_EF_LO
305	+#define EF_HI MIPS64_EF_HI
306	+#define EF_CP0_EPC MIPS64_EF_CP0_EPC
307	+#define EF_CP0_BADVADDR MIPS64_EF_CP0_BADVADDR
308	+#define EF_CP0_STATUS MIPS64_EF_CP0_STATUS
309	+#define EF_CP0_CAUSE MIPS64_EF_CP0_CAUSE
310	+#define EF_SIZE MIPS64_EF_SIZE
311
312	#endif /* CONFIG_64BIT */
313
314	--- a/arch/mips/kernel/binfmt_elfo32.c
315	+++ b/arch/mips/kernel/binfmt_elfo32.c
316	@@ -72,12 +72,6 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_N
317
318	#include <asm/processor.h>
319
320	-/*
321	- * When this file is selected, we are definitely running a 64bit kernel.
322	- * So using the right regs define in asm/reg.h
323	- */
324	-#define WANT_COMPAT_REG_H
325	-
326	/* These MUST be defined before elf.h gets included */
327	extern void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs);
328	#define ELF_CORE_COPY_REGS(_dest, _regs) elf32_core_copy_regs(_dest, _regs);
329	@@ -149,21 +143,21 @@ void elf32_core_copy_regs(elf_gregset_t
330	{
331	int i;
332
333	- for (i = 0; i < EF_R0; i++)
334	+ for (i = 0; i < MIPS32_EF_R0; i++)
335	grp[i] = 0;
336	- grp[EF_R0] = 0;
337	+ grp[MIPS32_EF_R0] = 0;
338	for (i = 1; i <= 31; i++)
339	- grp[EF_R0 + i] = (elf_greg_t) regs->regs[i];
340	- grp[EF_R26] = 0;
341	- grp[EF_R27] = 0;
342	- grp[EF_LO] = (elf_greg_t) regs->lo;
343	- grp[EF_HI] = (elf_greg_t) regs->hi;
344	- grp[EF_CP0_EPC] = (elf_greg_t) regs->cp0_epc;
345	- grp[EF_CP0_BADVADDR] = (elf_greg_t) regs->cp0_badvaddr;
346	- grp[EF_CP0_STATUS] = (elf_greg_t) regs->cp0_status;
347	- grp[EF_CP0_CAUSE] = (elf_greg_t) regs->cp0_cause;
348	-#ifdef EF_UNUSED0
349	- grp[EF_UNUSED0] = 0;
350	+ grp[MIPS32_EF_R0 + i] = (elf_greg_t) regs->regs[i];
351	+ grp[MIPS32_EF_R26] = 0;
352	+ grp[MIPS32_EF_R27] = 0;
353	+ grp[MIPS32_EF_LO] = (elf_greg_t) regs->lo;
354	+ grp[MIPS32_EF_HI] = (elf_greg_t) regs->hi;
355	+ grp[MIPS32_EF_CP0_EPC] = (elf_greg_t) regs->cp0_epc;
356	+ grp[MIPS32_EF_CP0_BADVADDR] = (elf_greg_t) regs->cp0_badvaddr;
357	+ grp[MIPS32_EF_CP0_STATUS] = (elf_greg_t) regs->cp0_status;
358	+ grp[MIPS32_EF_CP0_CAUSE] = (elf_greg_t) regs->cp0_cause;
359	+#ifdef MIPS32_EF_UNUSED0
360	+ grp[MIPS32_EF_UNUSED0] = 0;
361	#endif
362	}
363