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38b7da6f GKH |
1 | From b0aa44a3dfae3d8f45bd1264349aa87f87b7774f Mon Sep 17 00:00:00 2001 |
2 | From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> | |
3 | Date: Wed, 13 Aug 2014 12:31:57 +0530 | |
4 | Subject: powerpc/thp: Add write barrier after updating the valid bit | |
5 | ||
6 | From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> | |
7 | ||
8 | commit b0aa44a3dfae3d8f45bd1264349aa87f87b7774f upstream. | |
9 | ||
10 | With hugepages, we store the hpte valid information in the pte page | |
11 | whose address is stored in the second half of the PMD. Use a | |
12 | write barrier to make sure clearing pmd busy bit and updating | |
13 | hpte valid info are ordered properly. | |
14 | ||
15 | Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> | |
16 | Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> | |
17 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
18 | ||
19 | --- | |
20 | arch/powerpc/mm/hugepage-hash64.c | 5 ++++- | |
21 | 1 file changed, 4 insertions(+), 1 deletion(-) | |
22 | ||
23 | --- a/arch/powerpc/mm/hugepage-hash64.c | |
24 | +++ b/arch/powerpc/mm/hugepage-hash64.c | |
25 | @@ -172,8 +172,11 @@ repeat: | |
26 | mark_hpte_slot_valid(hpte_slot_array, index, slot); | |
27 | } | |
28 | /* | |
29 | - * No need to use ldarx/stdcx here | |
30 | + * The hpte valid is stored in the pgtable whose address is in the | |
31 | + * second half of the PMD. Order this against clearing of the busy bit in | |
32 | + * huge pmd. | |
33 | */ | |
34 | + smp_wmb(); | |
35 | *pmdp = __pmd(new_pmd & ~_PAGE_BUSY); | |
36 | return 0; | |
37 | } |