projects / thirdparty / kernel / stable-queue.git / blame
| Commit | Line | Data |
|---|---|---|
| 388682d7 GKH |
1 | From 5d302ed3cc80564fb835bed5fdba1e1250ecc9e5 Mon Sep 17 00:00:00 2001 |
| 2 | From: Alexander Sverdlin <alexander.sverdlin@gmail.com> | |
| 3 | Date: Sat, 28 Apr 2018 22:51:39 +0200 | |
| 4 | Subject: ASoC: cirrus: i2s: Fix {TX|RX}LinCtrlData setup | |
| 5 | MIME-Version: 1.0 | |
| 6 | Content-Type: text/plain; charset=UTF-8 | |
| 7 | Content-Transfer-Encoding: 8bit | |
| 8 | ||
| 9 | From: Alexander Sverdlin <alexander.sverdlin@gmail.com> | |
| 10 | ||
| 11 | commit 5d302ed3cc80564fb835bed5fdba1e1250ecc9e5 upstream. | |
| 12 | ||
| 13 | According to "EP93xx User’s Guide", I2STXLinCtrlData and I2SRXLinCtrlData | |
| 14 | registers actually have different format. The only currently used bit | |
| 15 | (Left_Right_Justify) has different position. Fix this and simplify the | |
| 16 | whole setup taking into account the fact that both registers have zero | |
| 17 | default value. | |
| 18 | ||
| 19 | The practical effect of the above is repaired SND_SOC_DAIFMT_RIGHT_J | |
| 20 | support (currently unused). | |
| 21 | ||
| 22 | Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> | |
| 23 | Signed-off-by: Mark Brown <broonie@kernel.org> | |
| 24 | Cc: stable@vger.kernel.org | |
| 25 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
| 26 | ||
| 27 | --- | |
| 28 | sound/soc/cirrus/ep93xx-i2s.c | 18 ++++++++++-------- | |
| 29 | 1 file changed, 10 insertions(+), 8 deletions(-) | |
| 30 | ||
| 31 | --- a/sound/soc/cirrus/ep93xx-i2s.c | |
| 32 | +++ b/sound/soc/cirrus/ep93xx-i2s.c | |
| 33 | @@ -51,7 +51,9 @@ | |
| 34 | #define EP93XX_I2S_WRDLEN_24 (1 << 0) | |
| 35 | #define EP93XX_I2S_WRDLEN_32 (2 << 0) | |
| 36 | ||
| 37 | -#define EP93XX_I2S_LINCTRLDATA_R_JUST (1 << 2) /* Right justify */ | |
| 38 | +#define EP93XX_I2S_RXLINCTRLDATA_R_JUST BIT(1) /* Right justify */ | |
| 39 | + | |
| 40 | +#define EP93XX_I2S_TXLINCTRLDATA_R_JUST BIT(2) /* Right justify */ | |
| 41 | ||
| 42 | #define EP93XX_I2S_CLKCFG_LRS (1 << 0) /* lrclk polarity */ | |
| 43 | #define EP93XX_I2S_CLKCFG_CKP (1 << 1) /* Bit clock polarity */ | |
| 44 | @@ -170,25 +172,25 @@ static int ep93xx_i2s_set_dai_fmt(struct | |
| 45 | unsigned int fmt) | |
| 46 | { | |
| 47 | struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(cpu_dai); | |
| 48 | - unsigned int clk_cfg, lin_ctrl; | |
| 49 | + unsigned int clk_cfg; | |
| 50 | + unsigned int txlin_ctrl = 0; | |
| 51 | + unsigned int rxlin_ctrl = 0; | |
| 52 | ||
| 53 | clk_cfg = ep93xx_i2s_read_reg(info, EP93XX_I2S_RXCLKCFG); | |
| 54 | - lin_ctrl = ep93xx_i2s_read_reg(info, EP93XX_I2S_RXLINCTRLDATA); | |
| 55 | ||
| 56 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
| 57 | case SND_SOC_DAIFMT_I2S: | |
| 58 | clk_cfg |= EP93XX_I2S_CLKCFG_REL; | |
| 59 | - lin_ctrl &= ~EP93XX_I2S_LINCTRLDATA_R_JUST; | |
| 60 | break; | |
| 61 | ||
| 62 | case SND_SOC_DAIFMT_LEFT_J: | |
| 63 | clk_cfg &= ~EP93XX_I2S_CLKCFG_REL; | |
| 64 | - lin_ctrl &= ~EP93XX_I2S_LINCTRLDATA_R_JUST; | |
| 65 | break; | |
| 66 | ||
| 67 | case SND_SOC_DAIFMT_RIGHT_J: | |
| 68 | clk_cfg &= ~EP93XX_I2S_CLKCFG_REL; | |
| 69 | - lin_ctrl |= EP93XX_I2S_LINCTRLDATA_R_JUST; | |
| 70 | + rxlin_ctrl |= EP93XX_I2S_RXLINCTRLDATA_R_JUST; | |
| 71 | + txlin_ctrl |= EP93XX_I2S_TXLINCTRLDATA_R_JUST; | |
| 72 | break; | |
| 73 | ||
| 74 | default: | |
| 75 | @@ -237,8 +239,8 @@ static int ep93xx_i2s_set_dai_fmt(struct | |
| 76 | /* Write new register values */ | |
| 77 | ep93xx_i2s_write_reg(info, EP93XX_I2S_RXCLKCFG, clk_cfg); | |
| 78 | ep93xx_i2s_write_reg(info, EP93XX_I2S_TXCLKCFG, clk_cfg); | |
| 79 | - ep93xx_i2s_write_reg(info, EP93XX_I2S_RXLINCTRLDATA, lin_ctrl); | |
| 80 | - ep93xx_i2s_write_reg(info, EP93XX_I2S_TXLINCTRLDATA, lin_ctrl); | |
| 81 | + ep93xx_i2s_write_reg(info, EP93XX_I2S_RXLINCTRLDATA, rxlin_ctrl); | |
| 82 | + ep93xx_i2s_write_reg(info, EP93XX_I2S_TXLINCTRLDATA, txlin_ctrl); | |
| 83 | return 0; | |
| 84 | } | |
| 85 |