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Commit | Line | Data |
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2705b78f GKH |
1 | From de0a0decf2edfc5b0c782915f4120cf990a9bd13 Mon Sep 17 00:00:00 2001 |
2 | From: BOUGH CHEN <haibo.chen@nxp.com> | |
3 | Date: Thu, 27 Dec 2018 11:20:24 +0000 | |
4 | Subject: mmc: sdhci-esdhc-imx: fix HS400 timing issue | |
5 | ||
6 | From: BOUGH CHEN <haibo.chen@nxp.com> | |
7 | ||
8 | commit de0a0decf2edfc5b0c782915f4120cf990a9bd13 upstream. | |
9 | ||
10 | Now tuning reset will be done when the timing is MMC_TIMING_LEGACY/ | |
11 | MMC_TIMING_MMC_HS/MMC_TIMING_SD_HS. But for timing MMC_TIMING_MMC_HS, | |
12 | we can not do tuning reset, otherwise HS400 timing is not right. | |
13 | ||
14 | Here is the process of init HS400, first finish tuning in HS200 mode, | |
15 | then switch to HS mode and 8 bit DDR mode, finally switch to HS400 | |
16 | mode. If we do tuning reset in HS mode, this will cause HS400 mode | |
17 | lost the tuning setting, which will cause CRC error. | |
18 | ||
19 | Signed-off-by: Haibo Chen <haibo.chen@nxp.com> | |
20 | Cc: stable@vger.kernel.org # v4.12+ | |
21 | Acked-by: Adrian Hunter <adrian.hunter@intel.com> | |
22 | Fixes: d9370424c948 ("mmc: sdhci-esdhc-imx: reset tuning circuit when power on mmc card") | |
23 | Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> | |
24 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
25 | ||
26 | --- | |
27 | drivers/mmc/host/sdhci-esdhc-imx.c | 1 + | |
28 | 1 file changed, 1 insertion(+) | |
29 | ||
30 | --- a/drivers/mmc/host/sdhci-esdhc-imx.c | |
31 | +++ b/drivers/mmc/host/sdhci-esdhc-imx.c | |
32 | @@ -961,6 +961,7 @@ static void esdhc_set_uhs_signaling(stru | |
33 | case MMC_TIMING_UHS_SDR25: | |
34 | case MMC_TIMING_UHS_SDR50: | |
35 | case MMC_TIMING_UHS_SDR104: | |
36 | + case MMC_TIMING_MMC_HS: | |
37 | case MMC_TIMING_MMC_HS200: | |
38 | writel(m, host->ioaddr + ESDHC_MIX_CTRL); | |
39 | break; |