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Commit | Line | Data |
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df1b7722 GKH |
1 | From foo@baz Mon Apr 9 13:58:16 CEST 2018 |
2 | From: Martin Blumenstingl <martin.blumenstingl@googlemail.com> | |
3 | Date: Sat, 23 Dec 2017 22:38:32 +0100 | |
4 | Subject: clk: meson: mpll: use 64-bit maths in params_from_rate | |
5 | ||
6 | From: Martin Blumenstingl <martin.blumenstingl@googlemail.com> | |
7 | ||
8 | ||
9 | [ Upstream commit 86aacdca66774051cbc0958110a48074b57a060b ] | |
10 | ||
11 | "rem * SDM_DEN" can easily overflow on the 32-bit Meson8 and Meson8b | |
12 | SoCs if the "remainder" (after the division operation) is greater than | |
13 | 262143Hz. This is likely to happen since the input clock for the MPLLs | |
14 | on Meson8 and Meson8b is "fixed_pll", which is running at a rate of | |
15 | 2550MHz. | |
16 | ||
17 | One example where this was observed to be problematic was the Ethernet | |
18 | clock calculation (which takes MPLL2 as input). When requesting a rate | |
19 | of 125MHz there is a remainder of 2500000Hz. | |
20 | The resulting MPLL2 rate before this patch was 127488329Hz. | |
21 | The resulting MPLL2 rate after this patch is 124999103Hz. | |
22 | ||
23 | Commit b609338b26f5 ("clk: meson: mpll: use 64bit math in | |
24 | rate_from_params") already fixed a similar issue in rate_from_params. | |
25 | ||
26 | Fixes: 007e6e5c5f01d3 ("clk: meson: mpll: add rw operation") | |
27 | Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> | |
28 | Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> | |
29 | Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> | |
30 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
31 | --- | |
32 | drivers/clk/meson/clk-mpll.c | 2 +- | |
33 | 1 file changed, 1 insertion(+), 1 deletion(-) | |
34 | ||
35 | --- a/drivers/clk/meson/clk-mpll.c | |
36 | +++ b/drivers/clk/meson/clk-mpll.c | |
37 | @@ -98,7 +98,7 @@ static void params_from_rate(unsigned lo | |
38 | *sdm = SDM_DEN - 1; | |
39 | } else { | |
40 | *n2 = div; | |
41 | - *sdm = DIV_ROUND_UP(rem * SDM_DEN, requested_rate); | |
42 | + *sdm = DIV_ROUND_UP_ULL((u64)rem * SDM_DEN, requested_rate); | |
43 | } | |
44 | } | |
45 |