]>
Commit | Line | Data |
---|---|---|
0f714131 GKH |
1 | From fdcb613d49321b5bf5d5a1bd0fba8e7c241dcc70 Mon Sep 17 00:00:00 2001 |
2 | From: Hans de Goede <hdegoede@redhat.com> | |
3 | Date: Thu, 26 Apr 2018 14:10:24 +0200 | |
4 | Subject: ACPI / LPSS: Add missing prv_offset setting for byt/cht PWM devices | |
5 | ||
6 | From: Hans de Goede <hdegoede@redhat.com> | |
7 | ||
8 | commit fdcb613d49321b5bf5d5a1bd0fba8e7c241dcc70 upstream. | |
9 | ||
10 | The LPSS PWM device on on Bay Trail and Cherry Trail devices has a set | |
11 | of private registers at offset 0x800, the current lpss_device_desc for | |
12 | them already sets the LPSS_SAVE_CTX flag to have these saved/restored | |
13 | over device-suspend, but the current lpss_device_desc was not setting | |
14 | the prv_offset field, leading to the regular device registers getting | |
15 | saved/restored instead. | |
16 | ||
17 | This is causing the PWM controller to no longer work, resulting in a black | |
18 | screen, after a suspend/resume on systems where the firmware clears the | |
19 | APB clock and reset bits at offset 0x804. | |
20 | ||
21 | This commit fixes this by properly setting prv_offset to 0x800 for | |
22 | the PWM devices. | |
23 | ||
24 | Cc: stable@vger.kernel.org | |
25 | Fixes: e1c748179754 ("ACPI / LPSS: Add Intel BayTrail ACPI mode PWM") | |
26 | Fixes: 1bfbd8eb8a7f ("ACPI / LPSS: Add ACPI IDs for Intel Braswell") | |
27 | Signed-off-by: Hans de Goede <hdegoede@redhat.com> | |
28 | Acked-by: Rafael J . Wysocki <rjw@rjwysocki.net> | |
29 | Signed-off-by: Thierry Reding <thierry.reding@gmail.com> | |
30 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
31 | ||
32 | --- | |
33 | drivers/acpi/acpi_lpss.c | 2 ++ | |
34 | 1 file changed, 2 insertions(+) | |
35 | ||
36 | --- a/drivers/acpi/acpi_lpss.c | |
37 | +++ b/drivers/acpi/acpi_lpss.c | |
38 | @@ -229,11 +229,13 @@ static const struct lpss_device_desc lpt | |
39 | ||
40 | static const struct lpss_device_desc byt_pwm_dev_desc = { | |
41 | .flags = LPSS_SAVE_CTX, | |
42 | + .prv_offset = 0x800, | |
43 | .setup = byt_pwm_setup, | |
44 | }; | |
45 | ||
46 | static const struct lpss_device_desc bsw_pwm_dev_desc = { | |
47 | .flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY, | |
48 | + .prv_offset = 0x800, | |
49 | .setup = bsw_pwm_setup, | |
50 | }; | |
51 |