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Fixes for 5.10
[thirdparty/kernel/stable-queue.git] / releases / 4.14.60 / pci-pciehp-assume-nocompl-for-thunderbolt-ports.patch
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GKH
1From 493fb50e958c1c6deef7feff0b8c3855def78d75 Mon Sep 17 00:00:00 2001
2From: Lukas Wunner <lukas@wunner.de>
3Date: Wed, 17 Jan 2018 16:48:39 +0100
4Subject: PCI: pciehp: Assume NoCompl+ for Thunderbolt ports
5
6From: Lukas Wunner <lukas@wunner.de>
7
8commit 493fb50e958c1c6deef7feff0b8c3855def78d75 upstream.
9
10Certain Thunderbolt 1 controllers claim to support Command Completed events
11(value of 0b in the No Command Completed Support field of the Slot
12Capabilities register) but in reality they neither set the Command
13Completed bit in the Slot Status register nor signal a Command Completed
14interrupt:
15
16 8086:1513 CV82524 [Light Ridge 4C 2010]
17 8086:151a DSL2310 [Eagle Ridge 2C 2011]
18 8086:151b CVL2510 [Light Peak 2C 2010]
19 8086:1547 DSL3510 [Cactus Ridge 4C 2012]
20 8086:1548 DSL3310 [Cactus Ridge 2C 2012]
21 8086:1549 DSL2210 [Port Ridge 1C 2011]
22
23All known newer chips (Redwood Ridge and onwards) set No Command Completed
24Support, indicating that they do not support Command Completed events.
25
26The user-visible impact is that after unplugging such a device, 2 seconds
27elapse until pciehp is unbound. That's because on ->remove,
28pcie_write_cmd() is called via pcie_disable_notification() and every call
29to pcie_write_cmd() takes 2 seconds (1 second for each invocation of
30pcie_wait_cmd()):
31
32 [ 337.942727] pciehp 0000:0a:00.0:pcie204: Timeout on hotplug command 0x1038 (issued 21176 msec ago)
33 [ 340.014735] pciehp 0000:0a:00.0:pcie204: Timeout on hotplug command 0x0000 (issued 2072 msec ago)
34
35That by itself has always been unpleasant, but the situation has become
36worse with commit cc27b735ad3a ("PCI/portdrv: Turn off PCIe services during
37shutdown"): Now pciehp is unbound on ->shutdown. Because Thunderbolt
38controllers typically have 4 hotplug ports, every reboot and shutdown is
39now delayed by 8 seconds, plus another 2 seconds for every attached
40Thunderbolt 1 device.
41
42Thunderbolt hotplug slots are not physical slots that one inserts cards
43into, but rather logical hotplug slots implemented in silicon. Devices
44appear beyond those logical slots once a PCI tunnel is established on top
45of the Thunderbolt Converged I/O switch. One would expect commands written
46to the Slot Control register to be executed immediately by the silicon, so
47for simplicity we always assume NoCompl+ for Thunderbolt ports.
48
49Fixes: cc27b735ad3a ("PCI/portdrv: Turn off PCIe services during shutdown")
50Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
51Signed-off-by: Lukas Wunner <lukas@wunner.de>
52Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
53Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
54Cc: stable@vger.kernel.org # v4.12+
55Cc: Sinan Kaya <okaya@codeaurora.org>
56Cc: Yehezkel Bernat <yehezkel.bernat@intel.com>
57Cc: Michael Jamet <michael.jamet@intel.com>
58Cc: Andreas Noever <andreas.noever@gmail.com>
59Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
60Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
61---
62 drivers/pci/hotplug/pciehp_hpc.c | 7 +++++++
63 1 file changed, 7 insertions(+)
64
65--- a/drivers/pci/hotplug/pciehp_hpc.c
66+++ b/drivers/pci/hotplug/pciehp_hpc.c
67@@ -863,6 +863,13 @@ struct controller *pcie_init(struct pcie
68 if (pdev->hotplug_user_indicators)
69 slot_cap &= ~(PCI_EXP_SLTCAP_AIP | PCI_EXP_SLTCAP_PIP);
70
71+ /*
72+ * We assume no Thunderbolt controllers support Command Complete events,
73+ * but some controllers falsely claim they do.
74+ */
75+ if (pdev->is_thunderbolt)
76+ slot_cap |= PCI_EXP_SLTCAP_NCCS;
77+
78 ctrl->slot_cap = slot_cap;
79 mutex_init(&ctrl->ctrl_lock);
80 init_waitqueue_head(&ctrl->queue);