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bbecac5b GKH |
1 | From fc110ebdd014dd1368c98e7685b47789c31fab42 Mon Sep 17 00:00:00 2001 |
2 | From: Koen Vandeputte <koen.vandeputte@ncentric.com> | |
3 | Date: Wed, 7 Mar 2018 10:46:39 -0600 | |
4 | Subject: PCI: dwc: Fix enumeration end when reaching root subordinate | |
5 | ||
6 | From: Koen Vandeputte <koen.vandeputte@ncentric.com> | |
7 | ||
8 | commit fc110ebdd014dd1368c98e7685b47789c31fab42 upstream. | |
9 | ||
10 | The subordinate value indicates the highest bus number which can be | |
11 | reached downstream though a certain device. | |
12 | ||
13 | Commit a20c7f36bd3d ("PCI: Do not allocate more buses than available in | |
14 | parent") ensures that downstream devices cannot assign busnumbers higher | |
15 | than the upstream device subordinate number, which was indeed illogical. | |
16 | ||
17 | By default, dw_pcie_setup_rc() inits the Root Complex subordinate to a | |
18 | value of 0x01. | |
19 | ||
20 | Due to this combined with above commit, enumeration stops digging deeper | |
21 | downstream as soon as bus num 0x01 has been assigned, which is always the | |
22 | case for a bridge device. | |
23 | ||
24 | This results in all devices behind a bridge bus remaining undetected, as | |
25 | these would be connected to bus 0x02 or higher. | |
26 | ||
27 | Fix this by initializing the RC to a subordinate value of 0xff, which is | |
28 | not altering hardware behaviour in any way, but informs probing function | |
29 | pci_scan_bridge() later on which reads this value back from register. | |
30 | ||
31 | The following nasty errors during boot are also fixed by this: | |
32 | ||
33 | pci_bus 0000:02: busn_res: can not insert [bus 02-ff] under [bus 01] (conflicts with (null) [bus 01]) | |
34 | ... | |
35 | pci_bus 0000:03: [bus 03] partially hidden behind bridge 0000:01 [bus 01] | |
36 | ... | |
37 | pci_bus 0000:04: [bus 04] partially hidden behind bridge 0000:01 [bus 01] | |
38 | ... | |
39 | pci_bus 0000:05: [bus 05] partially hidden behind bridge 0000:01 [bus 01] | |
40 | pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 05 | |
41 | pci_bus 0000:02: busn_res: can not insert [bus 02-05] under [bus 01] (conflicts with (null) [bus 01]) | |
42 | pci_bus 0000:02: [bus 02-05] partially hidden behind bridge 0000:01 [bus 01] | |
43 | ||
44 | Fixes: a20c7f36bd3d ("PCI: Do not allocate more buses than available in | |
45 | parent") | |
46 | Tested-by: Niklas Cassel <niklas.cassel@axis.com> | |
47 | Tested-by: Fabio Estevam <fabio.estevam@nxp.com> | |
48 | Tested-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> | |
49 | Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com> | |
50 | Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | |
51 | Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> | |
52 | Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> | |
53 | Acked-by: Lucas Stach <l.stach@pengutronix.de> | |
54 | Cc: stable@vger.kernel.org # v4.15+ | |
55 | Cc: Binghui Wang <wangbinghui@hisilicon.com> | |
56 | Cc: Jesper Nilsson <jesper.nilsson@axis.com> | |
57 | Cc: Jianguo Sun <sunjianguo1@huawei.com> | |
58 | Cc: Jingoo Han <jingoohan1@gmail.com> | |
59 | Cc: Kishon Vijay Abraham I <kishon@ti.com> | |
60 | Cc: Lucas Stach <l.stach@pengutronix.de> | |
61 | Cc: Mika Westerberg <mika.westerberg@linux.intel.com> | |
62 | Cc: Minghuan Lian <minghuan.Lian@freescale.com> | |
63 | Cc: Mingkai Hu <mingkai.hu@freescale.com> | |
64 | Cc: Murali Karicheri <m-karicheri2@ti.com> | |
65 | Cc: Pratyush Anand <pratyush.anand@gmail.com> | |
66 | Cc: Richard Zhu <hongxing.zhu@nxp.com> | |
67 | Cc: Roy Zang <tie-fei.zang@freescale.com> | |
68 | Cc: Shawn Guo <shawn.guo@linaro.org> | |
69 | Cc: Stanimir Varbanov <svarbanov@mm-sol.com> | |
70 | Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
71 | Cc: Xiaowei Song <songxiaowei@hisilicon.com> | |
72 | Cc: Zhou Wang <wangzhou1@hisilicon.com> | |
73 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
74 | ||
75 | --- | |
76 | drivers/pci/dwc/pcie-designware-host.c | 2 +- | |
77 | 1 file changed, 1 insertion(+), 1 deletion(-) | |
78 | ||
79 | --- a/drivers/pci/dwc/pcie-designware-host.c | |
80 | +++ b/drivers/pci/dwc/pcie-designware-host.c | |
81 | @@ -607,7 +607,7 @@ void dw_pcie_setup_rc(struct pcie_port * | |
82 | /* setup bus numbers */ | |
83 | val = dw_pcie_readl_dbi(pci, PCI_PRIMARY_BUS); | |
84 | val &= 0xff000000; | |
85 | - val |= 0x00010100; | |
86 | + val |= 0x00ff0100; | |
87 | dw_pcie_writel_dbi(pci, PCI_PRIMARY_BUS, val); | |
88 | ||
89 | /* setup command register */ |