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Commit | Line | Data |
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72fc6108 GKH |
1 | From foo@baz Mon Apr 9 10:16:32 CEST 2018 |
2 | From: oulijun <oulijun@huawei.com> | |
3 | Date: Wed, 3 Jan 2018 10:44:04 +0800 | |
4 | Subject: RDMA/hns: Update the usage of sr_max and rr_max field | |
5 | ||
6 | From: oulijun <oulijun@huawei.com> | |
7 | ||
8 | ||
9 | [ Upstream commit 4f3f7a704b3bff9e4eb322ab3c989b505f7562eb ] | |
10 | ||
11 | This patch fixes the usage with sr_max filed and rr_max of qp | |
12 | context when modify qp. Its modifications include: | |
13 | 1. Adjust location of filling sr_max filed of qpc | |
14 | 2. Only assign the number of responder resource if | |
15 | IB_QP_MAX_DEST_RD_ATOMIC bit is set | |
16 | 3. Only assign the number of outstanding resource if | |
17 | IB_QP_MAX_QP_RD_ATOMIC | |
18 | 4. Fix the assgin algorithms for the field of sr_max | |
19 | and rr_max of qp context | |
20 | ||
21 | Signed-off-by: Lijun Ou <oulijun@huawei.com> | |
22 | Signed-off-by: Yixian Liu <liuyixian@huawei.com> | |
23 | Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> | |
24 | Reviewed-by: Leon Romanovsky <leonro@mellanox.com> | |
25 | Signed-off-by: Jason Gunthorpe <jgg@mellanox.com> | |
26 | Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> | |
27 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
28 | --- | |
29 | drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 27 ++++++++++++++++----------- | |
30 | 1 file changed, 16 insertions(+), 11 deletions(-) | |
31 | ||
32 | --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c | |
33 | +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c | |
34 | @@ -2463,11 +2463,14 @@ static int modify_qp_init_to_rtr(struct | |
35 | roce_set_bit(qpc_mask->byte_28_at_fl, V2_QPC_BYTE_28_LBI_S, 0); | |
36 | } | |
37 | ||
38 | - roce_set_field(context->byte_140_raq, V2_QPC_BYTE_140_RR_MAX_M, | |
39 | - V2_QPC_BYTE_140_RR_MAX_S, | |
40 | - ilog2((unsigned int)attr->max_dest_rd_atomic)); | |
41 | - roce_set_field(qpc_mask->byte_140_raq, V2_QPC_BYTE_140_RR_MAX_M, | |
42 | - V2_QPC_BYTE_140_RR_MAX_S, 0); | |
43 | + if ((attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) && | |
44 | + attr->max_dest_rd_atomic) { | |
45 | + roce_set_field(context->byte_140_raq, V2_QPC_BYTE_140_RR_MAX_M, | |
46 | + V2_QPC_BYTE_140_RR_MAX_S, | |
47 | + fls(attr->max_dest_rd_atomic - 1)); | |
48 | + roce_set_field(qpc_mask->byte_140_raq, V2_QPC_BYTE_140_RR_MAX_M, | |
49 | + V2_QPC_BYTE_140_RR_MAX_S, 0); | |
50 | + } | |
51 | ||
52 | roce_set_field(context->byte_56_dqpn_err, V2_QPC_BYTE_56_DQPN_M, | |
53 | V2_QPC_BYTE_56_DQPN_S, attr->dest_qp_num); | |
54 | @@ -2557,12 +2560,6 @@ static int modify_qp_init_to_rtr(struct | |
55 | V2_QPC_BYTE_168_LP_SGEN_INI_M, | |
56 | V2_QPC_BYTE_168_LP_SGEN_INI_S, 0); | |
57 | ||
58 | - roce_set_field(context->byte_208_irrl, V2_QPC_BYTE_208_SR_MAX_M, | |
59 | - V2_QPC_BYTE_208_SR_MAX_S, | |
60 | - ilog2((unsigned int)attr->max_rd_atomic)); | |
61 | - roce_set_field(qpc_mask->byte_208_irrl, V2_QPC_BYTE_208_SR_MAX_M, | |
62 | - V2_QPC_BYTE_208_SR_MAX_S, 0); | |
63 | - | |
64 | roce_set_field(context->byte_28_at_fl, V2_QPC_BYTE_28_SL_M, | |
65 | V2_QPC_BYTE_28_SL_S, rdma_ah_get_sl(&attr->ah_attr)); | |
66 | roce_set_field(qpc_mask->byte_28_at_fl, V2_QPC_BYTE_28_SL_M, | |
67 | @@ -2766,6 +2763,14 @@ static int modify_qp_rtr_to_rts(struct i | |
68 | roce_set_field(qpc_mask->byte_196_sq_psn, V2_QPC_BYTE_196_SQ_MAX_PSN_M, | |
69 | V2_QPC_BYTE_196_SQ_MAX_PSN_S, 0); | |
70 | ||
71 | + if ((attr_mask & IB_QP_MAX_QP_RD_ATOMIC) && attr->max_rd_atomic) { | |
72 | + roce_set_field(context->byte_208_irrl, V2_QPC_BYTE_208_SR_MAX_M, | |
73 | + V2_QPC_BYTE_208_SR_MAX_S, | |
74 | + fls(attr->max_rd_atomic - 1)); | |
75 | + roce_set_field(qpc_mask->byte_208_irrl, | |
76 | + V2_QPC_BYTE_208_SR_MAX_M, | |
77 | + V2_QPC_BYTE_208_SR_MAX_S, 0); | |
78 | + } | |
79 | return 0; | |
80 | } | |
81 |