projects / thirdparty / kernel / stable-queue.git / blame
| Commit | Line | Data |
|---|---|---|
| b0b15cd0 GKH |
1 | From 4a8e06f7aad797e92413a3042d09d3b385fa1fda Mon Sep 17 00:00:00 2001 |
| 2 | From: Alex Deucher <alexander.deucher@amd.com> | |
| 3 | Date: Tue, 27 Mar 2018 15:53:52 -0500 | |
| 4 | Subject: drm/amdgpu/sdma: fix mask in emit_pipeline_sync | |
| 5 | MIME-Version: 1.0 | |
| 6 | Content-Type: text/plain; charset=UTF-8 | |
| 7 | Content-Transfer-Encoding: 8bit | |
| 8 | ||
| 9 | From: Alex Deucher <alexander.deucher@amd.com> | |
| 10 | ||
| 11 | commit 4a8e06f7aad797e92413a3042d09d3b385fa1fda upstream. | |
| 12 | ||
| 13 | Needs to be a 32 bit mask. | |
| 14 | ||
| 15 | Acked-by: Huang Rui <ray.huang@amd.com> | |
| 16 | Reviewed-by: Christian König <christian.koenig@amd.com> | |
| 17 | Signed-off-by: Alex Deucher <alexander.deucher@amd.com> | |
| 18 | Cc: stable@vger.kernel.org | |
| 19 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
| 20 | ||
| 21 | --- | |
| 22 | drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 2 +- | |
| 23 | drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 2 +- | |
| 24 | drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 2 +- | |
| 25 | drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 2 +- | |
| 26 | 4 files changed, 4 insertions(+), 4 deletions(-) | |
| 27 | ||
| 28 | --- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c | |
| 29 | +++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c | |
| 30 | @@ -866,7 +866,7 @@ static void cik_sdma_ring_emit_pipeline_ | |
| 31 | amdgpu_ring_write(ring, addr & 0xfffffffc); | |
| 32 | amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff); | |
| 33 | amdgpu_ring_write(ring, seq); /* reference */ | |
| 34 | - amdgpu_ring_write(ring, 0xfffffff); /* mask */ | |
| 35 | + amdgpu_ring_write(ring, 0xffffffff); /* mask */ | |
| 36 | amdgpu_ring_write(ring, (0xfff << 16) | 4); /* retry count, poll interval */ | |
| 37 | } | |
| 38 | ||
| 39 | --- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | |
| 40 | +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | |
| 41 | @@ -844,7 +844,7 @@ static void sdma_v2_4_ring_emit_pipeline | |
| 42 | amdgpu_ring_write(ring, addr & 0xfffffffc); | |
| 43 | amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff); | |
| 44 | amdgpu_ring_write(ring, seq); /* reference */ | |
| 45 | - amdgpu_ring_write(ring, 0xfffffff); /* mask */ | |
| 46 | + amdgpu_ring_write(ring, 0xffffffff); /* mask */ | |
| 47 | amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) | | |
| 48 | SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(4)); /* retry count, poll interval */ | |
| 49 | } | |
| 50 | --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | |
| 51 | +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | |
| 52 | @@ -1110,7 +1110,7 @@ static void sdma_v3_0_ring_emit_pipeline | |
| 53 | amdgpu_ring_write(ring, addr & 0xfffffffc); | |
| 54 | amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff); | |
| 55 | amdgpu_ring_write(ring, seq); /* reference */ | |
| 56 | - amdgpu_ring_write(ring, 0xfffffff); /* mask */ | |
| 57 | + amdgpu_ring_write(ring, 0xffffffff); /* mask */ | |
| 58 | amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) | | |
| 59 | SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(4)); /* retry count, poll interval */ | |
| 60 | } | |
| 61 | --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | |
| 62 | +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | |
| 63 | @@ -1113,7 +1113,7 @@ static void sdma_v4_0_ring_emit_pipeline | |
| 64 | amdgpu_ring_write(ring, addr & 0xfffffffc); | |
| 65 | amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff); | |
| 66 | amdgpu_ring_write(ring, seq); /* reference */ | |
| 67 | - amdgpu_ring_write(ring, 0xfffffff); /* mask */ | |
| 68 | + amdgpu_ring_write(ring, 0xffffffff); /* mask */ | |
| 69 | amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) | | |
| 70 | SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(4)); /* retry count, poll interval */ | |
| 71 | } |