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c08aef14 GKH |
1 | From 13a83eac373c49c0a081cbcd137e79210fe78acd Mon Sep 17 00:00:00 2001 |
2 | From: Michael Neuling <mikey@neuling.org> | |
3 | Date: Wed, 11 Apr 2018 13:37:58 +1000 | |
4 | Subject: powerpc/eeh: Fix enabling bridge MMIO windows | |
5 | ||
6 | From: Michael Neuling <mikey@neuling.org> | |
7 | ||
8 | commit 13a83eac373c49c0a081cbcd137e79210fe78acd upstream. | |
9 | ||
10 | On boot we save the configuration space of PCIe bridges. We do this so | |
11 | when we get an EEH event and everything gets reset that we can restore | |
12 | them. | |
13 | ||
14 | Unfortunately we save this state before we've enabled the MMIO space | |
15 | on the bridges. Hence if we have to reset the bridge when we come back | |
16 | MMIO is not enabled and we end up taking an PE freeze when the driver | |
17 | starts accessing again. | |
18 | ||
19 | This patch forces the memory/MMIO and bus mastering on when restoring | |
20 | bridges on EEH. Ideally we'd do this correctly by saving the | |
21 | configuration space writes later, but that will have to come later in | |
22 | a larger EEH rewrite. For now we have this simple fix. | |
23 | ||
24 | The original bug can be triggered on a boston machine by doing: | |
25 | echo 0x8000000000000000 > /sys/kernel/debug/powerpc/PCI0001/err_injct_outbound | |
26 | On boston, this PHB has a PCIe switch on it. Without this patch, | |
27 | you'll see two EEH events, 1 expected and 1 the failure we are fixing | |
28 | here. The second EEH event causes the anything under the PHB to | |
29 | disappear (i.e. the i40e eth). | |
30 | ||
31 | With this patch, only 1 EEH event occurs and devices properly recover. | |
32 | ||
33 | Fixes: 652defed4875 ("powerpc/eeh: Check PCIe link after reset") | |
34 | Cc: stable@vger.kernel.org # v3.11+ | |
35 | Reported-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> | |
36 | Signed-off-by: Michael Neuling <mikey@neuling.org> | |
37 | Acked-by: Russell Currey <ruscur@russell.cc> | |
38 | Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> | |
39 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
40 | ||
41 | --- | |
42 | arch/powerpc/kernel/eeh_pe.c | 3 ++- | |
43 | 1 file changed, 2 insertions(+), 1 deletion(-) | |
44 | ||
45 | --- a/arch/powerpc/kernel/eeh_pe.c | |
46 | +++ b/arch/powerpc/kernel/eeh_pe.c | |
47 | @@ -788,7 +788,8 @@ static void eeh_restore_bridge_bars(stru | |
48 | eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]); | |
49 | ||
50 | /* PCI Command: 0x4 */ | |
51 | - eeh_ops->write_config(pdn, PCI_COMMAND, 4, edev->config_space[1]); | |
52 | + eeh_ops->write_config(pdn, PCI_COMMAND, 4, edev->config_space[1] | | |
53 | + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); | |
54 | ||
55 | /* Check the PCIe link is ready */ | |
56 | eeh_bridge_check_link(edev); |