projects / thirdparty / kernel / stable-queue.git / blame
| Commit | Line | Data |
|---|---|---|
| 87d2113e GKH |
1 | From f5b556c94c8490d42fea79d7b4ae0ecbc291e69d Mon Sep 17 00:00:00 2001 |
| 2 | From: Matthias Schiffer <mschiffer@universe-factory.net> | |
| 3 | Date: Thu, 24 Mar 2016 16:02:52 +0100 | |
| 4 | Subject: MIPS: ath79: make bootconsole wait for both THRE and TEMT | |
| 5 | ||
| 6 | From: Matthias Schiffer <mschiffer@universe-factory.net> | |
| 7 | ||
| 8 | commit f5b556c94c8490d42fea79d7b4ae0ecbc291e69d upstream. | |
| 9 | ||
| 10 | This makes the ath79 bootconsole behave the same way as the generic 8250 | |
| 11 | bootconsole. | |
| 12 | ||
| 13 | Also waiting for TEMT (transmit buffer is empty) instead of just THRE | |
| 14 | (transmit buffer is not full) ensures that all characters have been | |
| 15 | transmitted before the real serial driver starts reconfiguring the serial | |
| 16 | controller (which would sometimes result in garbage being transmitted.) | |
| 17 | This change does not cause a visible performance loss. | |
| 18 | ||
| 19 | In addition, this seems to fix a hang observed in certain configurations on | |
| 20 | many AR7xxx/AR9xxx SoCs during autoconfig of the real serial driver. | |
| 21 | ||
| 22 | A more complete follow-up patch will disable 8250 autoconfig for ath79 | |
| 23 | altogether (the serial controller is detected as a 16550A, which is not | |
| 24 | fully compatible with the ath79 serial, and the autoconfig may lead to | |
| 25 | undefined behavior on ath79.) | |
| 26 | ||
| 27 | Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> | |
| 28 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
| 29 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
| 30 | ||
| 31 | --- | |
| 32 | arch/mips/ath79/early_printk.c | 6 ++++-- | |
| 33 | 1 file changed, 4 insertions(+), 2 deletions(-) | |
| 34 | ||
| 35 | --- a/arch/mips/ath79/early_printk.c | |
| 36 | +++ b/arch/mips/ath79/early_printk.c | |
| 37 | @@ -31,13 +31,15 @@ static inline void prom_putchar_wait(voi | |
| 38 | } while (1); | |
| 39 | } | |
| 40 | ||
| 41 | +#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) | |
| 42 | + | |
| 43 | static void prom_putchar_ar71xx(unsigned char ch) | |
| 44 | { | |
| 45 | void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE)); | |
| 46 | ||
| 47 | - prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE); | |
| 48 | + prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY); | |
| 49 | __raw_writel(ch, base + UART_TX * 4); | |
| 50 | - prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE); | |
| 51 | + prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY); | |
| 52 | } | |
| 53 | ||
| 54 | static void prom_putchar_ar933x(unsigned char ch) |