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28bdf407 GKH |
1 | From foo@baz Thu Dec 13 20:11:30 CET 2018 |
2 | From: KarimAllah Ahmed <karahmed@amazon.de> | |
3 | Date: Thu, 1 Feb 2018 22:59:44 +0100 | |
4 | Subject: KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES | |
5 | ||
6 | From: KarimAllah Ahmed <karahmed@amazon.de> | |
7 | ||
8 | commit 28c1c9fabf48d6ad596273a11c46e0d0da3e14cd upstream. | |
9 | ||
10 | Intel processors use MSR_IA32_ARCH_CAPABILITIES MSR to indicate RDCL_NO | |
11 | (bit 0) and IBRS_ALL (bit 1). This is a read-only MSR. By default the | |
12 | contents will come directly from the hardware, but user-space can still | |
13 | override it. | |
14 | ||
15 | [dwmw2: The bit in kvm_cpuid_7_0_edx_x86_features can be unconditional] | |
16 | ||
17 | Signed-off-by: KarimAllah Ahmed <karahmed@amazon.de> | |
18 | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> | |
19 | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> | |
20 | Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> | |
21 | Reviewed-by: Darren Kenny <darren.kenny@oracle.com> | |
22 | Reviewed-by: Jim Mattson <jmattson@google.com> | |
23 | Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
24 | Cc: Andrea Arcangeli <aarcange@redhat.com> | |
25 | Cc: Andi Kleen <ak@linux.intel.com> | |
26 | Cc: Jun Nakajima <jun.nakajima@intel.com> | |
27 | Cc: kvm@vger.kernel.org | |
28 | Cc: Dave Hansen <dave.hansen@intel.com> | |
29 | Cc: Linus Torvalds <torvalds@linux-foundation.org> | |
30 | Cc: Andy Lutomirski <luto@kernel.org> | |
31 | Cc: Asit Mallick <asit.k.mallick@intel.com> | |
32 | Cc: Arjan Van De Ven <arjan.van.de.ven@intel.com> | |
33 | Cc: Greg KH <gregkh@linuxfoundation.org> | |
34 | Cc: Dan Williams <dan.j.williams@intel.com> | |
35 | Cc: Tim Chen <tim.c.chen@linux.intel.com> | |
36 | Cc: Ashok Raj <ashok.raj@intel.com> | |
37 | Link: https://lkml.kernel.org/r/1517522386-18410-4-git-send-email-karahmed@amazon.de | |
38 | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> | |
39 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
40 | [bwh: Backported to 4.4: adjust context] | |
41 | Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> | |
42 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
43 | --- | |
44 | arch/x86/kvm/cpuid.c | 11 +++++++++-- | |
45 | arch/x86/kvm/cpuid.h | 8 ++++++++ | |
46 | arch/x86/kvm/vmx.c | 15 +++++++++++++++ | |
47 | arch/x86/kvm/x86.c | 1 + | |
48 | 4 files changed, 33 insertions(+), 2 deletions(-) | |
49 | ||
50 | --- a/arch/x86/kvm/cpuid.c | |
51 | +++ b/arch/x86/kvm/cpuid.c | |
52 | @@ -362,6 +362,10 @@ static inline int __do_cpuid_ent(struct | |
53 | const u32 kvm_supported_word10_x86_features = | |
54 | F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves; | |
55 | ||
56 | + /* cpuid 7.0.edx*/ | |
57 | + const u32 kvm_cpuid_7_0_edx_x86_features = | |
58 | + F(ARCH_CAPABILITIES); | |
59 | + | |
60 | /* all calls to cpuid_count() should be made on the same cpu */ | |
61 | get_cpu(); | |
62 | ||
63 | @@ -439,11 +443,14 @@ static inline int __do_cpuid_ent(struct | |
64 | cpuid_mask(&entry->ebx, 9); | |
65 | // TSC_ADJUST is emulated | |
66 | entry->ebx |= F(TSC_ADJUST); | |
67 | - } else | |
68 | + entry->edx &= kvm_cpuid_7_0_edx_x86_features; | |
69 | + cpuid_mask(&entry->edx, CPUID_7_EDX); | |
70 | + } else { | |
71 | entry->ebx = 0; | |
72 | + entry->edx = 0; | |
73 | + } | |
74 | entry->eax = 0; | |
75 | entry->ecx = 0; | |
76 | - entry->edx = 0; | |
77 | break; | |
78 | } | |
79 | case 9: | |
80 | --- a/arch/x86/kvm/cpuid.h | |
81 | +++ b/arch/x86/kvm/cpuid.h | |
82 | @@ -170,6 +170,14 @@ static inline bool guest_cpuid_has_ibpb( | |
83 | return best && (best->edx & bit(X86_FEATURE_SPEC_CTRL)); | |
84 | } | |
85 | ||
86 | +static inline bool guest_cpuid_has_arch_capabilities(struct kvm_vcpu *vcpu) | |
87 | +{ | |
88 | + struct kvm_cpuid_entry2 *best; | |
89 | + | |
90 | + best = kvm_find_cpuid_entry(vcpu, 7, 0); | |
91 | + return best && (best->edx & bit(X86_FEATURE_ARCH_CAPABILITIES)); | |
92 | +} | |
93 | + | |
94 | ||
95 | /* | |
96 | * NRIPS is provided through cpuidfn 0x8000000a.edx bit 3 | |
97 | --- a/arch/x86/kvm/vmx.c | |
98 | +++ b/arch/x86/kvm/vmx.c | |
99 | @@ -545,6 +545,8 @@ struct vcpu_vmx { | |
100 | u64 msr_guest_kernel_gs_base; | |
101 | #endif | |
102 | ||
103 | + u64 arch_capabilities; | |
104 | + | |
105 | u32 vm_entry_controls_shadow; | |
106 | u32 vm_exit_controls_shadow; | |
107 | /* | |
108 | @@ -2832,6 +2834,12 @@ static int vmx_get_msr(struct kvm_vcpu * | |
109 | case MSR_IA32_TSC: | |
110 | msr_info->data = guest_read_tsc(vcpu); | |
111 | break; | |
112 | + case MSR_IA32_ARCH_CAPABILITIES: | |
113 | + if (!msr_info->host_initiated && | |
114 | + !guest_cpuid_has_arch_capabilities(vcpu)) | |
115 | + return 1; | |
116 | + msr_info->data = to_vmx(vcpu)->arch_capabilities; | |
117 | + break; | |
118 | case MSR_IA32_SYSENTER_CS: | |
119 | msr_info->data = vmcs_read32(GUEST_SYSENTER_CS); | |
120 | break; | |
121 | @@ -2958,6 +2966,11 @@ static int vmx_set_msr(struct kvm_vcpu * | |
122 | vmx_disable_intercept_for_msr(vmx->vmcs01.msr_bitmap, MSR_IA32_PRED_CMD, | |
123 | MSR_TYPE_W); | |
124 | break; | |
125 | + case MSR_IA32_ARCH_CAPABILITIES: | |
126 | + if (!msr_info->host_initiated) | |
127 | + return 1; | |
128 | + vmx->arch_capabilities = data; | |
129 | + break; | |
130 | case MSR_IA32_CR_PAT: | |
131 | if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) { | |
132 | if (!kvm_mtrr_valid(vcpu, MSR_IA32_CR_PAT, data)) | |
133 | @@ -5002,6 +5015,8 @@ static int vmx_vcpu_setup(struct vcpu_vm | |
134 | ++vmx->nmsrs; | |
135 | } | |
136 | ||
137 | + if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES)) | |
138 | + rdmsrl(MSR_IA32_ARCH_CAPABILITIES, vmx->arch_capabilities); | |
139 | ||
140 | vm_exit_controls_init(vmx, vmcs_config.vmexit_ctrl); | |
141 | ||
142 | --- a/arch/x86/kvm/x86.c | |
143 | +++ b/arch/x86/kvm/x86.c | |
144 | @@ -961,6 +961,7 @@ static u32 msrs_to_save[] = { | |
145 | #endif | |
146 | MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA, | |
147 | MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX, | |
148 | + MSR_IA32_ARCH_CAPABILITIES | |
149 | }; | |
150 | ||
151 | static unsigned num_msrs_to_save; |