]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/blame - releases/4.4.36/mei-me-disable-driver-on-spt-sps-firmware.patch
Fix up backported ptrace patch
[thirdparty/kernel/stable-queue.git] / releases / 4.4.36 / mei-me-disable-driver-on-spt-sps-firmware.patch
CommitLineData
96386514
GKH
1From 8c57cac1457f3125a5d13dc03635c0708c61bff0 Mon Sep 17 00:00:00 2001
2From: Tomas Winkler <tomas.winkler@intel.com>
3Date: Wed, 20 Jul 2016 10:24:02 +0300
4Subject: mei: me: disable driver on SPT SPS firmware
5
6From: Tomas Winkler <tomas.winkler@intel.com>
7
8commit 8c57cac1457f3125a5d13dc03635c0708c61bff0 upstream.
9
10Sunrise Point PCH with SPS Firmware doesn't expose working
11MEI interface, we need to quirk it out.
12The SPS Firmware is identifiable only on the first PCI function
13of the device.
14
15Tested-by: Sujith Pandel <sujith_pandel@dell.com>
16Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
17Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
18
19
20---
21 drivers/misc/mei/hw-me.c | 10 ++++++++--
22 drivers/misc/mei/pci-me.c | 4 ++--
23 2 files changed, 10 insertions(+), 4 deletions(-)
24
25--- a/drivers/misc/mei/hw-me.c
26+++ b/drivers/misc/mei/hw-me.c
27@@ -1258,8 +1258,14 @@ static bool mei_me_fw_type_nm(struct pci
28 static bool mei_me_fw_type_sps(struct pci_dev *pdev)
29 {
30 u32 reg;
31- /* Read ME FW Status check for SPS Firmware */
32- pci_read_config_dword(pdev, PCI_CFG_HFS_1, &reg);
33+ unsigned int devfn;
34+
35+ /*
36+ * Read ME FW Status register to check for SPS Firmware
37+ * The SPS FW is only signaled in pci function 0
38+ */
39+ devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
40+ pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_1, &reg);
41 /* if bits [19:16] = 15, running SPS Firmware */
42 return (reg & 0xf0000) == 0xf0000;
43 }
44--- a/drivers/misc/mei/pci-me.c
45+++ b/drivers/misc/mei/pci-me.c
46@@ -84,8 +84,8 @@ static const struct pci_device_id mei_me
47
48 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)},
49 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)},
50- {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_cfg)},
51- {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_cfg)},
52+ {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_sps_cfg)},
53+ {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_sps_cfg)},
54
55 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, mei_me_pch8_cfg)},
56 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, mei_me_pch8_cfg)},