projects / thirdparty / kernel / stable-queue.git / blame
| Commit | Line | Data |
|---|---|---|
| 381a4dca GKH |
1 | From 48fe9e9488743eec9b7c1addd3c93f12f2123d54 Mon Sep 17 00:00:00 2001 |
| 2 | From: Paul Mackerras <paulus@ozlabs.org> | |
| 3 | Date: Tue, 4 Apr 2017 14:56:05 +1000 | |
| 4 | Subject: powerpc: Don't try to fix up misaligned load-with-reservation instructions | |
| 5 | ||
| 6 | From: Paul Mackerras <paulus@ozlabs.org> | |
| 7 | ||
| 8 | commit 48fe9e9488743eec9b7c1addd3c93f12f2123d54 upstream. | |
| 9 | ||
| 10 | In the past, there was only one load-with-reservation instruction, | |
| 11 | lwarx, and if a program attempted a lwarx on a misaligned address, it | |
| 12 | would take an alignment interrupt and the kernel handler would emulate | |
| 13 | it as though it was lwzx, which was not really correct, but benign since | |
| 14 | it is loading the right amount of data, and the lwarx should be paired | |
| 15 | with a stwcx. to the same address, which would also cause an alignment | |
| 16 | interrupt which would result in a SIGBUS being delivered to the process. | |
| 17 | ||
| 18 | We now have 5 different sizes of load-with-reservation instruction. Of | |
| 19 | those, lharx and ldarx cause an immediate SIGBUS by luck since their | |
| 20 | entries in aligninfo[] overlap instructions which were not fixed up, but | |
| 21 | lqarx overlaps with lhz and will be emulated as such. lbarx can never | |
| 22 | generate an alignment interrupt since it only operates on 1 byte. | |
| 23 | ||
| 24 | To straighten this out and fix the lqarx case, this adds code to detect | |
| 25 | the l[hwdq]arx instructions and return without fixing them up, resulting | |
| 26 | in a SIGBUS being delivered to the process. | |
| 27 | ||
| 28 | Signed-off-by: Paul Mackerras <paulus@ozlabs.org> | |
| 29 | Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> | |
| 30 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
| 31 | ||
| 32 | --- | |
| 33 | arch/powerpc/kernel/align.c | 27 +++++++++++++++++++-------- | |
| 34 | 1 file changed, 19 insertions(+), 8 deletions(-) | |
| 35 | ||
| 36 | --- a/arch/powerpc/kernel/align.c | |
| 37 | +++ b/arch/powerpc/kernel/align.c | |
| 38 | @@ -808,14 +808,25 @@ int fix_alignment(struct pt_regs *regs) | |
| 39 | nb = aligninfo[instr].len; | |
| 40 | flags = aligninfo[instr].flags; | |
| 41 | ||
| 42 | - /* ldbrx/stdbrx overlap lfs/stfs in the DSISR unfortunately */ | |
| 43 | - if (IS_XFORM(instruction) && ((instruction >> 1) & 0x3ff) == 532) { | |
| 44 | - nb = 8; | |
| 45 | - flags = LD+SW; | |
| 46 | - } else if (IS_XFORM(instruction) && | |
| 47 | - ((instruction >> 1) & 0x3ff) == 660) { | |
| 48 | - nb = 8; | |
| 49 | - flags = ST+SW; | |
| 50 | + /* | |
| 51 | + * Handle some cases which give overlaps in the DSISR values. | |
| 52 | + */ | |
| 53 | + if (IS_XFORM(instruction)) { | |
| 54 | + switch (get_xop(instruction)) { | |
| 55 | + case 532: /* ldbrx */ | |
| 56 | + nb = 8; | |
| 57 | + flags = LD+SW; | |
| 58 | + break; | |
| 59 | + case 660: /* stdbrx */ | |
| 60 | + nb = 8; | |
| 61 | + flags = ST+SW; | |
| 62 | + break; | |
| 63 | + case 20: /* lwarx */ | |
| 64 | + case 84: /* ldarx */ | |
| 65 | + case 116: /* lharx */ | |
| 66 | + case 276: /* lqarx */ | |
| 67 | + return 0; /* not emulated ever */ | |
| 68 | + } | |
| 69 | } | |
| 70 | ||
| 71 | /* Byteswap little endian loads and stores */ |