projects / thirdparty / kernel / stable-queue.git / blame
| Commit | Line | Data |
|---|---|---|
| 1dd7aceb GKH |
1 | From foo@baz Wed Aug 22 09:42:09 CEST 2018 |
| 2 | From: Alison Wang <alison.wang@nxp.com> | |
| 3 | Date: Tue, 24 Apr 2018 10:42:32 +0800 | |
| 4 | Subject: drm: mali-dp: Enable Global SE interrupts mask for DP500 | |
| 5 | ||
| 6 | From: Alison Wang <alison.wang@nxp.com> | |
| 7 | ||
| 8 | [ Upstream commit 89610dc2c235e7b02bb9fba0ce247e12d4dde7cd ] | |
| 9 | ||
| 10 | In the situation that DE and SE aren’t shared the same interrupt number, | |
| 11 | the Global SE interrupts mask bit MASK_IRQ_EN in MASKIRQ must be set, or | |
| 12 | else other mask bits will not work and no SE interrupt will occur. This | |
| 13 | patch enables MASK_IRQ_EN for SE to fix this problem. | |
| 14 | ||
| 15 | Signed-off-by: Alison Wang <alison.wang@nxp.com> | |
| 16 | Acked-by: Liviu Dudau <liviu.dudau@arm.com> | |
| 17 | Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> | |
| 18 | Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> | |
| 19 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
| 20 | --- | |
| 21 | drivers/gpu/drm/arm/malidp_hw.c | 3 ++- | |
| 22 | 1 file changed, 2 insertions(+), 1 deletion(-) | |
| 23 | ||
| 24 | --- a/drivers/gpu/drm/arm/malidp_hw.c | |
| 25 | +++ b/drivers/gpu/drm/arm/malidp_hw.c | |
| 26 | @@ -432,7 +432,8 @@ const struct malidp_hw_device malidp_dev | |
| 27 | .vsync_irq = MALIDP500_DE_IRQ_VSYNC, | |
| 28 | }, | |
| 29 | .se_irq_map = { | |
| 30 | - .irq_mask = MALIDP500_SE_IRQ_CONF_MODE, | |
| 31 | + .irq_mask = MALIDP500_SE_IRQ_CONF_MODE | | |
| 32 | + MALIDP500_SE_IRQ_GLOBAL, | |
| 33 | .vsync_irq = 0, | |
| 34 | }, | |
| 35 | .dc_irq_map = { |