projects / thirdparty / kernel / stable-queue.git / blame
| Commit | Line | Data |
|---|---|---|
| b779c14e GKH |
1 | From 50ca031b51106b1b46162d4e9ecccb7edc95682f Mon Sep 17 00:00:00 2001 |
| 2 | From: Mika Westerberg <mika.westerberg@linux.intel.com> | |
| 3 | Date: Wed, 5 Sep 2018 14:09:54 +0300 | |
| 4 | Subject: Revert "PCI: Add ACS quirk for Intel 300 series" | |
| 5 | ||
| 6 | From: Mika Westerberg <mika.westerberg@linux.intel.com> | |
| 7 | ||
| 8 | commit 50ca031b51106b1b46162d4e9ecccb7edc95682f upstream. | |
| 9 | ||
| 10 | This reverts f154a718e6cc ("PCI: Add ACS quirk for Intel 300 series"). | |
| 11 | ||
| 12 | It turns out that erratum "PCH PCIe* Controller Root Port (ACSCTLR) Appear | |
| 13 | As Read Only" has been fixed in 300 series chipsets, even though the | |
| 14 | datasheet [1] claims otherwise. To make ACS work properly on 300 series | |
| 15 | root ports, revert the faulty commit. | |
| 16 | ||
| 17 | [1] https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/300-series-c240-series-chipset-pch-spec-update.pdf | |
| 18 | ||
| 19 | Fixes: f154a718e6cc ("PCI: Add ACS quirk for Intel 300 series") | |
| 20 | Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> | |
| 21 | Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> | |
| 22 | Cc: stable@vger.kernel.org # v4.18+ | |
| 23 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
| 24 | ||
| 25 | --- | |
| 26 | drivers/pci/quirks.c | 6 ------ | |
| 27 | 1 file changed, 6 deletions(-) | |
| 28 | ||
| 29 | --- a/drivers/pci/quirks.c | |
| 30 | +++ b/drivers/pci/quirks.c | |
| 31 | @@ -4236,11 +4236,6 @@ static int pci_quirk_qcom_rp_acs(struct | |
| 32 | * | |
| 33 | * 0x9d10-0x9d1b PCI Express Root port #{1-12} | |
| 34 | * | |
| 35 | - * The 300 series chipset suffers from the same bug so include those root | |
| 36 | - * ports here as well. | |
| 37 | - * | |
| 38 | - * 0xa32c-0xa343 PCI Express Root port #{0-24} | |
| 39 | - * | |
| 40 | * [1] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-2.html | |
| 41 | * [2] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-1.html | |
| 42 | * [3] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-spec-update.html | |
| 43 | @@ -4258,7 +4253,6 @@ static bool pci_quirk_intel_spt_pch_acs_ | |
| 44 | case 0xa110 ... 0xa11f: case 0xa167 ... 0xa16a: /* Sunrise Point */ | |
| 45 | case 0xa290 ... 0xa29f: case 0xa2e7 ... 0xa2ee: /* Union Point */ | |
| 46 | case 0x9d10 ... 0x9d1b: /* 7th & 8th Gen Mobile */ | |
| 47 | - case 0xa32c ... 0xa343: /* 300 series */ | |
| 48 | return true; | |
| 49 | } | |
| 50 |