projects / thirdparty / kernel / stable-queue.git / blame
| Commit | Line | Data |
|---|---|---|
| 6fa88700 GKH |
1 | From 547bb621ae974151e7e208b065ac78a5ace01edf Mon Sep 17 00:00:00 2001 |
| 2 | From: Tony Luck <tony.luck@intel.com> | |
| 3 | Date: Tue, 6 Mar 2018 15:21:41 +0100 | |
| 4 | Subject: [PATCH 01/76] x86/MCE: Save microcode revision in machine check | |
| 5 | records | |
| 6 | ||
| 7 | commit fa94d0c6e0f3431523f5701084d799c77c7d4a4f upstream. | |
| 8 | ||
| 9 | Updating microcode used to be relatively rare. Now that it has become | |
| 10 | more common we should save the microcode version in a machine check | |
| 11 | record to make sure that those people looking at the error have this | |
| 12 | important information bundled with the rest of the logged information. | |
| 13 | ||
| 14 | [ Borislav: Simplify a bit. ] | |
| 15 | ||
| 16 | Signed-off-by: Tony Luck <tony.luck@intel.com> | |
| 17 | Signed-off-by: Borislav Petkov <bp@suse.de> | |
| 18 | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> | |
| 19 | Cc: Yazen Ghannam <yazen.ghannam@amd.com> | |
| 20 | Cc: linux-edac <linux-edac@vger.kernel.org> | |
| 21 | Link: http://lkml.kernel.org/r/20180301233449.24311-1-tony.luck@intel.com | |
| 22 | [bwh: Backported to 4.9: | |
| 23 | - Also add ppin field to struct mce, to match upstream UAPI | |
| 24 | - Adjust context] | |
| 25 | Signed-off-by: Ben Hutchings <ben@decadent.org.uk> | |
| 26 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
| 27 | --- | |
| 28 | arch/x86/include/uapi/asm/mce.h | 2 ++ | |
| 29 | arch/x86/kernel/cpu/mcheck/mce.c | 4 +++- | |
| 30 | 2 files changed, 5 insertions(+), 1 deletion(-) | |
| 31 | ||
| 32 | diff --git a/arch/x86/include/uapi/asm/mce.h b/arch/x86/include/uapi/asm/mce.h | |
| 33 | index 69a6e07e3149..db7dae58745f 100644 | |
| 34 | --- a/arch/x86/include/uapi/asm/mce.h | |
| 35 | +++ b/arch/x86/include/uapi/asm/mce.h | |
| 36 | @@ -28,6 +28,8 @@ struct mce { | |
| 37 | __u64 mcgcap; /* MCGCAP MSR: machine check capabilities of CPU */ | |
| 38 | __u64 synd; /* MCA_SYND MSR: only valid on SMCA systems */ | |
| 39 | __u64 ipid; /* MCA_IPID MSR: only valid on SMCA systems */ | |
| 40 | + __u64 ppin; /* Protected Processor Inventory Number */ | |
| 41 | + __u32 microcode;/* Microcode revision */ | |
| 42 | }; | |
| 43 | ||
| 44 | #define MCE_GET_RECORD_LEN _IOR('M', 1, int) | |
| 45 | diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c | |
| 46 | index 25310d2b8609..d9ad49ca3cbe 100644 | |
| 47 | --- a/arch/x86/kernel/cpu/mcheck/mce.c | |
| 48 | +++ b/arch/x86/kernel/cpu/mcheck/mce.c | |
| 49 | @@ -139,6 +139,8 @@ void mce_setup(struct mce *m) | |
| 50 | m->socketid = cpu_data(m->extcpu).phys_proc_id; | |
| 51 | m->apicid = cpu_data(m->extcpu).initial_apicid; | |
| 52 | rdmsrl(MSR_IA32_MCG_CAP, m->mcgcap); | |
| 53 | + | |
| 54 | + m->microcode = boot_cpu_data.microcode; | |
| 55 | } | |
| 56 | ||
| 57 | DEFINE_PER_CPU(struct mce, injectm); | |
| 58 | @@ -309,7 +311,7 @@ static void print_mce(struct mce *m) | |
| 59 | */ | |
| 60 | pr_emerg(HW_ERR "PROCESSOR %u:%x TIME %llu SOCKET %u APIC %x microcode %x\n", | |
| 61 | m->cpuvendor, m->cpuid, m->time, m->socketid, m->apicid, | |
| 62 | - cpu_data(m->extcpu).microcode); | |
| 63 | + m->microcode); | |
| 64 | ||
| 65 | pr_emerg_ratelimited(HW_ERR "Run the above through 'mcelog --ascii'\n"); | |
| 66 | } | |
| 67 | -- | |
| 68 | 2.21.0 | |
| 69 |