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Commit | Line | Data |
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6fa88700 GKH |
1 | From c170410d544f2e1b2a99f9a58cca28d68ccad908 Mon Sep 17 00:00:00 2001 |
2 | From: Dominik Brodowski <linux@dominikbrodowski.net> | |
3 | Date: Tue, 22 May 2018 11:05:39 +0200 | |
4 | Subject: [PATCH 13/76] x86/speculation: Simplify the CPU bug detection logic | |
5 | ||
6 | commit 8ecc4979b1bd9c94168e6fc92960033b7a951336 upstream. | |
7 | ||
8 | Only CPUs which speculate can speculate. Therefore, it seems prudent | |
9 | to test for cpu_no_speculation first and only then determine whether | |
10 | a specific speculating CPU is susceptible to store bypass speculation. | |
11 | This is underlined by all CPUs currently listed in cpu_no_speculation | |
12 | were present in cpu_no_spec_store_bypass as well. | |
13 | ||
14 | Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> | |
15 | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> | |
16 | Cc: bp@suse.de | |
17 | Cc: konrad.wilk@oracle.com | |
18 | Link: https://lkml.kernel.org/r/20180522090539.GA24668@light.dominikbrodowski.net | |
19 | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> | |
20 | Signed-off-by: Ben Hutchings <ben@decadent.org.uk> | |
21 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
22 | --- | |
23 | arch/x86/kernel/cpu/common.c | 22 +++++++--------------- | |
24 | 1 file changed, 7 insertions(+), 15 deletions(-) | |
25 | ||
26 | diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c | |
27 | index 59b2dc011f7f..8ddcf026a77d 100644 | |
28 | --- a/arch/x86/kernel/cpu/common.c | |
29 | +++ b/arch/x86/kernel/cpu/common.c | |
30 | @@ -909,12 +909,8 @@ static const __initconst struct x86_cpu_id cpu_no_meltdown[] = { | |
31 | {} | |
32 | }; | |
33 | ||
34 | +/* Only list CPUs which speculate but are non susceptible to SSB */ | |
35 | static const __initconst struct x86_cpu_id cpu_no_spec_store_bypass[] = { | |
36 | - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PINEVIEW }, | |
37 | - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_LINCROFT }, | |
38 | - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PENWELL }, | |
39 | - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CLOVERVIEW }, | |
40 | - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CEDARVIEW }, | |
41 | { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 }, | |
42 | { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT }, | |
43 | { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT2 }, | |
44 | @@ -922,14 +918,10 @@ static const __initconst struct x86_cpu_id cpu_no_spec_store_bypass[] = { | |
45 | { X86_VENDOR_INTEL, 6, INTEL_FAM6_CORE_YONAH }, | |
46 | { X86_VENDOR_INTEL, 6, INTEL_FAM6_XEON_PHI_KNL }, | |
47 | { X86_VENDOR_INTEL, 6, INTEL_FAM6_XEON_PHI_KNM }, | |
48 | - { X86_VENDOR_CENTAUR, 5, }, | |
49 | - { X86_VENDOR_INTEL, 5, }, | |
50 | - { X86_VENDOR_NSC, 5, }, | |
51 | { X86_VENDOR_AMD, 0x12, }, | |
52 | { X86_VENDOR_AMD, 0x11, }, | |
53 | { X86_VENDOR_AMD, 0x10, }, | |
54 | { X86_VENDOR_AMD, 0xf, }, | |
55 | - { X86_VENDOR_ANY, 4, }, | |
56 | {} | |
57 | }; | |
58 | ||
59 | @@ -952,6 +944,12 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c) | |
60 | { | |
61 | u64 ia32_cap = 0; | |
62 | ||
63 | + if (x86_match_cpu(cpu_no_speculation)) | |
64 | + return; | |
65 | + | |
66 | + setup_force_cpu_bug(X86_BUG_SPECTRE_V1); | |
67 | + setup_force_cpu_bug(X86_BUG_SPECTRE_V2); | |
68 | + | |
69 | if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES)) | |
70 | rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap); | |
71 | ||
72 | @@ -960,12 +958,6 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c) | |
73 | !cpu_has(c, X86_FEATURE_AMD_SSB_NO)) | |
74 | setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS); | |
75 | ||
76 | - if (x86_match_cpu(cpu_no_speculation)) | |
77 | - return; | |
78 | - | |
79 | - setup_force_cpu_bug(X86_BUG_SPECTRE_V1); | |
80 | - setup_force_cpu_bug(X86_BUG_SPECTRE_V2); | |
81 | - | |
82 | if (ia32_cap & ARCH_CAP_IBRS_ALL) | |
83 | setup_force_cpu_cap(X86_FEATURE_IBRS_ENHANCED); | |
84 | ||
85 | -- | |
86 | 2.21.0 | |
87 |