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Commit | Line | Data |
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208fc782 GKH |
1 | From 46cfa2148e7371c537efff1a1c693e58f523089d Mon Sep 17 00:00:00 2001 |
2 | From: Larry Finger <Larry.Finger@lwfinger.net> | |
3 | Date: Sun, 16 Apr 2017 19:32:07 -0500 | |
4 | Subject: rtlwifi: rtl8821ae: setup 8812ae RFE according to device type | |
5 | ||
6 | From: Larry Finger <Larry.Finger@lwfinger.net> | |
7 | ||
8 | commit 46cfa2148e7371c537efff1a1c693e58f523089d upstream. | |
9 | ||
10 | Current channel switch implementation sets 8812ae RFE reg value assuming | |
11 | that device always has type 2. | |
12 | ||
13 | Extend possible RFE types set and write corresponding reg values. | |
14 | ||
15 | Source for new code is | |
16 | http://dlcdnet.asus.com/pub/ASUS/wireless/PCE-AC51/DR_PCE_AC51_20232801152016.zip | |
17 | ||
18 | Signed-off-by: Maxim Samoylov <max7255@gmail.com> | |
19 | Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> | |
20 | Cc: Yan-Hsuan Chuang <yhchuang@realtek.com> | |
21 | Cc: Pkshih <pkshih@realtek.com> | |
22 | Cc: Birming Chiu <birming@realtek.com> | |
23 | Cc: Shaofu <shaofu@realtek.com> | |
24 | Cc: Steven Ting <steventing@realtek.com> | |
25 | Signed-off-by: Kalle Valo <kvalo@codeaurora.org> | |
26 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
27 | ||
28 | --- | |
29 | drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c | 122 ++++++++++++++++--- | |
30 | drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h | 1 | |
31 | 2 files changed, 107 insertions(+), 16 deletions(-) | |
32 | ||
33 | --- a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c | |
34 | +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c | |
35 | @@ -359,6 +359,107 @@ bool rtl8821ae_phy_rf_config(struct ieee | |
36 | return rtl8821ae_phy_rf6052_config(hw); | |
37 | } | |
38 | ||
39 | +static void _rtl8812ae_phy_set_rfe_reg_24g(struct ieee80211_hw *hw) | |
40 | +{ | |
41 | + struct rtl_priv *rtlpriv = rtl_priv(hw); | |
42 | + struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); | |
43 | + u8 tmp; | |
44 | + | |
45 | + switch (rtlhal->rfe_type) { | |
46 | + case 3: | |
47 | + rtl_set_bbreg(hw, RA_RFE_PINMUX, BMASKDWORD, 0x54337770); | |
48 | + rtl_set_bbreg(hw, RB_RFE_PINMUX, BMASKDWORD, 0x54337770); | |
49 | + rtl_set_bbreg(hw, RA_RFE_INV, BMASKRFEINV, 0x010); | |
50 | + rtl_set_bbreg(hw, RB_RFE_INV, BMASKRFEINV, 0x010); | |
51 | + rtl_set_bbreg(hw, 0x900, 0x00000303, 0x1); | |
52 | + break; | |
53 | + case 4: | |
54 | + rtl_set_bbreg(hw, RA_RFE_PINMUX, BMASKDWORD, 0x77777777); | |
55 | + rtl_set_bbreg(hw, RB_RFE_PINMUX, BMASKDWORD, 0x77777777); | |
56 | + rtl_set_bbreg(hw, RA_RFE_INV, BMASKRFEINV, 0x001); | |
57 | + rtl_set_bbreg(hw, RB_RFE_INV, BMASKRFEINV, 0x001); | |
58 | + break; | |
59 | + case 5: | |
60 | + rtl_write_byte(rtlpriv, RA_RFE_PINMUX + 2, 0x77); | |
61 | + rtl_set_bbreg(hw, RB_RFE_PINMUX, BMASKDWORD, 0x77777777); | |
62 | + tmp = rtl_read_byte(rtlpriv, RA_RFE_INV + 3); | |
63 | + rtl_write_byte(rtlpriv, RA_RFE_INV + 3, tmp & ~0x1); | |
64 | + rtl_set_bbreg(hw, RB_RFE_INV, BMASKRFEINV, 0x000); | |
65 | + break; | |
66 | + case 1: | |
67 | + if (rtlpriv->btcoexist.bt_coexistence) { | |
68 | + rtl_set_bbreg(hw, RA_RFE_PINMUX, 0xffffff, 0x777777); | |
69 | + rtl_set_bbreg(hw, RB_RFE_PINMUX, BMASKDWORD, | |
70 | + 0x77777777); | |
71 | + rtl_set_bbreg(hw, RA_RFE_INV, 0x33f00000, 0x000); | |
72 | + rtl_set_bbreg(hw, RB_RFE_INV, BMASKRFEINV, 0x000); | |
73 | + break; | |
74 | + } | |
75 | + case 0: | |
76 | + case 2: | |
77 | + default: | |
78 | + rtl_set_bbreg(hw, RA_RFE_PINMUX, BMASKDWORD, 0x77777777); | |
79 | + rtl_set_bbreg(hw, RB_RFE_PINMUX, BMASKDWORD, 0x77777777); | |
80 | + rtl_set_bbreg(hw, RA_RFE_INV, BMASKRFEINV, 0x000); | |
81 | + rtl_set_bbreg(hw, RB_RFE_INV, BMASKRFEINV, 0x000); | |
82 | + break; | |
83 | + } | |
84 | +} | |
85 | + | |
86 | +static void _rtl8812ae_phy_set_rfe_reg_5g(struct ieee80211_hw *hw) | |
87 | +{ | |
88 | + struct rtl_priv *rtlpriv = rtl_priv(hw); | |
89 | + struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); | |
90 | + u8 tmp; | |
91 | + | |
92 | + switch (rtlhal->rfe_type) { | |
93 | + case 0: | |
94 | + rtl_set_bbreg(hw, RA_RFE_PINMUX, BMASKDWORD, 0x77337717); | |
95 | + rtl_set_bbreg(hw, RB_RFE_PINMUX, BMASKDWORD, 0x77337717); | |
96 | + rtl_set_bbreg(hw, RA_RFE_INV, BMASKRFEINV, 0x010); | |
97 | + rtl_set_bbreg(hw, RB_RFE_INV, BMASKRFEINV, 0x010); | |
98 | + break; | |
99 | + case 1: | |
100 | + if (rtlpriv->btcoexist.bt_coexistence) { | |
101 | + rtl_set_bbreg(hw, RA_RFE_PINMUX, 0xffffff, 0x337717); | |
102 | + rtl_set_bbreg(hw, RB_RFE_PINMUX, BMASKDWORD, | |
103 | + 0x77337717); | |
104 | + rtl_set_bbreg(hw, RA_RFE_INV, 0x33f00000, 0x000); | |
105 | + rtl_set_bbreg(hw, RB_RFE_INV, BMASKRFEINV, 0x000); | |
106 | + } else { | |
107 | + rtl_set_bbreg(hw, RA_RFE_PINMUX, BMASKDWORD, | |
108 | + 0x77337717); | |
109 | + rtl_set_bbreg(hw, RB_RFE_PINMUX, BMASKDWORD, | |
110 | + 0x77337717); | |
111 | + rtl_set_bbreg(hw, RA_RFE_INV, BMASKRFEINV, 0x000); | |
112 | + rtl_set_bbreg(hw, RB_RFE_INV, BMASKRFEINV, 0x000); | |
113 | + } | |
114 | + break; | |
115 | + case 3: | |
116 | + rtl_set_bbreg(hw, RA_RFE_PINMUX, BMASKDWORD, 0x54337717); | |
117 | + rtl_set_bbreg(hw, RB_RFE_PINMUX, BMASKDWORD, 0x54337717); | |
118 | + rtl_set_bbreg(hw, RA_RFE_INV, BMASKRFEINV, 0x010); | |
119 | + rtl_set_bbreg(hw, RB_RFE_INV, BMASKRFEINV, 0x010); | |
120 | + rtl_set_bbreg(hw, 0x900, 0x00000303, 0x1); | |
121 | + break; | |
122 | + case 5: | |
123 | + rtl_write_byte(rtlpriv, RA_RFE_PINMUX + 2, 0x33); | |
124 | + rtl_set_bbreg(hw, RB_RFE_PINMUX, BMASKDWORD, 0x77337777); | |
125 | + tmp = rtl_read_byte(rtlpriv, RA_RFE_INV + 3); | |
126 | + rtl_write_byte(rtlpriv, RA_RFE_INV + 3, tmp | 0x1); | |
127 | + rtl_set_bbreg(hw, RB_RFE_INV, BMASKRFEINV, 0x010); | |
128 | + break; | |
129 | + case 2: | |
130 | + case 4: | |
131 | + default: | |
132 | + rtl_set_bbreg(hw, RA_RFE_PINMUX, BMASKDWORD, 0x77337777); | |
133 | + rtl_set_bbreg(hw, RB_RFE_PINMUX, BMASKDWORD, 0x77337777); | |
134 | + rtl_set_bbreg(hw, RA_RFE_INV, BMASKRFEINV, 0x010); | |
135 | + rtl_set_bbreg(hw, RB_RFE_INV, BMASKRFEINV, 0x010); | |
136 | + break; | |
137 | + } | |
138 | +} | |
139 | + | |
140 | u32 phy_get_tx_swing_8812A(struct ieee80211_hw *hw, u8 band, | |
141 | u8 rf_path) | |
142 | { | |
143 | @@ -553,14 +654,9 @@ void rtl8821ae_phy_switch_wirelessband(s | |
144 | /* 0x82C[1:0] = 2b'00 */ | |
145 | rtl_set_bbreg(hw, 0x82c, 0x3, 0); | |
146 | } | |
147 | - if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) { | |
148 | - rtl_set_bbreg(hw, RA_RFE_PINMUX, BMASKDWORD, | |
149 | - 0x77777777); | |
150 | - rtl_set_bbreg(hw, RB_RFE_PINMUX, BMASKDWORD, | |
151 | - 0x77777777); | |
152 | - rtl_set_bbreg(hw, RA_RFE_INV, 0x3ff00000, 0x000); | |
153 | - rtl_set_bbreg(hw, RB_RFE_INV, 0x3ff00000, 0x000); | |
154 | - } | |
155 | + | |
156 | + if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) | |
157 | + _rtl8812ae_phy_set_rfe_reg_24g(hw); | |
158 | ||
159 | rtl_set_bbreg(hw, RTXPATH, 0xf0, 0x1); | |
160 | rtl_set_bbreg(hw, RCCK_RX, 0x0f000000, 0x1); | |
161 | @@ -615,14 +711,8 @@ void rtl8821ae_phy_switch_wirelessband(s | |
162 | /* 0x82C[1:0] = 2'b00 */ | |
163 | rtl_set_bbreg(hw, 0x82c, 0x3, 1); | |
164 | ||
165 | - if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) { | |
166 | - rtl_set_bbreg(hw, RA_RFE_PINMUX, BMASKDWORD, | |
167 | - 0x77337777); | |
168 | - rtl_set_bbreg(hw, RB_RFE_PINMUX, BMASKDWORD, | |
169 | - 0x77337777); | |
170 | - rtl_set_bbreg(hw, RA_RFE_INV, 0x3ff00000, 0x010); | |
171 | - rtl_set_bbreg(hw, RB_RFE_INV, 0x3ff00000, 0x010); | |
172 | - } | |
173 | + if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) | |
174 | + _rtl8812ae_phy_set_rfe_reg_5g(hw); | |
175 | ||
176 | rtl_set_bbreg(hw, RTXPATH, 0xf0, 0); | |
177 | rtl_set_bbreg(hw, RCCK_RX, 0x0f000000, 0xf); | |
178 | --- a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h | |
179 | +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h | |
180 | @@ -2424,6 +2424,7 @@ | |
181 | #define BMASKH4BITS 0xf0000000 | |
182 | #define BMASKOFDM_D 0xffc00000 | |
183 | #define BMASKCCK 0x3f3f3f3f | |
184 | +#define BMASKRFEINV 0x3ff00000 | |
185 | ||
186 | #define BRFREGOFFSETMASK 0xfffff | |
187 |