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CommitLineData
dbfa5f4f
GKH
1From ddbfff7429a75d954bf5bdff9f2222bceb4c236a Mon Sep 17 00:00:00 2001
2From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
3Date: Mon, 19 Jun 2017 17:50:12 +0200
4Subject: MIPS: math-emu: Handle zero accumulator case in MADDF and MSUBF separately
5
6From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
7
8commit ddbfff7429a75d954bf5bdff9f2222bceb4c236a upstream.
9
10If accumulator value is zero, just return the value of previously
11calculated product. This brings logic in MADDF/MSUBF implementation
12closer to the logic in ADD/SUB case.
13
14Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
15Signed-off-by: Goran Ferenc <goran.ferenc@imgtec.com>
16Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
17Cc: James.Hogan@imgtec.com
18Cc: Paul.Burton@imgtec.com
19Cc: Raghu.Gandham@imgtec.com
20Cc: Leonid.Yegoshin@imgtec.com
21Cc: Douglas.Leung@imgtec.com
22Cc: Petar.Jovanovic@imgtec.com
23Cc: linux-mips@linux-mips.org
24Patchwork: https://patchwork.linux-mips.org/patch/16512/
25Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
26Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
27
28---
29 arch/mips/math-emu/dp_maddf.c | 5 ++++-
30 arch/mips/math-emu/sp_maddf.c | 5 ++++-
31 2 files changed, 8 insertions(+), 2 deletions(-)
32
33--- a/arch/mips/math-emu/dp_maddf.c
34+++ b/arch/mips/math-emu/dp_maddf.c
35@@ -54,7 +54,7 @@ static union ieee754dp _dp_maddf(union i
36 return ieee754dp_nanxcpt(z);
37 case IEEE754_CLASS_DNORM:
38 DPDNORMZ;
39- /* QNAN is handled separately below */
40+ /* QNAN and ZERO cases are handled separately below */
41 }
42
43 switch (CLPAIR(xc, yc)) {
44@@ -210,6 +210,9 @@ static union ieee754dp _dp_maddf(union i
45 }
46 assert(rm & (DP_HIDDEN_BIT << 3));
47
48+ if (zc == IEEE754_CLASS_ZERO)
49+ return ieee754dp_format(rs, re, rm);
50+
51 /* And now the addition */
52 assert(zm & DP_HIDDEN_BIT);
53
54--- a/arch/mips/math-emu/sp_maddf.c
55+++ b/arch/mips/math-emu/sp_maddf.c
56@@ -54,7 +54,7 @@ static union ieee754sp _sp_maddf(union i
57 return ieee754sp_nanxcpt(z);
58 case IEEE754_CLASS_DNORM:
59 SPDNORMZ;
60- /* QNAN is handled separately below */
61+ /* QNAN and ZERO cases are handled separately below */
62 }
63
64 switch (CLPAIR(xc, yc)) {
65@@ -203,6 +203,9 @@ static union ieee754sp _sp_maddf(union i
66 }
67 assert(rm & (SP_HIDDEN_BIT << 3));
68
69+ if (zc == IEEE754_CLASS_ZERO)
70+ return ieee754sp_format(rs, re, rm);
71+
72 /* And now the addition */
73
74 assert(zm & SP_HIDDEN_BIT);