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63e03c28 GKH |
1 | From 79d2c8bede2c93f9432d7da0bc2f76a195c90fc0 Mon Sep 17 00:00:00 2001 |
2 | From: Daniel Drake <drake@endlessm.com> | |
3 | Date: Mon, 11 Sep 2017 14:11:56 +0800 | |
4 | Subject: pinctrl/amd: save pin registers over suspend/resume | |
5 | ||
6 | From: Daniel Drake <drake@endlessm.com> | |
7 | ||
8 | commit 79d2c8bede2c93f9432d7da0bc2f76a195c90fc0 upstream. | |
9 | ||
10 | The touchpad in the Asus laptop models X505BA/BP and X542BA/BP is | |
11 | unresponsive after suspend/resume. The following error appears during | |
12 | resume: | |
13 | ||
14 | i2c_hid i2c-ELAN1300:00: failed to reset device. | |
15 | ||
16 | The problem here is that i2c_hid does not notice the interrupt being | |
17 | generated at this point, because the GPIO is no longer configured | |
18 | for interrupts. | |
19 | ||
20 | Fix this by saving pinctrl-amd pin registers during suspend and | |
21 | restoring them at resume time. | |
22 | ||
23 | Based on code from pinctrl-intel. | |
24 | ||
25 | Signed-off-by: Daniel Drake <drake@endlessm.com> | |
26 | Signed-off-by: Linus Walleij <linus.walleij@linaro.org> | |
27 | Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
28 | ||
29 | --- | |
30 | drivers/pinctrl/pinctrl-amd.c | 75 ++++++++++++++++++++++++++++++++++++++++++ | |
31 | drivers/pinctrl/pinctrl-amd.h | 1 | |
32 | 2 files changed, 76 insertions(+) | |
33 | ||
34 | --- a/drivers/pinctrl/pinctrl-amd.c | |
35 | +++ b/drivers/pinctrl/pinctrl-amd.c | |
36 | @@ -32,6 +32,7 @@ | |
37 | #include <linux/pinctrl/pinconf.h> | |
38 | #include <linux/pinctrl/pinconf-generic.h> | |
39 | ||
40 | +#include "core.h" | |
41 | #include "pinctrl-utils.h" | |
42 | #include "pinctrl-amd.h" | |
43 | ||
44 | @@ -712,6 +713,69 @@ static const struct pinconf_ops amd_pinc | |
45 | .pin_config_group_set = amd_pinconf_group_set, | |
46 | }; | |
47 | ||
48 | +#ifdef CONFIG_PM_SLEEP | |
49 | +static bool amd_gpio_should_save(struct amd_gpio *gpio_dev, unsigned int pin) | |
50 | +{ | |
51 | + const struct pin_desc *pd = pin_desc_get(gpio_dev->pctrl, pin); | |
52 | + | |
53 | + if (!pd) | |
54 | + return false; | |
55 | + | |
56 | + /* | |
57 | + * Only restore the pin if it is actually in use by the kernel (or | |
58 | + * by userspace). | |
59 | + */ | |
60 | + if (pd->mux_owner || pd->gpio_owner || | |
61 | + gpiochip_line_is_irq(&gpio_dev->gc, pin)) | |
62 | + return true; | |
63 | + | |
64 | + return false; | |
65 | +} | |
66 | + | |
67 | +int amd_gpio_suspend(struct device *dev) | |
68 | +{ | |
69 | + struct platform_device *pdev = to_platform_device(dev); | |
70 | + struct amd_gpio *gpio_dev = platform_get_drvdata(pdev); | |
71 | + struct pinctrl_desc *desc = gpio_dev->pctrl->desc; | |
72 | + int i; | |
73 | + | |
74 | + for (i = 0; i < desc->npins; i++) { | |
75 | + int pin = desc->pins[i].number; | |
76 | + | |
77 | + if (!amd_gpio_should_save(gpio_dev, pin)) | |
78 | + continue; | |
79 | + | |
80 | + gpio_dev->saved_regs[i] = readl(gpio_dev->base + pin*4); | |
81 | + } | |
82 | + | |
83 | + return 0; | |
84 | +} | |
85 | + | |
86 | +int amd_gpio_resume(struct device *dev) | |
87 | +{ | |
88 | + struct platform_device *pdev = to_platform_device(dev); | |
89 | + struct amd_gpio *gpio_dev = platform_get_drvdata(pdev); | |
90 | + struct pinctrl_desc *desc = gpio_dev->pctrl->desc; | |
91 | + int i; | |
92 | + | |
93 | + for (i = 0; i < desc->npins; i++) { | |
94 | + int pin = desc->pins[i].number; | |
95 | + | |
96 | + if (!amd_gpio_should_save(gpio_dev, pin)) | |
97 | + continue; | |
98 | + | |
99 | + writel(gpio_dev->saved_regs[i], gpio_dev->base + pin*4); | |
100 | + } | |
101 | + | |
102 | + return 0; | |
103 | +} | |
104 | + | |
105 | +static const struct dev_pm_ops amd_gpio_pm_ops = { | |
106 | + SET_LATE_SYSTEM_SLEEP_PM_OPS(amd_gpio_suspend, | |
107 | + amd_gpio_resume) | |
108 | +}; | |
109 | +#endif | |
110 | + | |
111 | static struct pinctrl_desc amd_pinctrl_desc = { | |
112 | .pins = kerncz_pins, | |
113 | .npins = ARRAY_SIZE(kerncz_pins), | |
114 | @@ -751,6 +815,14 @@ static int amd_gpio_probe(struct platfor | |
115 | return -EINVAL; | |
116 | } | |
117 | ||
118 | +#ifdef CONFIG_PM_SLEEP | |
119 | + gpio_dev->saved_regs = devm_kcalloc(&pdev->dev, amd_pinctrl_desc.npins, | |
120 | + sizeof(*gpio_dev->saved_regs), | |
121 | + GFP_KERNEL); | |
122 | + if (!gpio_dev->saved_regs) | |
123 | + return -ENOMEM; | |
124 | +#endif | |
125 | + | |
126 | gpio_dev->pdev = pdev; | |
127 | gpio_dev->gc.direction_input = amd_gpio_direction_input; | |
128 | gpio_dev->gc.direction_output = amd_gpio_direction_output; | |
129 | @@ -839,6 +911,9 @@ static struct platform_driver amd_gpio_d | |
130 | .driver = { | |
131 | .name = "amd_gpio", | |
132 | .acpi_match_table = ACPI_PTR(amd_gpio_acpi_match), | |
133 | +#ifdef CONFIG_PM_SLEEP | |
134 | + .pm = &amd_gpio_pm_ops, | |
135 | +#endif | |
136 | }, | |
137 | .probe = amd_gpio_probe, | |
138 | .remove = amd_gpio_remove, | |
139 | --- a/drivers/pinctrl/pinctrl-amd.h | |
140 | +++ b/drivers/pinctrl/pinctrl-amd.h | |
141 | @@ -95,6 +95,7 @@ struct amd_gpio { | |
142 | struct gpio_chip gc; | |
143 | struct resource *res; | |
144 | struct platform_device *pdev; | |
145 | + u32 *saved_regs; | |
146 | }; | |
147 | ||
148 | /* KERNCZ configuration*/ |