]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/blame - releases/6.6.26/octeontx2-af-fix-pause-frame-configuration-in-gmp-mo.patch
Linux 6.6.26
[thirdparty/kernel/stable-queue.git] / releases / 6.6.26 / octeontx2-af-fix-pause-frame-configuration-in-gmp-mo.patch
CommitLineData
ffc1c2fe
SL
1From 07ed6eb1732d12189da8074b2815552b98c8a30d Mon Sep 17 00:00:00 2001
2From: Sasha Levin <sashal@kernel.org>
3Date: Tue, 26 Mar 2024 10:57:20 +0530
4Subject: Octeontx2-af: fix pause frame configuration in GMP mode
5
6From: Hariprasad Kelam <hkelam@marvell.com>
7
8[ Upstream commit 40d4b4807cadd83fb3f46cc8cd67a945b5b25461 ]
9
10The Octeontx2 MAC block (CGX) has separate data paths (SMU and GMP) for
11different speeds, allowing for efficient data transfer.
12
13The previous patch which added pause frame configuration has a bug due
14to which pause frame feature is not working in GMP mode.
15
16This patch fixes the issue by configurating appropriate registers.
17
18Fixes: f7e086e754fe ("octeontx2-af: Pause frame configuration at cgx")
19Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
20Reviewed-by: Simon Horman <horms@kernel.org>
21Link: https://lore.kernel.org/r/20240326052720.4441-1-hkelam@marvell.com
22Signed-off-by: Paolo Abeni <pabeni@redhat.com>
23Signed-off-by: Sasha Levin <sashal@kernel.org>
24---
25 drivers/net/ethernet/marvell/octeontx2/af/cgx.c | 5 +++++
26 1 file changed, 5 insertions(+)
27
28diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
29index 6c18d3d2442eb..2539c985f695a 100644
30--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
31+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
32@@ -808,6 +808,11 @@ static int cgx_lmac_enadis_pause_frm(void *cgxd, int lmac_id,
33 if (!is_lmac_valid(cgx, lmac_id))
34 return -ENODEV;
35
36+ cfg = cgx_read(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL);
37+ cfg &= ~CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK;
38+ cfg |= rx_pause ? CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK : 0x0;
39+ cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);
40+
41 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL);
42 cfg &= ~CGX_SMUX_RX_FRM_CTL_CTL_BCK;
43 cfg |= rx_pause ? CGX_SMUX_RX_FRM_CTL_CTL_BCK : 0x0;
44--
452.43.0
46