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0be62728 MK |
1 | /* |
2 | * (C) Copyright 2006 | |
3 | * Markus Klotzbuecher, mk@denx.de | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /* | |
25 | * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim) | |
26 | * Extremly Accurate DS3231 Real Time Clock (RTC). | |
27 | * | |
28 | * copied from ds1337.c | |
29 | */ | |
30 | ||
31 | #include <common.h> | |
32 | #include <command.h> | |
33 | #include <rtc.h> | |
34 | #include <i2c.h> | |
35 | ||
36 | #if defined(CONFIG_RTC_DS3231) && (CONFIG_COMMANDS & CFG_CMD_DATE) | |
37 | ||
38 | /*---------------------------------------------------------------------*/ | |
39 | #undef DEBUG_RTC | |
40 | ||
41 | #ifdef DEBUG_RTC | |
42 | #define DEBUGR(fmt,args...) printf(fmt ,##args) | |
43 | #else | |
44 | #define DEBUGR(fmt,args...) | |
45 | #endif | |
46 | /*---------------------------------------------------------------------*/ | |
47 | ||
48 | /* | |
49 | * RTC register addresses | |
50 | */ | |
51 | #define RTC_SEC_REG_ADDR 0x0 | |
52 | #define RTC_MIN_REG_ADDR 0x1 | |
53 | #define RTC_HR_REG_ADDR 0x2 | |
54 | #define RTC_DAY_REG_ADDR 0x3 | |
55 | #define RTC_DATE_REG_ADDR 0x4 | |
56 | #define RTC_MON_REG_ADDR 0x5 | |
57 | #define RTC_YR_REG_ADDR 0x6 | |
58 | #define RTC_CTL_REG_ADDR 0x0e | |
59 | #define RTC_STAT_REG_ADDR 0x0f | |
60 | ||
61 | ||
62 | /* | |
63 | * RTC control register bits | |
64 | */ | |
65 | #define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */ | |
66 | #define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */ | |
67 | #define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */ | |
68 | #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */ | |
69 | #define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */ | |
70 | #define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */ | |
71 | ||
72 | /* | |
73 | * RTC status register bits | |
74 | */ | |
75 | #define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */ | |
76 | #define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */ | |
77 | #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */ | |
78 | ||
79 | ||
80 | static uchar rtc_read (uchar reg); | |
81 | static void rtc_write (uchar reg, uchar val); | |
82 | static uchar bin2bcd (unsigned int n); | |
83 | static unsigned bcd2bin (uchar c); | |
84 | ||
85 | ||
86 | /* | |
87 | * Get the current time from the RTC | |
88 | */ | |
89 | void rtc_get (struct rtc_time *tmp) | |
90 | { | |
91 | uchar sec, min, hour, mday, wday, mon_cent, year, control, status; | |
92 | ||
93 | control = rtc_read (RTC_CTL_REG_ADDR); | |
94 | status = rtc_read (RTC_STAT_REG_ADDR); | |
95 | sec = rtc_read (RTC_SEC_REG_ADDR); | |
96 | min = rtc_read (RTC_MIN_REG_ADDR); | |
97 | hour = rtc_read (RTC_HR_REG_ADDR); | |
98 | wday = rtc_read (RTC_DAY_REG_ADDR); | |
99 | mday = rtc_read (RTC_DATE_REG_ADDR); | |
100 | mon_cent = rtc_read (RTC_MON_REG_ADDR); | |
101 | year = rtc_read (RTC_YR_REG_ADDR); | |
102 | ||
103 | DEBUGR ("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " | |
104 | "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n", | |
105 | year, mon_cent, mday, wday, hour, min, sec, control, status); | |
106 | ||
107 | if (status & RTC_STAT_BIT_OSF) { | |
108 | printf ("### Warning: RTC oscillator has stopped\n"); | |
109 | /* clear the OSF flag */ | |
110 | rtc_write (RTC_STAT_REG_ADDR, | |
111 | rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF); | |
112 | } | |
113 | ||
114 | tmp->tm_sec = bcd2bin (sec & 0x7F); | |
115 | tmp->tm_min = bcd2bin (min & 0x7F); | |
116 | tmp->tm_hour = bcd2bin (hour & 0x3F); | |
117 | tmp->tm_mday = bcd2bin (mday & 0x3F); | |
118 | tmp->tm_mon = bcd2bin (mon_cent & 0x1F); | |
119 | tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900); | |
120 | tmp->tm_wday = bcd2bin ((wday - 1) & 0x07); | |
121 | tmp->tm_yday = 0; | |
122 | tmp->tm_isdst= 0; | |
123 | ||
124 | DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", | |
125 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, | |
126 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); | |
127 | } | |
128 | ||
129 | ||
130 | /* | |
131 | * Set the RTC | |
132 | */ | |
133 | void rtc_set (struct rtc_time *tmp) | |
134 | { | |
135 | uchar century; | |
136 | ||
137 | DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", | |
138 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, | |
139 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); | |
140 | ||
141 | rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100)); | |
142 | ||
143 | century = (tmp->tm_year >= 2000) ? 0x80 : 0; | |
144 | rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century); | |
145 | ||
146 | rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1)); | |
147 | rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday)); | |
148 | rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour)); | |
149 | rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min)); | |
150 | rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec)); | |
151 | } | |
152 | ||
153 | ||
154 | /* | |
155 | * Reset the RTC. We also enable the oscillator output on the | |
156 | * SQW/INTB* pin and program it for 32,768 Hz output. Note that | |
157 | * according to the datasheet, turning on the square wave output | |
158 | * increases the current drain on the backup battery from about | |
159 | * 600 nA to 2uA. | |
160 | */ | |
161 | void rtc_reset (void) | |
162 | { | |
163 | rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2); | |
164 | } | |
165 | ||
166 | ||
167 | /* | |
168 | * Helper functions | |
169 | */ | |
170 | ||
171 | static | |
172 | uchar rtc_read (uchar reg) | |
173 | { | |
174 | return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg)); | |
175 | } | |
176 | ||
177 | ||
178 | static void rtc_write (uchar reg, uchar val) | |
179 | { | |
180 | i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val); | |
181 | } | |
182 | ||
183 | static unsigned bcd2bin (uchar n) | |
184 | { | |
185 | return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F)); | |
186 | } | |
187 | ||
188 | static unsigned char bin2bcd (unsigned int n) | |
189 | { | |
190 | return (((n / 10) << 4) | (n % 10)); | |
191 | } | |
192 | ||
193 | #endif /* (CONFIG_RTC_DS3231) && (CONFIG_COMMANDS & CFG_CMD_DATE) */ |