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4ede028f | 1 | /* |
128ed6a9 | 2 | * Driver for Atmel AC97C |
4ede028f HCE |
3 | * |
4 | * Copyright (C) 2005-2009 Atmel Corporation | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License version 2 as published by | |
8 | * the Free Software Foundation. | |
9 | */ | |
10 | #include <linux/clk.h> | |
11 | #include <linux/delay.h> | |
12 | #include <linux/bitmap.h> | |
128ed6a9 | 13 | #include <linux/device.h> |
4ede028f HCE |
14 | #include <linux/dmaengine.h> |
15 | #include <linux/dma-mapping.h> | |
7177395f | 16 | #include <linux/atmel_pdc.h> |
4ede028f HCE |
17 | #include <linux/init.h> |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/mutex.h> | |
22 | #include <linux/gpio.h> | |
23 | #include <linux/io.h> | |
24 | ||
25 | #include <sound/core.h> | |
26 | #include <sound/initval.h> | |
27 | #include <sound/pcm.h> | |
28 | #include <sound/pcm_params.h> | |
29 | #include <sound/ac97_codec.h> | |
30 | #include <sound/atmel-ac97c.h> | |
31 | #include <sound/memalloc.h> | |
32 | ||
33 | #include <linux/dw_dmac.h> | |
34 | ||
7177395f | 35 | #include <mach/cpu.h> |
7177395f SG |
36 | #include <mach/gpio.h> |
37 | ||
fd76804f HCE |
38 | #ifdef CONFIG_ARCH_AT91 |
39 | #include <mach/hardware.h> | |
40 | #endif | |
41 | ||
4ede028f HCE |
42 | #include "ac97c.h" |
43 | ||
44 | enum { | |
45 | DMA_TX_READY = 0, | |
46 | DMA_RX_READY, | |
47 | DMA_TX_CHAN_PRESENT, | |
48 | DMA_RX_CHAN_PRESENT, | |
49 | }; | |
50 | ||
51 | /* Serialize access to opened variable */ | |
52 | static DEFINE_MUTEX(opened_mutex); | |
53 | ||
54 | struct atmel_ac97c_dma { | |
55 | struct dma_chan *rx_chan; | |
56 | struct dma_chan *tx_chan; | |
57 | }; | |
58 | ||
59 | struct atmel_ac97c { | |
60 | struct clk *pclk; | |
61 | struct platform_device *pdev; | |
62 | struct atmel_ac97c_dma dma; | |
63 | ||
64 | struct snd_pcm_substream *playback_substream; | |
65 | struct snd_pcm_substream *capture_substream; | |
66 | struct snd_card *card; | |
67 | struct snd_pcm *pcm; | |
68 | struct snd_ac97 *ac97; | |
69 | struct snd_ac97_bus *ac97_bus; | |
70 | ||
71 | u64 cur_format; | |
72 | unsigned int cur_rate; | |
73 | unsigned long flags; | |
7177395f | 74 | int playback_period, capture_period; |
4ede028f HCE |
75 | /* Serialize access to opened variable */ |
76 | spinlock_t lock; | |
77 | void __iomem *regs; | |
df163587 | 78 | int irq; |
4ede028f HCE |
79 | int opened; |
80 | int reset_pin; | |
81 | }; | |
82 | ||
83 | #define get_chip(card) ((struct atmel_ac97c *)(card)->private_data) | |
84 | ||
85 | #define ac97c_writel(chip, reg, val) \ | |
86 | __raw_writel((val), (chip)->regs + AC97C_##reg) | |
87 | #define ac97c_readl(chip, reg) \ | |
88 | __raw_readl((chip)->regs + AC97C_##reg) | |
89 | ||
90 | /* This function is called by the DMA driver. */ | |
91 | static void atmel_ac97c_dma_playback_period_done(void *arg) | |
92 | { | |
93 | struct atmel_ac97c *chip = arg; | |
94 | snd_pcm_period_elapsed(chip->playback_substream); | |
95 | } | |
96 | ||
97 | static void atmel_ac97c_dma_capture_period_done(void *arg) | |
98 | { | |
99 | struct atmel_ac97c *chip = arg; | |
100 | snd_pcm_period_elapsed(chip->capture_substream); | |
101 | } | |
102 | ||
103 | static int atmel_ac97c_prepare_dma(struct atmel_ac97c *chip, | |
104 | struct snd_pcm_substream *substream, | |
105 | enum dma_data_direction direction) | |
106 | { | |
107 | struct dma_chan *chan; | |
108 | struct dw_cyclic_desc *cdesc; | |
109 | struct snd_pcm_runtime *runtime = substream->runtime; | |
110 | unsigned long buffer_len, period_len; | |
111 | ||
112 | /* | |
113 | * We don't do DMA on "complex" transfers, i.e. with | |
114 | * non-halfword-aligned buffers or lengths. | |
115 | */ | |
116 | if (runtime->dma_addr & 1 || runtime->buffer_size & 1) { | |
117 | dev_dbg(&chip->pdev->dev, "too complex transfer\n"); | |
118 | return -EINVAL; | |
119 | } | |
120 | ||
121 | if (direction == DMA_TO_DEVICE) | |
122 | chan = chip->dma.tx_chan; | |
123 | else | |
124 | chan = chip->dma.rx_chan; | |
125 | ||
126 | buffer_len = frames_to_bytes(runtime, runtime->buffer_size); | |
127 | period_len = frames_to_bytes(runtime, runtime->period_size); | |
128 | ||
129 | cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len, | |
130 | period_len, direction); | |
131 | if (IS_ERR(cdesc)) { | |
132 | dev_dbg(&chip->pdev->dev, "could not prepare cyclic DMA\n"); | |
133 | return PTR_ERR(cdesc); | |
134 | } | |
135 | ||
136 | if (direction == DMA_TO_DEVICE) { | |
137 | cdesc->period_callback = atmel_ac97c_dma_playback_period_done; | |
138 | set_bit(DMA_TX_READY, &chip->flags); | |
139 | } else { | |
140 | cdesc->period_callback = atmel_ac97c_dma_capture_period_done; | |
141 | set_bit(DMA_RX_READY, &chip->flags); | |
142 | } | |
143 | ||
144 | cdesc->period_callback_param = chip; | |
145 | ||
146 | return 0; | |
147 | } | |
148 | ||
149 | static struct snd_pcm_hardware atmel_ac97c_hw = { | |
150 | .info = (SNDRV_PCM_INFO_MMAP | |
151 | | SNDRV_PCM_INFO_MMAP_VALID | |
152 | | SNDRV_PCM_INFO_INTERLEAVED | |
153 | | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
154 | | SNDRV_PCM_INFO_JOINT_DUPLEX | |
155 | | SNDRV_PCM_INFO_RESUME | |
156 | | SNDRV_PCM_INFO_PAUSE), | |
157 | .formats = (SNDRV_PCM_FMTBIT_S16_BE | |
158 | | SNDRV_PCM_FMTBIT_S16_LE), | |
159 | .rates = (SNDRV_PCM_RATE_CONTINUOUS), | |
160 | .rate_min = 4000, | |
161 | .rate_max = 48000, | |
162 | .channels_min = 1, | |
163 | .channels_max = 2, | |
c42eec0f | 164 | .buffer_bytes_max = 2 * 2 * 64 * 2048, |
4ede028f HCE |
165 | .period_bytes_min = 4096, |
166 | .period_bytes_max = 4096, | |
c42eec0f | 167 | .periods_min = 6, |
4ede028f HCE |
168 | .periods_max = 64, |
169 | }; | |
170 | ||
171 | static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream) | |
172 | { | |
173 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
174 | struct snd_pcm_runtime *runtime = substream->runtime; | |
175 | ||
176 | mutex_lock(&opened_mutex); | |
177 | chip->opened++; | |
178 | runtime->hw = atmel_ac97c_hw; | |
179 | if (chip->cur_rate) { | |
180 | runtime->hw.rate_min = chip->cur_rate; | |
181 | runtime->hw.rate_max = chip->cur_rate; | |
182 | } | |
183 | if (chip->cur_format) | |
184 | runtime->hw.formats = (1ULL << chip->cur_format); | |
185 | mutex_unlock(&opened_mutex); | |
186 | chip->playback_substream = substream; | |
187 | return 0; | |
188 | } | |
189 | ||
190 | static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream) | |
191 | { | |
192 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
193 | struct snd_pcm_runtime *runtime = substream->runtime; | |
194 | ||
195 | mutex_lock(&opened_mutex); | |
196 | chip->opened++; | |
197 | runtime->hw = atmel_ac97c_hw; | |
198 | if (chip->cur_rate) { | |
199 | runtime->hw.rate_min = chip->cur_rate; | |
200 | runtime->hw.rate_max = chip->cur_rate; | |
201 | } | |
202 | if (chip->cur_format) | |
203 | runtime->hw.formats = (1ULL << chip->cur_format); | |
204 | mutex_unlock(&opened_mutex); | |
205 | chip->capture_substream = substream; | |
206 | return 0; | |
207 | } | |
208 | ||
209 | static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream) | |
210 | { | |
211 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
212 | ||
213 | mutex_lock(&opened_mutex); | |
214 | chip->opened--; | |
215 | if (!chip->opened) { | |
216 | chip->cur_rate = 0; | |
217 | chip->cur_format = 0; | |
218 | } | |
219 | mutex_unlock(&opened_mutex); | |
220 | ||
221 | chip->playback_substream = NULL; | |
222 | ||
223 | return 0; | |
224 | } | |
225 | ||
226 | static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream) | |
227 | { | |
228 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
229 | ||
230 | mutex_lock(&opened_mutex); | |
231 | chip->opened--; | |
232 | if (!chip->opened) { | |
233 | chip->cur_rate = 0; | |
234 | chip->cur_format = 0; | |
235 | } | |
236 | mutex_unlock(&opened_mutex); | |
237 | ||
238 | chip->capture_substream = NULL; | |
239 | ||
240 | return 0; | |
241 | } | |
242 | ||
243 | static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream, | |
244 | struct snd_pcm_hw_params *hw_params) | |
245 | { | |
246 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
247 | int retval; | |
248 | ||
249 | retval = snd_pcm_lib_malloc_pages(substream, | |
250 | params_buffer_bytes(hw_params)); | |
251 | if (retval < 0) | |
252 | return retval; | |
253 | /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */ | |
7177395f SG |
254 | if (cpu_is_at32ap7000()) { |
255 | /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */ | |
256 | if (retval == 1) | |
257 | if (test_and_clear_bit(DMA_TX_READY, &chip->flags)) | |
258 | dw_dma_cyclic_free(chip->dma.tx_chan); | |
259 | } | |
4ede028f HCE |
260 | /* Set restrictions to params. */ |
261 | mutex_lock(&opened_mutex); | |
262 | chip->cur_rate = params_rate(hw_params); | |
263 | chip->cur_format = params_format(hw_params); | |
264 | mutex_unlock(&opened_mutex); | |
265 | ||
266 | return retval; | |
267 | } | |
268 | ||
269 | static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream, | |
270 | struct snd_pcm_hw_params *hw_params) | |
271 | { | |
272 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
273 | int retval; | |
274 | ||
275 | retval = snd_pcm_lib_malloc_pages(substream, | |
276 | params_buffer_bytes(hw_params)); | |
277 | if (retval < 0) | |
278 | return retval; | |
279 | /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */ | |
7177395f SG |
280 | if (cpu_is_at32ap7000()) { |
281 | if (retval < 0) | |
282 | return retval; | |
283 | /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */ | |
284 | if (retval == 1) | |
285 | if (test_and_clear_bit(DMA_RX_READY, &chip->flags)) | |
286 | dw_dma_cyclic_free(chip->dma.rx_chan); | |
287 | } | |
4ede028f HCE |
288 | |
289 | /* Set restrictions to params. */ | |
290 | mutex_lock(&opened_mutex); | |
291 | chip->cur_rate = params_rate(hw_params); | |
292 | chip->cur_format = params_format(hw_params); | |
293 | mutex_unlock(&opened_mutex); | |
294 | ||
295 | return retval; | |
296 | } | |
297 | ||
298 | static int atmel_ac97c_playback_hw_free(struct snd_pcm_substream *substream) | |
299 | { | |
300 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
7177395f SG |
301 | if (cpu_is_at32ap7000()) { |
302 | if (test_and_clear_bit(DMA_TX_READY, &chip->flags)) | |
303 | dw_dma_cyclic_free(chip->dma.tx_chan); | |
304 | } | |
4ede028f HCE |
305 | return snd_pcm_lib_free_pages(substream); |
306 | } | |
307 | ||
308 | static int atmel_ac97c_capture_hw_free(struct snd_pcm_substream *substream) | |
309 | { | |
310 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
7177395f SG |
311 | if (cpu_is_at32ap7000()) { |
312 | if (test_and_clear_bit(DMA_RX_READY, &chip->flags)) | |
313 | dw_dma_cyclic_free(chip->dma.rx_chan); | |
314 | } | |
4ede028f HCE |
315 | return snd_pcm_lib_free_pages(substream); |
316 | } | |
317 | ||
318 | static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream) | |
319 | { | |
320 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
321 | struct snd_pcm_runtime *runtime = substream->runtime; | |
7177395f | 322 | int block_size = frames_to_bytes(runtime, runtime->period_size); |
128ed6a9 | 323 | unsigned long word = ac97c_readl(chip, OCA); |
4ede028f HCE |
324 | int retval; |
325 | ||
7177395f | 326 | chip->playback_period = 0; |
128ed6a9 HCE |
327 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); |
328 | ||
4ede028f HCE |
329 | /* assign channels to AC97C channel A */ |
330 | switch (runtime->channels) { | |
331 | case 1: | |
332 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A); | |
333 | break; | |
334 | case 2: | |
335 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A) | |
336 | | AC97C_CH_ASSIGN(PCM_RIGHT, A); | |
337 | break; | |
338 | default: | |
339 | /* TODO: support more than two channels */ | |
340 | return -EINVAL; | |
4ede028f HCE |
341 | } |
342 | ac97c_writel(chip, OCA, word); | |
343 | ||
344 | /* configure sample format and size */ | |
ec2755a9 SG |
345 | word = ac97c_readl(chip, CAMR); |
346 | if (chip->opened <= 1) | |
347 | word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
348 | else | |
349 | word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
4ede028f HCE |
350 | |
351 | switch (runtime->format) { | |
352 | case SNDRV_PCM_FORMAT_S16_LE: | |
7177395f SG |
353 | if (cpu_is_at32ap7000()) |
354 | word |= AC97C_CMR_CEM_LITTLE; | |
4ede028f HCE |
355 | break; |
356 | case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ | |
4ede028f HCE |
357 | word &= ~(AC97C_CMR_CEM_LITTLE); |
358 | break; | |
128ed6a9 HCE |
359 | default: |
360 | word = ac97c_readl(chip, OCA); | |
361 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); | |
362 | ac97c_writel(chip, OCA, word); | |
363 | return -EINVAL; | |
4ede028f HCE |
364 | } |
365 | ||
df163587 HCE |
366 | /* Enable underrun interrupt on channel A */ |
367 | word |= AC97C_CSR_UNRUN; | |
368 | ||
4ede028f HCE |
369 | ac97c_writel(chip, CAMR, word); |
370 | ||
df163587 HCE |
371 | /* Enable channel A event interrupt */ |
372 | word = ac97c_readl(chip, IMR); | |
373 | word |= AC97C_SR_CAEVT; | |
374 | ac97c_writel(chip, IER, word); | |
375 | ||
4ede028f HCE |
376 | /* set variable rate if needed */ |
377 | if (runtime->rate != 48000) { | |
378 | word = ac97c_readl(chip, MR); | |
379 | word |= AC97C_MR_VRA; | |
380 | ac97c_writel(chip, MR, word); | |
381 | } else { | |
382 | word = ac97c_readl(chip, MR); | |
383 | word &= ~(AC97C_MR_VRA); | |
384 | ac97c_writel(chip, MR, word); | |
385 | } | |
386 | ||
387 | retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, | |
388 | runtime->rate); | |
389 | if (retval) | |
390 | dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n", | |
391 | runtime->rate); | |
392 | ||
7177395f SG |
393 | if (cpu_is_at32ap7000()) { |
394 | if (!test_bit(DMA_TX_READY, &chip->flags)) | |
395 | retval = atmel_ac97c_prepare_dma(chip, substream, | |
396 | DMA_TO_DEVICE); | |
397 | } else { | |
398 | /* Initialize and start the PDC */ | |
399 | writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR); | |
400 | writel(block_size / 2, chip->regs + ATMEL_PDC_TCR); | |
401 | writel(runtime->dma_addr + block_size, | |
402 | chip->regs + ATMEL_PDC_TNPR); | |
403 | writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR); | |
404 | } | |
4ede028f HCE |
405 | |
406 | return retval; | |
407 | } | |
408 | ||
409 | static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream) | |
410 | { | |
411 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
412 | struct snd_pcm_runtime *runtime = substream->runtime; | |
7177395f | 413 | int block_size = frames_to_bytes(runtime, runtime->period_size); |
128ed6a9 | 414 | unsigned long word = ac97c_readl(chip, ICA); |
4ede028f HCE |
415 | int retval; |
416 | ||
7177395f | 417 | chip->capture_period = 0; |
128ed6a9 HCE |
418 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); |
419 | ||
4ede028f HCE |
420 | /* assign channels to AC97C channel A */ |
421 | switch (runtime->channels) { | |
422 | case 1: | |
423 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A); | |
424 | break; | |
425 | case 2: | |
426 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A) | |
427 | | AC97C_CH_ASSIGN(PCM_RIGHT, A); | |
428 | break; | |
429 | default: | |
430 | /* TODO: support more than two channels */ | |
431 | return -EINVAL; | |
4ede028f HCE |
432 | } |
433 | ac97c_writel(chip, ICA, word); | |
434 | ||
435 | /* configure sample format and size */ | |
ec2755a9 SG |
436 | word = ac97c_readl(chip, CAMR); |
437 | if (chip->opened <= 1) | |
438 | word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
439 | else | |
440 | word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
4ede028f HCE |
441 | |
442 | switch (runtime->format) { | |
443 | case SNDRV_PCM_FORMAT_S16_LE: | |
7177395f SG |
444 | if (cpu_is_at32ap7000()) |
445 | word |= AC97C_CMR_CEM_LITTLE; | |
4ede028f HCE |
446 | break; |
447 | case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ | |
4ede028f HCE |
448 | word &= ~(AC97C_CMR_CEM_LITTLE); |
449 | break; | |
128ed6a9 HCE |
450 | default: |
451 | word = ac97c_readl(chip, ICA); | |
452 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); | |
453 | ac97c_writel(chip, ICA, word); | |
454 | return -EINVAL; | |
4ede028f HCE |
455 | } |
456 | ||
df163587 HCE |
457 | /* Enable overrun interrupt on channel A */ |
458 | word |= AC97C_CSR_OVRUN; | |
459 | ||
4ede028f HCE |
460 | ac97c_writel(chip, CAMR, word); |
461 | ||
df163587 HCE |
462 | /* Enable channel A event interrupt */ |
463 | word = ac97c_readl(chip, IMR); | |
464 | word |= AC97C_SR_CAEVT; | |
465 | ac97c_writel(chip, IER, word); | |
466 | ||
4ede028f HCE |
467 | /* set variable rate if needed */ |
468 | if (runtime->rate != 48000) { | |
469 | word = ac97c_readl(chip, MR); | |
470 | word |= AC97C_MR_VRA; | |
471 | ac97c_writel(chip, MR, word); | |
472 | } else { | |
473 | word = ac97c_readl(chip, MR); | |
474 | word &= ~(AC97C_MR_VRA); | |
475 | ac97c_writel(chip, MR, word); | |
476 | } | |
477 | ||
478 | retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, | |
479 | runtime->rate); | |
480 | if (retval) | |
481 | dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n", | |
482 | runtime->rate); | |
483 | ||
7177395f SG |
484 | if (cpu_is_at32ap7000()) { |
485 | if (!test_bit(DMA_RX_READY, &chip->flags)) | |
486 | retval = atmel_ac97c_prepare_dma(chip, substream, | |
487 | DMA_FROM_DEVICE); | |
488 | } else { | |
489 | /* Initialize and start the PDC */ | |
490 | writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR); | |
491 | writel(block_size / 2, chip->regs + ATMEL_PDC_RCR); | |
492 | writel(runtime->dma_addr + block_size, | |
493 | chip->regs + ATMEL_PDC_RNPR); | |
494 | writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR); | |
495 | } | |
4ede028f HCE |
496 | |
497 | return retval; | |
498 | } | |
499 | ||
500 | static int | |
501 | atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd) | |
502 | { | |
503 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
7177395f | 504 | unsigned long camr, ptcr = 0; |
4ede028f HCE |
505 | int retval = 0; |
506 | ||
507 | camr = ac97c_readl(chip, CAMR); | |
508 | ||
509 | switch (cmd) { | |
510 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */ | |
511 | case SNDRV_PCM_TRIGGER_RESUME: /* fall through */ | |
512 | case SNDRV_PCM_TRIGGER_START: | |
7177395f SG |
513 | if (cpu_is_at32ap7000()) { |
514 | retval = dw_dma_cyclic_start(chip->dma.tx_chan); | |
515 | if (retval) | |
516 | goto out; | |
517 | } else { | |
518 | ptcr = ATMEL_PDC_TXTEN; | |
519 | } | |
ec2755a9 | 520 | camr |= AC97C_CMR_CENA | AC97C_CSR_ENDTX; |
4ede028f HCE |
521 | break; |
522 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */ | |
523 | case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */ | |
524 | case SNDRV_PCM_TRIGGER_STOP: | |
7177395f SG |
525 | if (cpu_is_at32ap7000()) |
526 | dw_dma_cyclic_stop(chip->dma.tx_chan); | |
527 | else | |
528 | ptcr |= ATMEL_PDC_TXTDIS; | |
4ede028f HCE |
529 | if (chip->opened <= 1) |
530 | camr &= ~AC97C_CMR_CENA; | |
531 | break; | |
532 | default: | |
533 | retval = -EINVAL; | |
534 | goto out; | |
535 | } | |
536 | ||
537 | ac97c_writel(chip, CAMR, camr); | |
7177395f SG |
538 | if (!cpu_is_at32ap7000()) |
539 | writel(ptcr, chip->regs + ATMEL_PDC_PTCR); | |
4ede028f HCE |
540 | out: |
541 | return retval; | |
542 | } | |
543 | ||
544 | static int | |
545 | atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd) | |
546 | { | |
547 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
7177395f | 548 | unsigned long camr, ptcr = 0; |
4ede028f HCE |
549 | int retval = 0; |
550 | ||
551 | camr = ac97c_readl(chip, CAMR); | |
7177395f | 552 | ptcr = readl(chip->regs + ATMEL_PDC_PTSR); |
4ede028f HCE |
553 | |
554 | switch (cmd) { | |
555 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */ | |
556 | case SNDRV_PCM_TRIGGER_RESUME: /* fall through */ | |
557 | case SNDRV_PCM_TRIGGER_START: | |
7177395f SG |
558 | if (cpu_is_at32ap7000()) { |
559 | retval = dw_dma_cyclic_start(chip->dma.rx_chan); | |
560 | if (retval) | |
561 | goto out; | |
562 | } else { | |
563 | ptcr = ATMEL_PDC_RXTEN; | |
564 | } | |
ec2755a9 | 565 | camr |= AC97C_CMR_CENA | AC97C_CSR_ENDRX; |
4ede028f HCE |
566 | break; |
567 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */ | |
568 | case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */ | |
569 | case SNDRV_PCM_TRIGGER_STOP: | |
7177395f SG |
570 | if (cpu_is_at32ap7000()) |
571 | dw_dma_cyclic_stop(chip->dma.rx_chan); | |
572 | else | |
573 | ptcr |= (ATMEL_PDC_RXTDIS); | |
4ede028f HCE |
574 | if (chip->opened <= 1) |
575 | camr &= ~AC97C_CMR_CENA; | |
576 | break; | |
577 | default: | |
578 | retval = -EINVAL; | |
579 | break; | |
580 | } | |
581 | ||
582 | ac97c_writel(chip, CAMR, camr); | |
7177395f SG |
583 | if (!cpu_is_at32ap7000()) |
584 | writel(ptcr, chip->regs + ATMEL_PDC_PTCR); | |
4ede028f HCE |
585 | out: |
586 | return retval; | |
587 | } | |
588 | ||
589 | static snd_pcm_uframes_t | |
590 | atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream) | |
591 | { | |
592 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
593 | struct snd_pcm_runtime *runtime = substream->runtime; | |
594 | snd_pcm_uframes_t frames; | |
595 | unsigned long bytes; | |
596 | ||
7177395f SG |
597 | if (cpu_is_at32ap7000()) |
598 | bytes = dw_dma_get_src_addr(chip->dma.tx_chan); | |
599 | else | |
600 | bytes = readl(chip->regs + ATMEL_PDC_TPR); | |
4ede028f HCE |
601 | bytes -= runtime->dma_addr; |
602 | ||
603 | frames = bytes_to_frames(runtime, bytes); | |
604 | if (frames >= runtime->buffer_size) | |
605 | frames -= runtime->buffer_size; | |
606 | return frames; | |
607 | } | |
608 | ||
609 | static snd_pcm_uframes_t | |
610 | atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream) | |
611 | { | |
612 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
613 | struct snd_pcm_runtime *runtime = substream->runtime; | |
614 | snd_pcm_uframes_t frames; | |
615 | unsigned long bytes; | |
616 | ||
7177395f SG |
617 | if (cpu_is_at32ap7000()) |
618 | bytes = dw_dma_get_dst_addr(chip->dma.rx_chan); | |
619 | else | |
620 | bytes = readl(chip->regs + ATMEL_PDC_RPR); | |
4ede028f HCE |
621 | bytes -= runtime->dma_addr; |
622 | ||
623 | frames = bytes_to_frames(runtime, bytes); | |
624 | if (frames >= runtime->buffer_size) | |
625 | frames -= runtime->buffer_size; | |
626 | return frames; | |
627 | } | |
628 | ||
629 | static struct snd_pcm_ops atmel_ac97_playback_ops = { | |
630 | .open = atmel_ac97c_playback_open, | |
631 | .close = atmel_ac97c_playback_close, | |
632 | .ioctl = snd_pcm_lib_ioctl, | |
633 | .hw_params = atmel_ac97c_playback_hw_params, | |
634 | .hw_free = atmel_ac97c_playback_hw_free, | |
635 | .prepare = atmel_ac97c_playback_prepare, | |
636 | .trigger = atmel_ac97c_playback_trigger, | |
637 | .pointer = atmel_ac97c_playback_pointer, | |
638 | }; | |
639 | ||
640 | static struct snd_pcm_ops atmel_ac97_capture_ops = { | |
641 | .open = atmel_ac97c_capture_open, | |
642 | .close = atmel_ac97c_capture_close, | |
643 | .ioctl = snd_pcm_lib_ioctl, | |
644 | .hw_params = atmel_ac97c_capture_hw_params, | |
645 | .hw_free = atmel_ac97c_capture_hw_free, | |
646 | .prepare = atmel_ac97c_capture_prepare, | |
647 | .trigger = atmel_ac97c_capture_trigger, | |
648 | .pointer = atmel_ac97c_capture_pointer, | |
649 | }; | |
650 | ||
df163587 HCE |
651 | static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev) |
652 | { | |
653 | struct atmel_ac97c *chip = (struct atmel_ac97c *)dev; | |
654 | irqreturn_t retval = IRQ_NONE; | |
655 | u32 sr = ac97c_readl(chip, SR); | |
656 | u32 casr = ac97c_readl(chip, CASR); | |
657 | u32 cosr = ac97c_readl(chip, COSR); | |
7177395f | 658 | u32 camr = ac97c_readl(chip, CAMR); |
df163587 HCE |
659 | |
660 | if (sr & AC97C_SR_CAEVT) { | |
7177395f SG |
661 | struct snd_pcm_runtime *runtime; |
662 | int offset, next_period, block_size; | |
f5341163 | 663 | dev_dbg(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n", |
df163587 HCE |
664 | casr & AC97C_CSR_OVRUN ? " OVRUN" : "", |
665 | casr & AC97C_CSR_RXRDY ? " RXRDY" : "", | |
666 | casr & AC97C_CSR_UNRUN ? " UNRUN" : "", | |
667 | casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "", | |
668 | casr & AC97C_CSR_TXRDY ? " TXRDY" : "", | |
669 | !casr ? " NONE" : ""); | |
7177395f SG |
670 | if (!cpu_is_at32ap7000()) { |
671 | if ((casr & camr) & AC97C_CSR_ENDTX) { | |
672 | runtime = chip->playback_substream->runtime; | |
673 | block_size = frames_to_bytes(runtime, | |
674 | runtime->period_size); | |
675 | chip->playback_period++; | |
676 | ||
677 | if (chip->playback_period == runtime->periods) | |
678 | chip->playback_period = 0; | |
679 | next_period = chip->playback_period + 1; | |
680 | if (next_period == runtime->periods) | |
681 | next_period = 0; | |
682 | ||
683 | offset = block_size * next_period; | |
684 | ||
685 | writel(runtime->dma_addr + offset, | |
686 | chip->regs + ATMEL_PDC_TNPR); | |
687 | writel(block_size / 2, | |
688 | chip->regs + ATMEL_PDC_TNCR); | |
689 | ||
690 | snd_pcm_period_elapsed( | |
691 | chip->playback_substream); | |
692 | } | |
693 | if ((casr & camr) & AC97C_CSR_ENDRX) { | |
694 | runtime = chip->capture_substream->runtime; | |
695 | block_size = frames_to_bytes(runtime, | |
696 | runtime->period_size); | |
697 | chip->capture_period++; | |
698 | ||
699 | if (chip->capture_period == runtime->periods) | |
700 | chip->capture_period = 0; | |
701 | next_period = chip->capture_period + 1; | |
702 | if (next_period == runtime->periods) | |
703 | next_period = 0; | |
704 | ||
705 | offset = block_size * next_period; | |
706 | ||
707 | writel(runtime->dma_addr + offset, | |
708 | chip->regs + ATMEL_PDC_RNPR); | |
709 | writel(block_size / 2, | |
710 | chip->regs + ATMEL_PDC_RNCR); | |
711 | snd_pcm_period_elapsed(chip->capture_substream); | |
712 | } | |
713 | } | |
df163587 HCE |
714 | retval = IRQ_HANDLED; |
715 | } | |
716 | ||
717 | if (sr & AC97C_SR_COEVT) { | |
718 | dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n", | |
719 | cosr & AC97C_CSR_OVRUN ? " OVRUN" : "", | |
720 | cosr & AC97C_CSR_RXRDY ? " RXRDY" : "", | |
721 | cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "", | |
722 | cosr & AC97C_CSR_TXRDY ? " TXRDY" : "", | |
723 | !cosr ? " NONE" : ""); | |
724 | retval = IRQ_HANDLED; | |
725 | } | |
726 | ||
727 | if (retval == IRQ_NONE) { | |
728 | dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x " | |
729 | "casr 0x%08x cosr 0x%08x\n", sr, casr, cosr); | |
730 | } | |
731 | ||
732 | return retval; | |
733 | } | |
734 | ||
7177395f SG |
735 | static struct ac97_pcm at91_ac97_pcm_defs[] __devinitdata = { |
736 | /* Playback */ | |
737 | { | |
738 | .exclusive = 1, | |
739 | .r = { { | |
740 | .slots = ((1 << AC97_SLOT_PCM_LEFT) | |
741 | | (1 << AC97_SLOT_PCM_RIGHT)), | |
742 | } }, | |
743 | }, | |
744 | /* PCM in */ | |
745 | { | |
746 | .stream = 1, | |
747 | .exclusive = 1, | |
748 | .r = { { | |
749 | .slots = ((1 << AC97_SLOT_PCM_LEFT) | |
750 | | (1 << AC97_SLOT_PCM_RIGHT)), | |
751 | } } | |
752 | }, | |
753 | /* Mic in */ | |
754 | { | |
755 | .stream = 1, | |
756 | .exclusive = 1, | |
757 | .r = { { | |
758 | .slots = (1<<AC97_SLOT_MIC), | |
759 | } } | |
760 | }, | |
761 | }; | |
762 | ||
4ede028f HCE |
763 | static int __devinit atmel_ac97c_pcm_new(struct atmel_ac97c *chip) |
764 | { | |
765 | struct snd_pcm *pcm; | |
766 | struct snd_pcm_hardware hw = atmel_ac97c_hw; | |
7177395f | 767 | int capture, playback, retval, err; |
4ede028f HCE |
768 | |
769 | capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
770 | playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags); | |
771 | ||
7177395f SG |
772 | if (!cpu_is_at32ap7000()) { |
773 | err = snd_ac97_pcm_assign(chip->ac97_bus, | |
774 | ARRAY_SIZE(at91_ac97_pcm_defs), | |
775 | at91_ac97_pcm_defs); | |
776 | if (err) | |
777 | return err; | |
778 | } | |
4ede028f HCE |
779 | retval = snd_pcm_new(chip->card, chip->card->shortname, |
780 | chip->pdev->id, playback, capture, &pcm); | |
781 | if (retval) | |
782 | return retval; | |
783 | ||
784 | if (capture) | |
785 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, | |
786 | &atmel_ac97_capture_ops); | |
787 | if (playback) | |
788 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, | |
789 | &atmel_ac97_playback_ops); | |
790 | ||
791 | retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
792 | &chip->pdev->dev, hw.periods_min * hw.period_bytes_min, | |
793 | hw.buffer_bytes_max); | |
794 | if (retval) | |
795 | return retval; | |
796 | ||
797 | pcm->private_data = chip; | |
798 | pcm->info_flags = 0; | |
799 | strcpy(pcm->name, chip->card->shortname); | |
800 | chip->pcm = pcm; | |
801 | ||
802 | return 0; | |
803 | } | |
804 | ||
805 | static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip) | |
806 | { | |
807 | struct snd_ac97_template template; | |
808 | memset(&template, 0, sizeof(template)); | |
809 | template.private_data = chip; | |
810 | return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97); | |
811 | } | |
812 | ||
813 | static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg, | |
814 | unsigned short val) | |
815 | { | |
816 | struct atmel_ac97c *chip = get_chip(ac97); | |
817 | unsigned long word; | |
818 | int timeout = 40; | |
819 | ||
820 | word = (reg & 0x7f) << 16 | val; | |
821 | ||
822 | do { | |
823 | if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) { | |
824 | ac97c_writel(chip, COTHR, word); | |
825 | return; | |
826 | } | |
827 | udelay(1); | |
828 | } while (--timeout); | |
829 | ||
830 | dev_dbg(&chip->pdev->dev, "codec write timeout\n"); | |
831 | } | |
832 | ||
833 | static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97, | |
834 | unsigned short reg) | |
835 | { | |
836 | struct atmel_ac97c *chip = get_chip(ac97); | |
837 | unsigned long word; | |
838 | int timeout = 40; | |
839 | int write = 10; | |
840 | ||
841 | word = (0x80 | (reg & 0x7f)) << 16; | |
842 | ||
843 | if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) | |
844 | ac97c_readl(chip, CORHR); | |
845 | ||
846 | retry_write: | |
847 | timeout = 40; | |
848 | ||
849 | do { | |
850 | if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) { | |
851 | ac97c_writel(chip, COTHR, word); | |
852 | goto read_reg; | |
853 | } | |
854 | udelay(10); | |
855 | } while (--timeout); | |
856 | ||
857 | if (!--write) | |
858 | goto timed_out; | |
859 | goto retry_write; | |
860 | ||
861 | read_reg: | |
862 | do { | |
863 | if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) { | |
864 | unsigned short val = ac97c_readl(chip, CORHR); | |
865 | return val; | |
866 | } | |
867 | udelay(10); | |
868 | } while (--timeout); | |
869 | ||
870 | if (!--write) | |
871 | goto timed_out; | |
872 | goto retry_write; | |
873 | ||
874 | timed_out: | |
875 | dev_dbg(&chip->pdev->dev, "codec read timeout\n"); | |
876 | return 0xffff; | |
877 | } | |
878 | ||
879 | static bool filter(struct dma_chan *chan, void *slave) | |
880 | { | |
881 | struct dw_dma_slave *dws = slave; | |
882 | ||
883 | if (dws->dma_dev == chan->device->dev) { | |
884 | chan->private = dws; | |
885 | return true; | |
886 | } else | |
887 | return false; | |
888 | } | |
889 | ||
890 | static void atmel_ac97c_reset(struct atmel_ac97c *chip) | |
891 | { | |
81baf3a7 HCE |
892 | ac97c_writel(chip, MR, 0); |
893 | ac97c_writel(chip, MR, AC97C_MR_ENA); | |
894 | ac97c_writel(chip, CAMR, 0); | |
895 | ac97c_writel(chip, COMR, 0); | |
4ede028f HCE |
896 | |
897 | if (gpio_is_valid(chip->reset_pin)) { | |
898 | gpio_set_value(chip->reset_pin, 0); | |
899 | /* AC97 v2.2 specifications says minimum 1 us. */ | |
81baf3a7 | 900 | udelay(2); |
4ede028f HCE |
901 | gpio_set_value(chip->reset_pin, 1); |
902 | } | |
4ede028f HCE |
903 | } |
904 | ||
905 | static int __devinit atmel_ac97c_probe(struct platform_device *pdev) | |
906 | { | |
907 | struct snd_card *card; | |
908 | struct atmel_ac97c *chip; | |
909 | struct resource *regs; | |
910 | struct ac97c_platform_data *pdata; | |
911 | struct clk *pclk; | |
912 | static struct snd_ac97_bus_ops ops = { | |
913 | .write = atmel_ac97c_write, | |
914 | .read = atmel_ac97c_read, | |
915 | }; | |
916 | int retval; | |
df163587 | 917 | int irq; |
4ede028f HCE |
918 | |
919 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
920 | if (!regs) { | |
921 | dev_dbg(&pdev->dev, "no memory resource\n"); | |
922 | return -ENXIO; | |
923 | } | |
924 | ||
925 | pdata = pdev->dev.platform_data; | |
926 | if (!pdata) { | |
927 | dev_dbg(&pdev->dev, "no platform data\n"); | |
928 | return -ENXIO; | |
929 | } | |
930 | ||
df163587 HCE |
931 | irq = platform_get_irq(pdev, 0); |
932 | if (irq < 0) { | |
933 | dev_dbg(&pdev->dev, "could not get irq\n"); | |
934 | return -ENXIO; | |
935 | } | |
936 | ||
7177395f SG |
937 | if (cpu_is_at32ap7000()) { |
938 | pclk = clk_get(&pdev->dev, "pclk"); | |
939 | } else { | |
940 | pclk = clk_get(&pdev->dev, "ac97_clk"); | |
941 | } | |
942 | ||
4ede028f HCE |
943 | if (IS_ERR(pclk)) { |
944 | dev_dbg(&pdev->dev, "no peripheral clock\n"); | |
945 | return PTR_ERR(pclk); | |
946 | } | |
947 | clk_enable(pclk); | |
948 | ||
949 | retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, | |
950 | THIS_MODULE, sizeof(struct atmel_ac97c), &card); | |
951 | if (retval) { | |
952 | dev_dbg(&pdev->dev, "could not create sound card device\n"); | |
953 | goto err_snd_card_new; | |
954 | } | |
955 | ||
956 | chip = get_chip(card); | |
957 | ||
df163587 HCE |
958 | retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip); |
959 | if (retval) { | |
960 | dev_dbg(&pdev->dev, "unable to request irq %d\n", irq); | |
961 | goto err_request_irq; | |
962 | } | |
963 | chip->irq = irq; | |
964 | ||
4ede028f HCE |
965 | spin_lock_init(&chip->lock); |
966 | ||
967 | strcpy(card->driver, "Atmel AC97C"); | |
968 | strcpy(card->shortname, "Atmel AC97C"); | |
969 | sprintf(card->longname, "Atmel AC97 controller"); | |
970 | ||
971 | chip->card = card; | |
972 | chip->pclk = pclk; | |
973 | chip->pdev = pdev; | |
974 | chip->regs = ioremap(regs->start, regs->end - regs->start + 1); | |
975 | ||
976 | if (!chip->regs) { | |
977 | dev_dbg(&pdev->dev, "could not remap register memory\n"); | |
978 | goto err_ioremap; | |
979 | } | |
980 | ||
981 | if (gpio_is_valid(pdata->reset_pin)) { | |
982 | if (gpio_request(pdata->reset_pin, "reset_pin")) { | |
983 | dev_dbg(&pdev->dev, "reset pin not available\n"); | |
984 | chip->reset_pin = -ENODEV; | |
985 | } else { | |
986 | gpio_direction_output(pdata->reset_pin, 1); | |
987 | chip->reset_pin = pdata->reset_pin; | |
988 | } | |
989 | } | |
990 | ||
991 | snd_card_set_dev(card, &pdev->dev); | |
992 | ||
81baf3a7 HCE |
993 | atmel_ac97c_reset(chip); |
994 | ||
df163587 HCE |
995 | /* Enable overrun interrupt from codec channel */ |
996 | ac97c_writel(chip, COMR, AC97C_CSR_OVRUN); | |
997 | ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT); | |
998 | ||
4ede028f HCE |
999 | retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus); |
1000 | if (retval) { | |
1001 | dev_dbg(&pdev->dev, "could not register on ac97 bus\n"); | |
1002 | goto err_ac97_bus; | |
1003 | } | |
1004 | ||
4ede028f HCE |
1005 | retval = atmel_ac97c_mixer_new(chip); |
1006 | if (retval) { | |
1007 | dev_dbg(&pdev->dev, "could not register ac97 mixer\n"); | |
1008 | goto err_ac97_bus; | |
1009 | } | |
1010 | ||
7177395f SG |
1011 | if (cpu_is_at32ap7000()) { |
1012 | if (pdata->rx_dws.dma_dev) { | |
1013 | struct dw_dma_slave *dws = &pdata->rx_dws; | |
1014 | dma_cap_mask_t mask; | |
4ede028f | 1015 | |
7177395f | 1016 | dws->rx_reg = regs->start + AC97C_CARHR + 2; |
4ede028f | 1017 | |
7177395f SG |
1018 | dma_cap_zero(mask); |
1019 | dma_cap_set(DMA_SLAVE, mask); | |
4ede028f | 1020 | |
7177395f SG |
1021 | chip->dma.rx_chan = dma_request_channel(mask, filter, |
1022 | dws); | |
4ede028f | 1023 | |
7177395f | 1024 | dev_info(&chip->pdev->dev, "using %s for DMA RX\n", |
23572856 | 1025 | dev_name(&chip->dma.rx_chan->dev->device)); |
7177395f SG |
1026 | set_bit(DMA_RX_CHAN_PRESENT, &chip->flags); |
1027 | } | |
4ede028f | 1028 | |
7177395f SG |
1029 | if (pdata->tx_dws.dma_dev) { |
1030 | struct dw_dma_slave *dws = &pdata->tx_dws; | |
1031 | dma_cap_mask_t mask; | |
4ede028f | 1032 | |
7177395f | 1033 | dws->tx_reg = regs->start + AC97C_CATHR + 2; |
4ede028f | 1034 | |
7177395f SG |
1035 | dma_cap_zero(mask); |
1036 | dma_cap_set(DMA_SLAVE, mask); | |
4ede028f | 1037 | |
7177395f SG |
1038 | chip->dma.tx_chan = dma_request_channel(mask, filter, |
1039 | dws); | |
4ede028f | 1040 | |
7177395f | 1041 | dev_info(&chip->pdev->dev, "using %s for DMA TX\n", |
23572856 | 1042 | dev_name(&chip->dma.tx_chan->dev->device)); |
7177395f SG |
1043 | set_bit(DMA_TX_CHAN_PRESENT, &chip->flags); |
1044 | } | |
4ede028f | 1045 | |
7177395f SG |
1046 | if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) && |
1047 | !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) { | |
1048 | dev_dbg(&pdev->dev, "DMA not available\n"); | |
1049 | retval = -ENODEV; | |
1050 | goto err_dma; | |
1051 | } | |
1052 | } else { | |
1053 | /* Just pretend that we have DMA channel(for at91 i is actually | |
1054 | * the PDC) */ | |
1055 | set_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
1056 | set_bit(DMA_TX_CHAN_PRESENT, &chip->flags); | |
4ede028f HCE |
1057 | } |
1058 | ||
1059 | retval = atmel_ac97c_pcm_new(chip); | |
1060 | if (retval) { | |
1061 | dev_dbg(&pdev->dev, "could not register ac97 pcm device\n"); | |
1062 | goto err_dma; | |
1063 | } | |
1064 | ||
1065 | retval = snd_card_register(card); | |
1066 | if (retval) { | |
1067 | dev_dbg(&pdev->dev, "could not register sound card\n"); | |
df163587 | 1068 | goto err_dma; |
4ede028f HCE |
1069 | } |
1070 | ||
1071 | platform_set_drvdata(pdev, card); | |
1072 | ||
7177395f SG |
1073 | dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n", |
1074 | chip->regs, irq); | |
4ede028f HCE |
1075 | |
1076 | return 0; | |
1077 | ||
1078 | err_dma: | |
7177395f SG |
1079 | if (cpu_is_at32ap7000()) { |
1080 | if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags)) | |
1081 | dma_release_channel(chip->dma.rx_chan); | |
1082 | if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) | |
1083 | dma_release_channel(chip->dma.tx_chan); | |
1084 | clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
1085 | clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags); | |
1086 | chip->dma.rx_chan = NULL; | |
1087 | chip->dma.tx_chan = NULL; | |
1088 | } | |
4ede028f HCE |
1089 | err_ac97_bus: |
1090 | snd_card_set_dev(card, NULL); | |
1091 | ||
1092 | if (gpio_is_valid(chip->reset_pin)) | |
1093 | gpio_free(chip->reset_pin); | |
1094 | ||
1095 | iounmap(chip->regs); | |
1096 | err_ioremap: | |
df163587 HCE |
1097 | free_irq(irq, chip); |
1098 | err_request_irq: | |
4ede028f HCE |
1099 | snd_card_free(card); |
1100 | err_snd_card_new: | |
1101 | clk_disable(pclk); | |
1102 | clk_put(pclk); | |
1103 | return retval; | |
1104 | } | |
1105 | ||
1106 | #ifdef CONFIG_PM | |
1107 | static int atmel_ac97c_suspend(struct platform_device *pdev, pm_message_t msg) | |
1108 | { | |
1109 | struct snd_card *card = platform_get_drvdata(pdev); | |
1110 | struct atmel_ac97c *chip = card->private_data; | |
1111 | ||
7177395f SG |
1112 | if (cpu_is_at32ap7000()) { |
1113 | if (test_bit(DMA_RX_READY, &chip->flags)) | |
1114 | dw_dma_cyclic_stop(chip->dma.rx_chan); | |
1115 | if (test_bit(DMA_TX_READY, &chip->flags)) | |
1116 | dw_dma_cyclic_stop(chip->dma.tx_chan); | |
1117 | } | |
4ede028f HCE |
1118 | clk_disable(chip->pclk); |
1119 | ||
1120 | return 0; | |
1121 | } | |
1122 | ||
1123 | static int atmel_ac97c_resume(struct platform_device *pdev) | |
1124 | { | |
1125 | struct snd_card *card = platform_get_drvdata(pdev); | |
1126 | struct atmel_ac97c *chip = card->private_data; | |
1127 | ||
1128 | clk_enable(chip->pclk); | |
7177395f SG |
1129 | if (cpu_is_at32ap7000()) { |
1130 | if (test_bit(DMA_RX_READY, &chip->flags)) | |
1131 | dw_dma_cyclic_start(chip->dma.rx_chan); | |
1132 | if (test_bit(DMA_TX_READY, &chip->flags)) | |
1133 | dw_dma_cyclic_start(chip->dma.tx_chan); | |
1134 | } | |
4ede028f HCE |
1135 | return 0; |
1136 | } | |
1137 | #else | |
1138 | #define atmel_ac97c_suspend NULL | |
1139 | #define atmel_ac97c_resume NULL | |
1140 | #endif | |
1141 | ||
1142 | static int __devexit atmel_ac97c_remove(struct platform_device *pdev) | |
1143 | { | |
1144 | struct snd_card *card = platform_get_drvdata(pdev); | |
1145 | struct atmel_ac97c *chip = get_chip(card); | |
1146 | ||
1147 | if (gpio_is_valid(chip->reset_pin)) | |
1148 | gpio_free(chip->reset_pin); | |
1149 | ||
bd74a184 HCE |
1150 | ac97c_writel(chip, CAMR, 0); |
1151 | ac97c_writel(chip, COMR, 0); | |
1152 | ac97c_writel(chip, MR, 0); | |
1153 | ||
4ede028f HCE |
1154 | clk_disable(chip->pclk); |
1155 | clk_put(chip->pclk); | |
1156 | iounmap(chip->regs); | |
df163587 | 1157 | free_irq(chip->irq, chip); |
4ede028f | 1158 | |
7177395f SG |
1159 | if (cpu_is_at32ap7000()) { |
1160 | if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags)) | |
1161 | dma_release_channel(chip->dma.rx_chan); | |
1162 | if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) | |
1163 | dma_release_channel(chip->dma.tx_chan); | |
1164 | clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
1165 | clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags); | |
1166 | chip->dma.rx_chan = NULL; | |
1167 | chip->dma.tx_chan = NULL; | |
1168 | } | |
4ede028f HCE |
1169 | |
1170 | snd_card_set_dev(card, NULL); | |
1171 | snd_card_free(card); | |
1172 | ||
1173 | platform_set_drvdata(pdev, NULL); | |
1174 | ||
1175 | return 0; | |
1176 | } | |
1177 | ||
1178 | static struct platform_driver atmel_ac97c_driver = { | |
1179 | .remove = __devexit_p(atmel_ac97c_remove), | |
1180 | .driver = { | |
1181 | .name = "atmel_ac97c", | |
1182 | }, | |
1183 | .suspend = atmel_ac97c_suspend, | |
1184 | .resume = atmel_ac97c_resume, | |
1185 | }; | |
1186 | ||
1187 | static int __init atmel_ac97c_init(void) | |
1188 | { | |
1189 | return platform_driver_probe(&atmel_ac97c_driver, | |
1190 | atmel_ac97c_probe); | |
1191 | } | |
1192 | module_init(atmel_ac97c_init); | |
1193 | ||
1194 | static void __exit atmel_ac97c_exit(void) | |
1195 | { | |
1196 | platform_driver_unregister(&atmel_ac97c_driver); | |
1197 | } | |
1198 | module_exit(atmel_ac97c_exit); | |
1199 | ||
1200 | MODULE_LICENSE("GPL"); | |
1201 | MODULE_DESCRIPTION("Driver for Atmel AC97 controller"); | |
1202 | MODULE_AUTHOR("Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>"); |