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d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
4ede028f 2/*
128ed6a9 3 * Driver for Atmel AC97C
4ede028f
HCE
4 *
5 * Copyright (C) 2005-2009 Atmel Corporation
4ede028f
HCE
6 */
7#include <linux/clk.h>
8#include <linux/delay.h>
9#include <linux/bitmap.h>
128ed6a9 10#include <linux/device.h>
7177395f 11#include <linux/atmel_pdc.h>
5f10e849 12#include <linux/gpio/consumer.h>
4ede028f
HCE
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/module.h>
16#include <linux/platform_device.h>
17#include <linux/mutex.h>
e2b35f3d 18#include <linux/types.h>
4ede028f 19#include <linux/io.h>
b2d8957f 20#include <linux/of.h>
b2d8957f 21#include <linux/of_device.h>
4ede028f
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22
23#include <sound/core.h>
24#include <sound/initval.h>
25#include <sound/pcm.h>
26#include <sound/pcm_params.h>
27#include <sound/ac97_codec.h>
4ede028f
HCE
28#include <sound/memalloc.h>
29
4ede028f
HCE
30#include "ac97c.h"
31
4ede028f
HCE
32/* Serialize access to opened variable */
33static DEFINE_MUTEX(opened_mutex);
34
4ede028f
HCE
35struct atmel_ac97c {
36 struct clk *pclk;
37 struct platform_device *pdev;
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HCE
38
39 struct snd_pcm_substream *playback_substream;
40 struct snd_pcm_substream *capture_substream;
41 struct snd_card *card;
42 struct snd_pcm *pcm;
43 struct snd_ac97 *ac97;
44 struct snd_ac97_bus *ac97_bus;
45
46 u64 cur_format;
47 unsigned int cur_rate;
7177395f 48 int playback_period, capture_period;
4ede028f
HCE
49 /* Serialize access to opened variable */
50 spinlock_t lock;
51 void __iomem *regs;
df163587 52 int irq;
4ede028f 53 int opened;
5f10e849 54 struct gpio_desc *reset_pin;
4ede028f
HCE
55};
56
57#define get_chip(card) ((struct atmel_ac97c *)(card)->private_data)
58
59#define ac97c_writel(chip, reg, val) \
60 __raw_writel((val), (chip)->regs + AC97C_##reg)
61#define ac97c_readl(chip, reg) \
62 __raw_readl((chip)->regs + AC97C_##reg)
63
85ab3738 64static const struct snd_pcm_hardware atmel_ac97c_hw = {
4ede028f
HCE
65 .info = (SNDRV_PCM_INFO_MMAP
66 | SNDRV_PCM_INFO_MMAP_VALID
67 | SNDRV_PCM_INFO_INTERLEAVED
68 | SNDRV_PCM_INFO_BLOCK_TRANSFER
69 | SNDRV_PCM_INFO_JOINT_DUPLEX
70 | SNDRV_PCM_INFO_RESUME
71 | SNDRV_PCM_INFO_PAUSE),
72 .formats = (SNDRV_PCM_FMTBIT_S16_BE
73 | SNDRV_PCM_FMTBIT_S16_LE),
74 .rates = (SNDRV_PCM_RATE_CONTINUOUS),
75 .rate_min = 4000,
76 .rate_max = 48000,
77 .channels_min = 1,
78 .channels_max = 2,
c42eec0f 79 .buffer_bytes_max = 2 * 2 * 64 * 2048,
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HCE
80 .period_bytes_min = 4096,
81 .period_bytes_max = 4096,
c42eec0f 82 .periods_min = 6,
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HCE
83 .periods_max = 64,
84};
85
86static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream)
87{
88 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
89 struct snd_pcm_runtime *runtime = substream->runtime;
90
91 mutex_lock(&opened_mutex);
92 chip->opened++;
93 runtime->hw = atmel_ac97c_hw;
94 if (chip->cur_rate) {
95 runtime->hw.rate_min = chip->cur_rate;
96 runtime->hw.rate_max = chip->cur_rate;
97 }
98 if (chip->cur_format)
74c34ca1 99 runtime->hw.formats = pcm_format_to_bits(chip->cur_format);
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100 mutex_unlock(&opened_mutex);
101 chip->playback_substream = substream;
102 return 0;
103}
104
105static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream)
106{
107 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
108 struct snd_pcm_runtime *runtime = substream->runtime;
109
110 mutex_lock(&opened_mutex);
111 chip->opened++;
112 runtime->hw = atmel_ac97c_hw;
113 if (chip->cur_rate) {
114 runtime->hw.rate_min = chip->cur_rate;
115 runtime->hw.rate_max = chip->cur_rate;
116 }
117 if (chip->cur_format)
74c34ca1 118 runtime->hw.formats = pcm_format_to_bits(chip->cur_format);
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HCE
119 mutex_unlock(&opened_mutex);
120 chip->capture_substream = substream;
121 return 0;
122}
123
124static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream)
125{
126 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
127
128 mutex_lock(&opened_mutex);
129 chip->opened--;
130 if (!chip->opened) {
131 chip->cur_rate = 0;
132 chip->cur_format = 0;
133 }
134 mutex_unlock(&opened_mutex);
135
136 chip->playback_substream = NULL;
137
138 return 0;
139}
140
141static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream)
142{
143 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
144
145 mutex_lock(&opened_mutex);
146 chip->opened--;
147 if (!chip->opened) {
148 chip->cur_rate = 0;
149 chip->cur_format = 0;
150 }
151 mutex_unlock(&opened_mutex);
152
153 chip->capture_substream = NULL;
154
155 return 0;
156}
157
158static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream,
159 struct snd_pcm_hw_params *hw_params)
160{
161 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
162 int retval;
163
164 retval = snd_pcm_lib_malloc_pages(substream,
165 params_buffer_bytes(hw_params));
166 if (retval < 0)
167 return retval;
020c5260 168
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HCE
169 /* Set restrictions to params. */
170 mutex_lock(&opened_mutex);
171 chip->cur_rate = params_rate(hw_params);
172 chip->cur_format = params_format(hw_params);
173 mutex_unlock(&opened_mutex);
174
175 return retval;
176}
177
178static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream,
179 struct snd_pcm_hw_params *hw_params)
180{
181 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
182 int retval;
183
184 retval = snd_pcm_lib_malloc_pages(substream,
185 params_buffer_bytes(hw_params));
186 if (retval < 0)
187 return retval;
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188
189 /* Set restrictions to params. */
190 mutex_lock(&opened_mutex);
191 chip->cur_rate = params_rate(hw_params);
192 chip->cur_format = params_format(hw_params);
193 mutex_unlock(&opened_mutex);
194
195 return retval;
196}
197
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HCE
198static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream)
199{
200 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
201 struct snd_pcm_runtime *runtime = substream->runtime;
7177395f 202 int block_size = frames_to_bytes(runtime, runtime->period_size);
128ed6a9 203 unsigned long word = ac97c_readl(chip, OCA);
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HCE
204 int retval;
205
7177395f 206 chip->playback_period = 0;
128ed6a9
HCE
207 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
208
4ede028f
HCE
209 /* assign channels to AC97C channel A */
210 switch (runtime->channels) {
211 case 1:
212 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
213 break;
214 case 2:
215 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
216 | AC97C_CH_ASSIGN(PCM_RIGHT, A);
217 break;
218 default:
219 /* TODO: support more than two channels */
220 return -EINVAL;
4ede028f
HCE
221 }
222 ac97c_writel(chip, OCA, word);
223
224 /* configure sample format and size */
ec2755a9
SG
225 word = ac97c_readl(chip, CAMR);
226 if (chip->opened <= 1)
227 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
228 else
229 word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
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230
231 switch (runtime->format) {
232 case SNDRV_PCM_FORMAT_S16_LE:
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HCE
233 break;
234 case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
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HCE
235 word &= ~(AC97C_CMR_CEM_LITTLE);
236 break;
128ed6a9
HCE
237 default:
238 word = ac97c_readl(chip, OCA);
239 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
240 ac97c_writel(chip, OCA, word);
241 return -EINVAL;
4ede028f
HCE
242 }
243
df163587
HCE
244 /* Enable underrun interrupt on channel A */
245 word |= AC97C_CSR_UNRUN;
246
4ede028f
HCE
247 ac97c_writel(chip, CAMR, word);
248
df163587
HCE
249 /* Enable channel A event interrupt */
250 word = ac97c_readl(chip, IMR);
251 word |= AC97C_SR_CAEVT;
252 ac97c_writel(chip, IER, word);
253
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254 /* set variable rate if needed */
255 if (runtime->rate != 48000) {
256 word = ac97c_readl(chip, MR);
257 word |= AC97C_MR_VRA;
258 ac97c_writel(chip, MR, word);
259 } else {
260 word = ac97c_readl(chip, MR);
261 word &= ~(AC97C_MR_VRA);
262 ac97c_writel(chip, MR, word);
263 }
264
265 retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
266 runtime->rate);
267 if (retval)
268 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
269 runtime->rate);
270
020c5260
AS
271 /* Initialize and start the PDC */
272 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR);
273 writel(block_size / 2, chip->regs + ATMEL_PDC_TCR);
274 writel(runtime->dma_addr + block_size, chip->regs + ATMEL_PDC_TNPR);
275 writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR);
4ede028f
HCE
276
277 return retval;
278}
279
280static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream)
281{
282 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
283 struct snd_pcm_runtime *runtime = substream->runtime;
7177395f 284 int block_size = frames_to_bytes(runtime, runtime->period_size);
128ed6a9 285 unsigned long word = ac97c_readl(chip, ICA);
4ede028f
HCE
286 int retval;
287
7177395f 288 chip->capture_period = 0;
128ed6a9
HCE
289 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
290
4ede028f
HCE
291 /* assign channels to AC97C channel A */
292 switch (runtime->channels) {
293 case 1:
294 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
295 break;
296 case 2:
297 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
298 | AC97C_CH_ASSIGN(PCM_RIGHT, A);
299 break;
300 default:
301 /* TODO: support more than two channels */
302 return -EINVAL;
4ede028f
HCE
303 }
304 ac97c_writel(chip, ICA, word);
305
306 /* configure sample format and size */
ec2755a9
SG
307 word = ac97c_readl(chip, CAMR);
308 if (chip->opened <= 1)
309 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
310 else
311 word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
4ede028f
HCE
312
313 switch (runtime->format) {
314 case SNDRV_PCM_FORMAT_S16_LE:
4ede028f
HCE
315 break;
316 case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
4ede028f
HCE
317 word &= ~(AC97C_CMR_CEM_LITTLE);
318 break;
128ed6a9
HCE
319 default:
320 word = ac97c_readl(chip, ICA);
321 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
322 ac97c_writel(chip, ICA, word);
323 return -EINVAL;
4ede028f
HCE
324 }
325
df163587
HCE
326 /* Enable overrun interrupt on channel A */
327 word |= AC97C_CSR_OVRUN;
328
4ede028f
HCE
329 ac97c_writel(chip, CAMR, word);
330
df163587
HCE
331 /* Enable channel A event interrupt */
332 word = ac97c_readl(chip, IMR);
333 word |= AC97C_SR_CAEVT;
334 ac97c_writel(chip, IER, word);
335
4ede028f
HCE
336 /* set variable rate if needed */
337 if (runtime->rate != 48000) {
338 word = ac97c_readl(chip, MR);
339 word |= AC97C_MR_VRA;
340 ac97c_writel(chip, MR, word);
341 } else {
342 word = ac97c_readl(chip, MR);
343 word &= ~(AC97C_MR_VRA);
344 ac97c_writel(chip, MR, word);
345 }
346
347 retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE,
348 runtime->rate);
349 if (retval)
350 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
351 runtime->rate);
352
020c5260
AS
353 /* Initialize and start the PDC */
354 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR);
355 writel(block_size / 2, chip->regs + ATMEL_PDC_RCR);
356 writel(runtime->dma_addr + block_size, chip->regs + ATMEL_PDC_RNPR);
357 writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR);
4ede028f
HCE
358
359 return retval;
360}
361
362static int
363atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd)
364{
365 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
7177395f 366 unsigned long camr, ptcr = 0;
4ede028f
HCE
367
368 camr = ac97c_readl(chip, CAMR);
369
370 switch (cmd) {
371 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
372 case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
373 case SNDRV_PCM_TRIGGER_START:
020c5260 374 ptcr = ATMEL_PDC_TXTEN;
ec2755a9 375 camr |= AC97C_CMR_CENA | AC97C_CSR_ENDTX;
4ede028f
HCE
376 break;
377 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
378 case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
379 case SNDRV_PCM_TRIGGER_STOP:
020c5260 380 ptcr |= ATMEL_PDC_TXTDIS;
4ede028f
HCE
381 if (chip->opened <= 1)
382 camr &= ~AC97C_CMR_CENA;
383 break;
384 default:
020c5260 385 return -EINVAL;
4ede028f
HCE
386 }
387
388 ac97c_writel(chip, CAMR, camr);
020c5260
AS
389 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
390 return 0;
4ede028f
HCE
391}
392
393static int
394atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd)
395{
396 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
7177395f 397 unsigned long camr, ptcr = 0;
4ede028f
HCE
398
399 camr = ac97c_readl(chip, CAMR);
7177395f 400 ptcr = readl(chip->regs + ATMEL_PDC_PTSR);
4ede028f
HCE
401
402 switch (cmd) {
403 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
404 case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
405 case SNDRV_PCM_TRIGGER_START:
020c5260 406 ptcr = ATMEL_PDC_RXTEN;
ec2755a9 407 camr |= AC97C_CMR_CENA | AC97C_CSR_ENDRX;
4ede028f
HCE
408 break;
409 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
410 case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
411 case SNDRV_PCM_TRIGGER_STOP:
020c5260 412 ptcr |= ATMEL_PDC_RXTDIS;
4ede028f
HCE
413 if (chip->opened <= 1)
414 camr &= ~AC97C_CMR_CENA;
415 break;
416 default:
020c5260 417 return -EINVAL;
4ede028f
HCE
418 }
419
420 ac97c_writel(chip, CAMR, camr);
020c5260
AS
421 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
422 return 0;
4ede028f
HCE
423}
424
425static snd_pcm_uframes_t
426atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream)
427{
428 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
429 struct snd_pcm_runtime *runtime = substream->runtime;
430 snd_pcm_uframes_t frames;
431 unsigned long bytes;
432
020c5260 433 bytes = readl(chip->regs + ATMEL_PDC_TPR);
4ede028f
HCE
434 bytes -= runtime->dma_addr;
435
436 frames = bytes_to_frames(runtime, bytes);
437 if (frames >= runtime->buffer_size)
438 frames -= runtime->buffer_size;
439 return frames;
440}
441
442static snd_pcm_uframes_t
443atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream)
444{
445 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
446 struct snd_pcm_runtime *runtime = substream->runtime;
447 snd_pcm_uframes_t frames;
448 unsigned long bytes;
449
020c5260 450 bytes = readl(chip->regs + ATMEL_PDC_RPR);
4ede028f
HCE
451 bytes -= runtime->dma_addr;
452
453 frames = bytes_to_frames(runtime, bytes);
454 if (frames >= runtime->buffer_size)
455 frames -= runtime->buffer_size;
456 return frames;
457}
458
10863737 459static const struct snd_pcm_ops atmel_ac97_playback_ops = {
4ede028f
HCE
460 .open = atmel_ac97c_playback_open,
461 .close = atmel_ac97c_playback_close,
462 .ioctl = snd_pcm_lib_ioctl,
463 .hw_params = atmel_ac97c_playback_hw_params,
020c5260 464 .hw_free = snd_pcm_lib_free_pages,
4ede028f
HCE
465 .prepare = atmel_ac97c_playback_prepare,
466 .trigger = atmel_ac97c_playback_trigger,
467 .pointer = atmel_ac97c_playback_pointer,
468};
469
10863737 470static const struct snd_pcm_ops atmel_ac97_capture_ops = {
4ede028f
HCE
471 .open = atmel_ac97c_capture_open,
472 .close = atmel_ac97c_capture_close,
473 .ioctl = snd_pcm_lib_ioctl,
474 .hw_params = atmel_ac97c_capture_hw_params,
020c5260 475 .hw_free = snd_pcm_lib_free_pages,
4ede028f
HCE
476 .prepare = atmel_ac97c_capture_prepare,
477 .trigger = atmel_ac97c_capture_trigger,
478 .pointer = atmel_ac97c_capture_pointer,
479};
480
df163587
HCE
481static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev)
482{
483 struct atmel_ac97c *chip = (struct atmel_ac97c *)dev;
484 irqreturn_t retval = IRQ_NONE;
485 u32 sr = ac97c_readl(chip, SR);
486 u32 casr = ac97c_readl(chip, CASR);
487 u32 cosr = ac97c_readl(chip, COSR);
7177395f 488 u32 camr = ac97c_readl(chip, CAMR);
df163587
HCE
489
490 if (sr & AC97C_SR_CAEVT) {
7177395f
SG
491 struct snd_pcm_runtime *runtime;
492 int offset, next_period, block_size;
f5341163 493 dev_dbg(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n",
df163587
HCE
494 casr & AC97C_CSR_OVRUN ? " OVRUN" : "",
495 casr & AC97C_CSR_RXRDY ? " RXRDY" : "",
496 casr & AC97C_CSR_UNRUN ? " UNRUN" : "",
497 casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
498 casr & AC97C_CSR_TXRDY ? " TXRDY" : "",
499 !casr ? " NONE" : "");
020c5260
AS
500 if ((casr & camr) & AC97C_CSR_ENDTX) {
501 runtime = chip->playback_substream->runtime;
502 block_size = frames_to_bytes(runtime, runtime->period_size);
503 chip->playback_period++;
504
505 if (chip->playback_period == runtime->periods)
506 chip->playback_period = 0;
507 next_period = chip->playback_period + 1;
508 if (next_period == runtime->periods)
509 next_period = 0;
510
511 offset = block_size * next_period;
512
513 writel(runtime->dma_addr + offset, chip->regs + ATMEL_PDC_TNPR);
514 writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR);
515
516 snd_pcm_period_elapsed(chip->playback_substream);
517 }
518 if ((casr & camr) & AC97C_CSR_ENDRX) {
519 runtime = chip->capture_substream->runtime;
520 block_size = frames_to_bytes(runtime, runtime->period_size);
521 chip->capture_period++;
522
523 if (chip->capture_period == runtime->periods)
524 chip->capture_period = 0;
525 next_period = chip->capture_period + 1;
526 if (next_period == runtime->periods)
527 next_period = 0;
528
529 offset = block_size * next_period;
530
531 writel(runtime->dma_addr + offset, chip->regs + ATMEL_PDC_RNPR);
532 writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR);
533 snd_pcm_period_elapsed(chip->capture_substream);
7177395f 534 }
df163587
HCE
535 retval = IRQ_HANDLED;
536 }
537
538 if (sr & AC97C_SR_COEVT) {
539 dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n",
540 cosr & AC97C_CSR_OVRUN ? " OVRUN" : "",
541 cosr & AC97C_CSR_RXRDY ? " RXRDY" : "",
542 cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
543 cosr & AC97C_CSR_TXRDY ? " TXRDY" : "",
544 !cosr ? " NONE" : "");
545 retval = IRQ_HANDLED;
546 }
547
548 if (retval == IRQ_NONE) {
549 dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x "
550 "casr 0x%08x cosr 0x%08x\n", sr, casr, cosr);
551 }
552
553 return retval;
554}
555
3ca8590b 556static const struct ac97_pcm at91_ac97_pcm_defs[] = {
7177395f
SG
557 /* Playback */
558 {
559 .exclusive = 1,
560 .r = { {
561 .slots = ((1 << AC97_SLOT_PCM_LEFT)
562 | (1 << AC97_SLOT_PCM_RIGHT)),
563 } },
564 },
565 /* PCM in */
566 {
567 .stream = 1,
568 .exclusive = 1,
569 .r = { {
570 .slots = ((1 << AC97_SLOT_PCM_LEFT)
571 | (1 << AC97_SLOT_PCM_RIGHT)),
572 } }
573 },
574 /* Mic in */
575 {
576 .stream = 1,
577 .exclusive = 1,
578 .r = { {
579 .slots = (1<<AC97_SLOT_MIC),
580 } }
581 },
582};
583
61dc674c 584static int atmel_ac97c_pcm_new(struct atmel_ac97c *chip)
4ede028f
HCE
585{
586 struct snd_pcm *pcm;
587 struct snd_pcm_hardware hw = atmel_ac97c_hw;
020c5260 588 int retval;
4ede028f 589
020c5260
AS
590 retval = snd_ac97_pcm_assign(chip->ac97_bus,
591 ARRAY_SIZE(at91_ac97_pcm_defs),
592 at91_ac97_pcm_defs);
593 if (retval)
594 return retval;
4ede028f 595
020c5260 596 retval = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
4ede028f
HCE
597 if (retval)
598 return retval;
599
020c5260
AS
600 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &atmel_ac97_capture_ops);
601 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &atmel_ac97_playback_ops);
4ede028f 602
e6e8c82b 603 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
4ede028f
HCE
604 &chip->pdev->dev, hw.periods_min * hw.period_bytes_min,
605 hw.buffer_bytes_max);
4ede028f
HCE
606
607 pcm->private_data = chip;
608 pcm->info_flags = 0;
609 strcpy(pcm->name, chip->card->shortname);
610 chip->pcm = pcm;
611
612 return 0;
613}
614
615static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip)
616{
617 struct snd_ac97_template template;
618 memset(&template, 0, sizeof(template));
619 template.private_data = chip;
620 return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
621}
622
623static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg,
624 unsigned short val)
625{
626 struct atmel_ac97c *chip = get_chip(ac97);
627 unsigned long word;
628 int timeout = 40;
629
630 word = (reg & 0x7f) << 16 | val;
631
632 do {
633 if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
634 ac97c_writel(chip, COTHR, word);
635 return;
636 }
637 udelay(1);
638 } while (--timeout);
639
640 dev_dbg(&chip->pdev->dev, "codec write timeout\n");
641}
642
643static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97,
644 unsigned short reg)
645{
646 struct atmel_ac97c *chip = get_chip(ac97);
647 unsigned long word;
648 int timeout = 40;
649 int write = 10;
650
651 word = (0x80 | (reg & 0x7f)) << 16;
652
653 if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
654 ac97c_readl(chip, CORHR);
655
656retry_write:
657 timeout = 40;
658
659 do {
660 if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
661 ac97c_writel(chip, COTHR, word);
662 goto read_reg;
663 }
664 udelay(10);
665 } while (--timeout);
666
667 if (!--write)
668 goto timed_out;
669 goto retry_write;
670
671read_reg:
672 do {
673 if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
674 unsigned short val = ac97c_readl(chip, CORHR);
675 return val;
676 }
677 udelay(10);
678 } while (--timeout);
679
680 if (!--write)
681 goto timed_out;
682 goto retry_write;
683
684timed_out:
685 dev_dbg(&chip->pdev->dev, "codec read timeout\n");
686 return 0xffff;
687}
688
4ede028f
HCE
689static void atmel_ac97c_reset(struct atmel_ac97c *chip)
690{
81baf3a7
HCE
691 ac97c_writel(chip, MR, 0);
692 ac97c_writel(chip, MR, AC97C_MR_ENA);
693 ac97c_writel(chip, CAMR, 0);
694 ac97c_writel(chip, COMR, 0);
4ede028f 695
5f10e849
AS
696 if (!IS_ERR(chip->reset_pin)) {
697 gpiod_set_value(chip->reset_pin, 0);
4ede028f 698 /* AC97 v2.2 specifications says minimum 1 us. */
81baf3a7 699 udelay(2);
5f10e849 700 gpiod_set_value(chip->reset_pin, 1);
8015e3de
BS
701 } else {
702 ac97c_writel(chip, MR, AC97C_MR_WRST | AC97C_MR_ENA);
703 udelay(2);
704 ac97c_writel(chip, MR, AC97C_MR_ENA);
4ede028f 705 }
4ede028f
HCE
706}
707
b2d8957f
AS
708static const struct of_device_id atmel_ac97c_dt_ids[] = {
709 { .compatible = "atmel,at91sam9263-ac97c", },
710 { }
711};
712MODULE_DEVICE_TABLE(of, atmel_ac97c_dt_ids);
713
61dc674c 714static int atmel_ac97c_probe(struct platform_device *pdev)
4ede028f 715{
5f10e849 716 struct device *dev = &pdev->dev;
4ede028f
HCE
717 struct snd_card *card;
718 struct atmel_ac97c *chip;
719 struct resource *regs;
4ede028f
HCE
720 struct clk *pclk;
721 static struct snd_ac97_bus_ops ops = {
722 .write = atmel_ac97c_write,
723 .read = atmel_ac97c_read,
724 };
725 int retval;
df163587 726 int irq;
4ede028f
HCE
727
728 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
729 if (!regs) {
730 dev_dbg(&pdev->dev, "no memory resource\n");
731 return -ENXIO;
732 }
733
df163587
HCE
734 irq = platform_get_irq(pdev, 0);
735 if (irq < 0) {
77201135
GS
736 dev_dbg(&pdev->dev, "could not get irq: %d\n", irq);
737 return irq;
df163587
HCE
738 }
739
020c5260 740 pclk = clk_get(&pdev->dev, "ac97_clk");
4ede028f
HCE
741 if (IS_ERR(pclk)) {
742 dev_dbg(&pdev->dev, "no peripheral clock\n");
743 return PTR_ERR(pclk);
744 }
260ea95c
AY
745 retval = clk_prepare_enable(pclk);
746 if (retval)
0515760f 747 goto err_prepare_enable;
4ede028f 748
a4f2473d
TI
749 retval = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1,
750 SNDRV_DEFAULT_STR1, THIS_MODULE,
751 sizeof(struct atmel_ac97c), &card);
4ede028f
HCE
752 if (retval) {
753 dev_dbg(&pdev->dev, "could not create sound card device\n");
754 goto err_snd_card_new;
755 }
756
757 chip = get_chip(card);
758
df163587
HCE
759 retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip);
760 if (retval) {
761 dev_dbg(&pdev->dev, "unable to request irq %d\n", irq);
762 goto err_request_irq;
763 }
764 chip->irq = irq;
765
4ede028f
HCE
766 spin_lock_init(&chip->lock);
767
768 strcpy(card->driver, "Atmel AC97C");
769 strcpy(card->shortname, "Atmel AC97C");
770 sprintf(card->longname, "Atmel AC97 controller");
771
772 chip->card = card;
773 chip->pclk = pclk;
774 chip->pdev = pdev;
28f65c11 775 chip->regs = ioremap(regs->start, resource_size(regs));
4ede028f
HCE
776
777 if (!chip->regs) {
778 dev_dbg(&pdev->dev, "could not remap register memory\n");
0c23e46e 779 retval = -ENOMEM;
4ede028f
HCE
780 goto err_ioremap;
781 }
782
5f10e849
AS
783 chip->reset_pin = devm_gpiod_get_index(dev, "ac97", 2, GPIOD_OUT_HIGH);
784 if (IS_ERR(chip->reset_pin))
785 dev_dbg(dev, "reset pin not available\n");
4ede028f 786
81baf3a7
HCE
787 atmel_ac97c_reset(chip);
788
df163587
HCE
789 /* Enable overrun interrupt from codec channel */
790 ac97c_writel(chip, COMR, AC97C_CSR_OVRUN);
791 ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT);
792
4ede028f
HCE
793 retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
794 if (retval) {
795 dev_dbg(&pdev->dev, "could not register on ac97 bus\n");
796 goto err_ac97_bus;
797 }
798
4ede028f
HCE
799 retval = atmel_ac97c_mixer_new(chip);
800 if (retval) {
801 dev_dbg(&pdev->dev, "could not register ac97 mixer\n");
802 goto err_ac97_bus;
803 }
804
4ede028f
HCE
805 retval = atmel_ac97c_pcm_new(chip);
806 if (retval) {
807 dev_dbg(&pdev->dev, "could not register ac97 pcm device\n");
020c5260 808 goto err_ac97_bus;
4ede028f
HCE
809 }
810
811 retval = snd_card_register(card);
812 if (retval) {
813 dev_dbg(&pdev->dev, "could not register sound card\n");
020c5260 814 goto err_ac97_bus;
4ede028f
HCE
815 }
816
817 platform_set_drvdata(pdev, card);
818
7177395f
SG
819 dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n",
820 chip->regs, irq);
4ede028f
HCE
821
822 return 0;
823
4ede028f 824err_ac97_bus:
4ede028f
HCE
825 iounmap(chip->regs);
826err_ioremap:
df163587
HCE
827 free_irq(irq, chip);
828err_request_irq:
4ede028f
HCE
829 snd_card_free(card);
830err_snd_card_new:
1132015b 831 clk_disable_unprepare(pclk);
0515760f 832err_prepare_enable:
4ede028f
HCE
833 clk_put(pclk);
834 return retval;
835}
836
d34e4e00 837#ifdef CONFIG_PM_SLEEP
284e7ca7 838static int atmel_ac97c_suspend(struct device *pdev)
4ede028f 839{
284e7ca7 840 struct snd_card *card = dev_get_drvdata(pdev);
4ede028f
HCE
841 struct atmel_ac97c *chip = card->private_data;
842
1132015b 843 clk_disable_unprepare(chip->pclk);
4ede028f
HCE
844 return 0;
845}
846
284e7ca7 847static int atmel_ac97c_resume(struct device *pdev)
4ede028f 848{
284e7ca7 849 struct snd_card *card = dev_get_drvdata(pdev);
4ede028f 850 struct atmel_ac97c *chip = card->private_data;
260ea95c 851 int ret = clk_prepare_enable(chip->pclk);
4ede028f 852
260ea95c 853 return ret;
4ede028f 854}
284e7ca7
TI
855
856static SIMPLE_DEV_PM_OPS(atmel_ac97c_pm, atmel_ac97c_suspend, atmel_ac97c_resume);
857#define ATMEL_AC97C_PM_OPS &atmel_ac97c_pm
4ede028f 858#else
284e7ca7 859#define ATMEL_AC97C_PM_OPS NULL
4ede028f
HCE
860#endif
861
61dc674c 862static int atmel_ac97c_remove(struct platform_device *pdev)
4ede028f
HCE
863{
864 struct snd_card *card = platform_get_drvdata(pdev);
865 struct atmel_ac97c *chip = get_chip(card);
866
bd74a184
HCE
867 ac97c_writel(chip, CAMR, 0);
868 ac97c_writel(chip, COMR, 0);
869 ac97c_writel(chip, MR, 0);
870
1132015b 871 clk_disable_unprepare(chip->pclk);
4ede028f
HCE
872 clk_put(chip->pclk);
873 iounmap(chip->regs);
df163587 874 free_irq(chip->irq, chip);
4ede028f 875
4ede028f
HCE
876 snd_card_free(card);
877
4ede028f
HCE
878 return 0;
879}
880
881static struct platform_driver atmel_ac97c_driver = {
4b973ee0 882 .probe = atmel_ac97c_probe,
61dc674c 883 .remove = atmel_ac97c_remove,
4ede028f
HCE
884 .driver = {
885 .name = "atmel_ac97c",
284e7ca7 886 .pm = ATMEL_AC97C_PM_OPS,
5f10e849 887 .of_match_table = atmel_ac97c_dt_ids,
4ede028f 888 },
4ede028f 889};
4b973ee0 890module_platform_driver(atmel_ac97c_driver);
4ede028f
HCE
891
892MODULE_LICENSE("GPL");
893MODULE_DESCRIPTION("Driver for Atmel AC97 controller");
0cfae7c9 894MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");