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Commit | Line | Data |
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4a161d23 ML |
1 | /* |
2 | * Au12x0/Au1550 PSC ALSA ASoC audio support. | |
3 | * | |
4 | * (c) 2007-2008 MSC Vertriebsges.m.b.H., | |
0f83d639 | 5 | * Manuel Lauss <manuel.lauss@gmail.com> |
4a161d23 ML |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * Au1xxx-PSC I2S glue. | |
12 | * | |
13 | * NOTE: all of these drivers can only work with a SINGLE instance | |
14 | * of a PSC. Multiple independent audio devices are impossible | |
15 | * with ASoC v1. | |
16 | * NOTE: so far only PSC slave mode (bit- and frameclock) is supported. | |
17 | */ | |
18 | ||
19 | #include <linux/init.h> | |
20 | #include <linux/module.h> | |
5a0e3ad6 | 21 | #include <linux/slab.h> |
4a161d23 ML |
22 | #include <linux/suspend.h> |
23 | #include <sound/core.h> | |
24 | #include <sound/pcm.h> | |
25 | #include <sound/initval.h> | |
26 | #include <sound/soc.h> | |
27 | #include <asm/mach-au1x00/au1000.h> | |
28 | #include <asm/mach-au1x00/au1xxx_psc.h> | |
29 | ||
30 | #include "psc.h" | |
31 | ||
32 | /* supported I2S DAI hardware formats */ | |
33 | #define AU1XPSC_I2S_DAIFMT \ | |
34 | (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | \ | |
35 | SND_SOC_DAIFMT_NB_NF) | |
36 | ||
37 | /* supported I2S direction */ | |
38 | #define AU1XPSC_I2S_DIR \ | |
39 | (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) | |
40 | ||
41 | #define AU1XPSC_I2S_RATES \ | |
42 | SNDRV_PCM_RATE_8000_192000 | |
43 | ||
44 | #define AU1XPSC_I2S_FMTS \ | |
45 | (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE) | |
46 | ||
47 | #define I2SSTAT_BUSY(stype) \ | |
48 | ((stype) == PCM_TX ? PSC_I2SSTAT_TB : PSC_I2SSTAT_RB) | |
49 | #define I2SPCR_START(stype) \ | |
50 | ((stype) == PCM_TX ? PSC_I2SPCR_TS : PSC_I2SPCR_RS) | |
51 | #define I2SPCR_STOP(stype) \ | |
52 | ((stype) == PCM_TX ? PSC_I2SPCR_TP : PSC_I2SPCR_RP) | |
53 | #define I2SPCR_CLRFIFO(stype) \ | |
54 | ((stype) == PCM_TX ? PSC_I2SPCR_TC : PSC_I2SPCR_RC) | |
55 | ||
56 | ||
57 | /* instance data. There can be only one, MacLeod!!!! */ | |
58 | static struct au1xpsc_audio_data *au1xpsc_i2s_workdata; | |
59 | ||
60 | static int au1xpsc_i2s_set_fmt(struct snd_soc_dai *cpu_dai, | |
61 | unsigned int fmt) | |
62 | { | |
63 | struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata; | |
64 | unsigned long ct; | |
65 | int ret; | |
66 | ||
67 | ret = -EINVAL; | |
68 | ||
69 | ct = pscdata->cfg; | |
70 | ||
71 | ct &= ~(PSC_I2SCFG_XM | PSC_I2SCFG_MLJ); /* left-justified */ | |
72 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
73 | case SND_SOC_DAIFMT_I2S: | |
74 | ct |= PSC_I2SCFG_XM; /* enable I2S mode */ | |
75 | break; | |
76 | case SND_SOC_DAIFMT_MSB: | |
77 | break; | |
78 | case SND_SOC_DAIFMT_LSB: | |
79 | ct |= PSC_I2SCFG_MLJ; /* LSB (right-) justified */ | |
80 | break; | |
81 | default: | |
82 | goto out; | |
83 | } | |
84 | ||
85 | ct &= ~(PSC_I2SCFG_BI | PSC_I2SCFG_WI); /* IB-IF */ | |
86 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
87 | case SND_SOC_DAIFMT_NB_NF: | |
88 | ct |= PSC_I2SCFG_BI | PSC_I2SCFG_WI; | |
89 | break; | |
90 | case SND_SOC_DAIFMT_NB_IF: | |
91 | ct |= PSC_I2SCFG_BI; | |
92 | break; | |
93 | case SND_SOC_DAIFMT_IB_NF: | |
94 | ct |= PSC_I2SCFG_WI; | |
95 | break; | |
96 | case SND_SOC_DAIFMT_IB_IF: | |
97 | break; | |
98 | default: | |
99 | goto out; | |
100 | } | |
101 | ||
102 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
103 | case SND_SOC_DAIFMT_CBM_CFM: /* CODEC master */ | |
104 | ct |= PSC_I2SCFG_MS; /* PSC I2S slave mode */ | |
105 | break; | |
106 | case SND_SOC_DAIFMT_CBS_CFS: /* CODEC slave */ | |
107 | ct &= ~PSC_I2SCFG_MS; /* PSC I2S Master mode */ | |
108 | break; | |
109 | default: | |
110 | goto out; | |
111 | } | |
112 | ||
113 | pscdata->cfg = ct; | |
114 | ret = 0; | |
115 | out: | |
116 | return ret; | |
117 | } | |
118 | ||
119 | static int au1xpsc_i2s_hw_params(struct snd_pcm_substream *substream, | |
dee89c4d MB |
120 | struct snd_pcm_hw_params *params, |
121 | struct snd_soc_dai *dai) | |
4a161d23 ML |
122 | { |
123 | struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata; | |
124 | ||
125 | int cfgbits; | |
126 | unsigned long stat; | |
127 | ||
128 | /* check if the PSC is already streaming data */ | |
129 | stat = au_readl(I2S_STAT(pscdata)); | |
130 | if (stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB)) { | |
131 | /* reject parameters not currently set up in hardware */ | |
132 | cfgbits = au_readl(I2S_CFG(pscdata)); | |
133 | if ((PSC_I2SCFG_GET_LEN(cfgbits) != params->msbits) || | |
134 | (params_rate(params) != pscdata->rate)) | |
135 | return -EINVAL; | |
136 | } else { | |
137 | /* set sample bitdepth */ | |
138 | pscdata->cfg &= ~(0x1f << 4); | |
139 | pscdata->cfg |= PSC_I2SCFG_SET_LEN(params->msbits); | |
140 | /* remember current rate for other stream */ | |
141 | pscdata->rate = params_rate(params); | |
142 | } | |
143 | return 0; | |
144 | } | |
145 | ||
146 | /* Configure PSC late: on my devel systems the codec is I2S master and | |
147 | * supplies the i2sbitclock __AND__ i2sMclk (!) to the PSC unit. ASoC | |
148 | * uses aggressive PM and switches the codec off when it is not in use | |
149 | * which also means the PSC unit doesn't get any clocks and is therefore | |
150 | * dead. That's why this chunk here gets called from the trigger callback | |
151 | * because I can be reasonably certain the codec is driving the clocks. | |
152 | */ | |
153 | static int au1xpsc_i2s_configure(struct au1xpsc_audio_data *pscdata) | |
154 | { | |
155 | unsigned long tmo; | |
156 | ||
157 | /* bring PSC out of sleep, and configure I2S unit */ | |
158 | au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata)); | |
159 | au_sync(); | |
160 | ||
161 | tmo = 1000000; | |
162 | while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_SR) && tmo) | |
163 | tmo--; | |
164 | ||
165 | if (!tmo) | |
166 | goto psc_err; | |
167 | ||
168 | au_writel(0, I2S_CFG(pscdata)); | |
169 | au_sync(); | |
170 | au_writel(pscdata->cfg | PSC_I2SCFG_DE_ENABLE, I2S_CFG(pscdata)); | |
171 | au_sync(); | |
172 | ||
173 | /* wait for I2S controller to become ready */ | |
174 | tmo = 1000000; | |
175 | while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_DR) && tmo) | |
176 | tmo--; | |
177 | ||
178 | if (tmo) | |
179 | return 0; | |
180 | ||
181 | psc_err: | |
182 | au_writel(0, I2S_CFG(pscdata)); | |
183 | au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata)); | |
184 | au_sync(); | |
185 | return -ETIMEDOUT; | |
186 | } | |
187 | ||
188 | static int au1xpsc_i2s_start(struct au1xpsc_audio_data *pscdata, int stype) | |
189 | { | |
190 | unsigned long tmo, stat; | |
191 | int ret; | |
192 | ||
193 | ret = 0; | |
194 | ||
195 | /* if both TX and RX are idle, configure the PSC */ | |
196 | stat = au_readl(I2S_STAT(pscdata)); | |
197 | if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) { | |
198 | ret = au1xpsc_i2s_configure(pscdata); | |
199 | if (ret) | |
200 | goto out; | |
201 | } | |
202 | ||
203 | au_writel(I2SPCR_CLRFIFO(stype), I2S_PCR(pscdata)); | |
204 | au_sync(); | |
205 | au_writel(I2SPCR_START(stype), I2S_PCR(pscdata)); | |
206 | au_sync(); | |
207 | ||
208 | /* wait for start confirmation */ | |
209 | tmo = 1000000; | |
210 | while (!(au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo) | |
211 | tmo--; | |
212 | ||
213 | if (!tmo) { | |
214 | au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata)); | |
215 | au_sync(); | |
216 | ret = -ETIMEDOUT; | |
217 | } | |
218 | out: | |
219 | return ret; | |
220 | } | |
221 | ||
222 | static int au1xpsc_i2s_stop(struct au1xpsc_audio_data *pscdata, int stype) | |
223 | { | |
224 | unsigned long tmo, stat; | |
225 | ||
226 | au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata)); | |
227 | au_sync(); | |
228 | ||
229 | /* wait for stop confirmation */ | |
230 | tmo = 1000000; | |
231 | while ((au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo) | |
232 | tmo--; | |
233 | ||
234 | /* if both TX and RX are idle, disable PSC */ | |
235 | stat = au_readl(I2S_STAT(pscdata)); | |
2b30a55d | 236 | if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) { |
4a161d23 ML |
237 | au_writel(0, I2S_CFG(pscdata)); |
238 | au_sync(); | |
239 | au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata)); | |
240 | au_sync(); | |
241 | } | |
242 | return 0; | |
243 | } | |
244 | ||
dee89c4d MB |
245 | static int au1xpsc_i2s_trigger(struct snd_pcm_substream *substream, int cmd, |
246 | struct snd_soc_dai *dai) | |
4a161d23 ML |
247 | { |
248 | struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata; | |
249 | int ret, stype = SUBSTREAM_TYPE(substream); | |
250 | ||
251 | switch (cmd) { | |
252 | case SNDRV_PCM_TRIGGER_START: | |
253 | case SNDRV_PCM_TRIGGER_RESUME: | |
254 | ret = au1xpsc_i2s_start(pscdata, stype); | |
255 | break; | |
256 | case SNDRV_PCM_TRIGGER_STOP: | |
257 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
258 | ret = au1xpsc_i2s_stop(pscdata, stype); | |
259 | break; | |
260 | default: | |
261 | ret = -EINVAL; | |
262 | } | |
263 | return ret; | |
264 | } | |
265 | ||
266 | static int au1xpsc_i2s_probe(struct platform_device *pdev, | |
267 | struct snd_soc_dai *dai) | |
0f83d639 ML |
268 | { |
269 | return au1xpsc_i2s_workdata ? 0 : -ENODEV; | |
270 | } | |
271 | ||
272 | static void au1xpsc_i2s_remove(struct platform_device *pdev, | |
273 | struct snd_soc_dai *dai) | |
274 | { | |
275 | } | |
276 | ||
277 | static struct snd_soc_dai_ops au1xpsc_i2s_dai_ops = { | |
278 | .trigger = au1xpsc_i2s_trigger, | |
279 | .hw_params = au1xpsc_i2s_hw_params, | |
280 | .set_fmt = au1xpsc_i2s_set_fmt, | |
281 | }; | |
282 | ||
283 | struct snd_soc_dai au1xpsc_i2s_dai = { | |
284 | .name = "au1xpsc_i2s", | |
285 | .probe = au1xpsc_i2s_probe, | |
286 | .remove = au1xpsc_i2s_remove, | |
287 | .playback = { | |
288 | .rates = AU1XPSC_I2S_RATES, | |
289 | .formats = AU1XPSC_I2S_FMTS, | |
290 | .channels_min = 2, | |
291 | .channels_max = 8, /* 2 without external help */ | |
292 | }, | |
293 | .capture = { | |
294 | .rates = AU1XPSC_I2S_RATES, | |
295 | .formats = AU1XPSC_I2S_FMTS, | |
296 | .channels_min = 2, | |
297 | .channels_max = 8, /* 2 without external help */ | |
298 | }, | |
299 | .ops = &au1xpsc_i2s_dai_ops, | |
300 | }; | |
301 | EXPORT_SYMBOL(au1xpsc_i2s_dai); | |
302 | ||
303 | static int __init au1xpsc_i2s_drvprobe(struct platform_device *pdev) | |
4a161d23 ML |
304 | { |
305 | struct resource *r; | |
306 | unsigned long sel; | |
307 | int ret; | |
0f83d639 | 308 | struct au1xpsc_audio_data *wd; |
4a161d23 ML |
309 | |
310 | if (au1xpsc_i2s_workdata) | |
311 | return -EBUSY; | |
312 | ||
0f83d639 ML |
313 | wd = kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL); |
314 | if (!wd) | |
4a161d23 ML |
315 | return -ENOMEM; |
316 | ||
317 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
318 | if (!r) { | |
319 | ret = -ENODEV; | |
320 | goto out0; | |
321 | } | |
322 | ||
323 | ret = -EBUSY; | |
0f83d639 | 324 | wd->ioarea = request_mem_region(r->start, r->end - r->start + 1, |
4a161d23 | 325 | "au1xpsc_i2s"); |
0f83d639 | 326 | if (!wd->ioarea) |
4a161d23 ML |
327 | goto out0; |
328 | ||
0f83d639 ML |
329 | wd->mmio = ioremap(r->start, 0xffff); |
330 | if (!wd->mmio) | |
4a161d23 ML |
331 | goto out1; |
332 | ||
333 | /* preserve PSC clock source set up by platform (dev.platform_data | |
334 | * is already occupied by soc layer) | |
335 | */ | |
0f83d639 ML |
336 | sel = au_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK; |
337 | au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); | |
4a161d23 | 338 | au_sync(); |
0f83d639 ML |
339 | au_writel(PSC_SEL_PS_I2SMODE | sel, PSC_SEL(wd)); |
340 | au_writel(0, I2S_CFG(wd)); | |
4a161d23 ML |
341 | au_sync(); |
342 | ||
343 | /* preconfigure: set max rx/tx fifo depths */ | |
0f83d639 | 344 | wd->cfg |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8; |
4a161d23 ML |
345 | |
346 | /* don't wait for I2S core to become ready now; clocks may not | |
347 | * be running yet; depending on clock input for PSC a wait might | |
348 | * time out. | |
349 | */ | |
350 | ||
0f83d639 ML |
351 | ret = snd_soc_register_dai(&au1xpsc_i2s_dai); |
352 | if (ret) | |
353 | goto out1; | |
4a161d23 | 354 | |
0f83d639 ML |
355 | /* finally add the DMA device for this PSC */ |
356 | wd->dmapd = au1xpsc_pcm_add(pdev); | |
357 | if (wd->dmapd) { | |
358 | platform_set_drvdata(pdev, wd); | |
359 | au1xpsc_i2s_workdata = wd; | |
360 | return 0; | |
361 | } | |
362 | ||
363 | snd_soc_unregister_dai(&au1xpsc_i2s_dai); | |
4a161d23 | 364 | out1: |
0f83d639 ML |
365 | release_resource(wd->ioarea); |
366 | kfree(wd->ioarea); | |
4a161d23 | 367 | out0: |
0f83d639 | 368 | kfree(wd); |
4a161d23 ML |
369 | return ret; |
370 | } | |
371 | ||
0f83d639 | 372 | static int __devexit au1xpsc_i2s_drvremove(struct platform_device *pdev) |
4a161d23 | 373 | { |
0f83d639 ML |
374 | struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev); |
375 | ||
376 | if (wd->dmapd) | |
377 | au1xpsc_pcm_destroy(wd->dmapd); | |
378 | ||
379 | snd_soc_unregister_dai(&au1xpsc_i2s_dai); | |
380 | ||
381 | au_writel(0, I2S_CFG(wd)); | |
4a161d23 | 382 | au_sync(); |
0f83d639 | 383 | au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); |
4a161d23 ML |
384 | au_sync(); |
385 | ||
0f83d639 ML |
386 | iounmap(wd->mmio); |
387 | release_resource(wd->ioarea); | |
388 | kfree(wd->ioarea); | |
389 | kfree(wd); | |
390 | ||
391 | au1xpsc_i2s_workdata = NULL; /* MDEV */ | |
392 | ||
393 | return 0; | |
4a161d23 ML |
394 | } |
395 | ||
0f83d639 ML |
396 | #ifdef CONFIG_PM |
397 | static int au1xpsc_i2s_drvsuspend(struct device *dev) | |
4a161d23 | 398 | { |
0f83d639 ML |
399 | struct au1xpsc_audio_data *wd = dev_get_drvdata(dev); |
400 | ||
4a161d23 | 401 | /* save interesting register and disable PSC */ |
0f83d639 | 402 | wd->pm[0] = au_readl(PSC_SEL(wd)); |
4a161d23 | 403 | |
0f83d639 | 404 | au_writel(0, I2S_CFG(wd)); |
4a161d23 | 405 | au_sync(); |
0f83d639 | 406 | au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); |
4a161d23 ML |
407 | au_sync(); |
408 | ||
409 | return 0; | |
410 | } | |
411 | ||
0f83d639 | 412 | static int au1xpsc_i2s_drvresume(struct device *dev) |
4a161d23 | 413 | { |
0f83d639 ML |
414 | struct au1xpsc_audio_data *wd = dev_get_drvdata(dev); |
415 | ||
4a161d23 | 416 | /* select I2S mode and PSC clock */ |
0f83d639 | 417 | au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); |
4a161d23 | 418 | au_sync(); |
0f83d639 | 419 | au_writel(0, PSC_SEL(wd)); |
4a161d23 | 420 | au_sync(); |
0f83d639 | 421 | au_writel(wd->pm[0], PSC_SEL(wd)); |
4a161d23 ML |
422 | au_sync(); |
423 | ||
424 | return 0; | |
425 | } | |
426 | ||
0f83d639 ML |
427 | static struct dev_pm_ops au1xpsci2s_pmops = { |
428 | .suspend = au1xpsc_i2s_drvsuspend, | |
429 | .resume = au1xpsc_i2s_drvresume, | |
6335d055 EM |
430 | }; |
431 | ||
0f83d639 ML |
432 | #define AU1XPSCI2S_PMOPS &au1xpsci2s_pmops |
433 | ||
434 | #else | |
435 | ||
436 | #define AU1XPSCI2S_PMOPS NULL | |
437 | ||
438 | #endif | |
439 | ||
440 | static struct platform_driver au1xpsc_i2s_driver = { | |
441 | .driver = { | |
442 | .name = "au1xpsc_i2s", | |
443 | .owner = THIS_MODULE, | |
444 | .pm = AU1XPSCI2S_PMOPS, | |
4a161d23 | 445 | }, |
0f83d639 ML |
446 | .probe = au1xpsc_i2s_drvprobe, |
447 | .remove = __devexit_p(au1xpsc_i2s_drvremove), | |
4a161d23 | 448 | }; |
4a161d23 | 449 | |
0f83d639 | 450 | static int __init au1xpsc_i2s_load(void) |
4a161d23 ML |
451 | { |
452 | au1xpsc_i2s_workdata = NULL; | |
0f83d639 | 453 | return platform_driver_register(&au1xpsc_i2s_driver); |
4a161d23 ML |
454 | } |
455 | ||
0f83d639 | 456 | static void __exit au1xpsc_i2s_unload(void) |
4a161d23 | 457 | { |
0f83d639 | 458 | platform_driver_unregister(&au1xpsc_i2s_driver); |
4a161d23 ML |
459 | } |
460 | ||
0f83d639 ML |
461 | module_init(au1xpsc_i2s_load); |
462 | module_exit(au1xpsc_i2s_unload); | |
4a161d23 ML |
463 | |
464 | MODULE_LICENSE("GPL"); | |
465 | MODULE_DESCRIPTION("Au12x0/Au1550 PSC I2S ALSA ASoC audio driver"); | |
0f83d639 | 466 | MODULE_AUTHOR("Manuel Lauss"); |