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1/*
2 * skl-topology.c - Implements Platform component ALSA controls/widget
3 * handlers.
4 *
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19#include <linux/slab.h>
20#include <linux/types.h>
21#include <linux/firmware.h>
22#include <sound/soc.h>
23#include <sound/soc-topology.h>
24#include "skl-sst-dsp.h"
25#include "skl-sst-ipc.h"
26#include "skl-topology.h"
27#include "skl.h"
28#include "skl-tplg-interface.h"
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29#include "../common/sst-dsp.h"
30#include "../common/sst-dsp-priv.h"
e4e2d2f4 31
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32#define SKL_CH_FIXUP_MASK (1 << 0)
33#define SKL_RATE_FIXUP_MASK (1 << 1)
34#define SKL_FMT_FIXUP_MASK (1 << 2)
35
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36/*
37 * SKL DSP driver modelling uses only few DAPM widgets so for rest we will
38 * ignore. This helpers checks if the SKL driver handles this widget type
39 */
40static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w)
41{
42 switch (w->id) {
43 case snd_soc_dapm_dai_link:
44 case snd_soc_dapm_dai_in:
45 case snd_soc_dapm_aif_in:
46 case snd_soc_dapm_aif_out:
47 case snd_soc_dapm_dai_out:
48 case snd_soc_dapm_switch:
49 return false;
50 default:
51 return true;
52 }
53}
54
55/*
56 * Each pipelines needs memory to be allocated. Check if we have free memory
9ba8ffef 57 * from available pool.
e4e2d2f4 58 */
9ba8ffef 59static bool skl_is_pipe_mem_avail(struct skl *skl,
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60 struct skl_module_cfg *mconfig)
61{
62 struct skl_sst *ctx = skl->skl_sst;
63
64 if (skl->resource.mem + mconfig->pipe->memory_pages >
65 skl->resource.max_mem) {
66 dev_err(ctx->dev,
67 "%s: module_id %d instance %d\n", __func__,
68 mconfig->id.module_id,
69 mconfig->id.instance_id);
70 dev_err(ctx->dev,
71 "exceeds ppl memory available %d mem %d\n",
72 skl->resource.max_mem, skl->resource.mem);
73 return false;
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74 } else {
75 return true;
e4e2d2f4 76 }
9ba8ffef 77}
e4e2d2f4 78
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79/*
80 * Add the mem to the mem pool. This is freed when pipe is deleted.
81 * Note: DSP does actual memory management we only keep track for complete
82 * pool
83 */
84static void skl_tplg_alloc_pipe_mem(struct skl *skl,
85 struct skl_module_cfg *mconfig)
86{
e4e2d2f4 87 skl->resource.mem += mconfig->pipe->memory_pages;
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88}
89
90/*
91 * Pipeline needs needs DSP CPU resources for computation, this is
92 * quantified in MCPS (Million Clocks Per Second) required for module/pipe
93 *
94 * Each pipelines needs mcps to be allocated. Check if we have mcps for this
9ba8ffef 95 * pipe.
e4e2d2f4 96 */
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97
98static bool skl_is_pipe_mcps_avail(struct skl *skl,
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99 struct skl_module_cfg *mconfig)
100{
101 struct skl_sst *ctx = skl->skl_sst;
102
103 if (skl->resource.mcps + mconfig->mcps > skl->resource.max_mcps) {
104 dev_err(ctx->dev,
105 "%s: module_id %d instance %d\n", __func__,
106 mconfig->id.module_id, mconfig->id.instance_id);
107 dev_err(ctx->dev,
7ca42f5a 108 "exceeds ppl mcps available %d > mem %d\n",
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109 skl->resource.max_mcps, skl->resource.mcps);
110 return false;
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111 } else {
112 return true;
e4e2d2f4 113 }
9ba8ffef 114}
e4e2d2f4 115
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116static void skl_tplg_alloc_pipe_mcps(struct skl *skl,
117 struct skl_module_cfg *mconfig)
118{
e4e2d2f4 119 skl->resource.mcps += mconfig->mcps;
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120}
121
122/*
123 * Free the mcps when tearing down
124 */
125static void
126skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig)
127{
128 skl->resource.mcps -= mconfig->mcps;
129}
130
131/*
132 * Free the memory when tearing down
133 */
134static void
135skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig)
136{
137 skl->resource.mem -= mconfig->pipe->memory_pages;
138}
139
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140
141static void skl_dump_mconfig(struct skl_sst *ctx,
142 struct skl_module_cfg *mcfg)
143{
144 dev_dbg(ctx->dev, "Dumping config\n");
145 dev_dbg(ctx->dev, "Input Format:\n");
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146 dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt[0].channels);
147 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt[0].s_freq);
148 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt[0].ch_cfg);
149 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->in_fmt[0].valid_bit_depth);
f7590d4f 150 dev_dbg(ctx->dev, "Output Format:\n");
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151 dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt[0].channels);
152 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt[0].s_freq);
153 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->out_fmt[0].valid_bit_depth);
154 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt[0].ch_cfg);
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155}
156
157static void skl_tplg_update_params(struct skl_module_fmt *fmt,
158 struct skl_pipe_params *params, int fixup)
159{
160 if (fixup & SKL_RATE_FIXUP_MASK)
161 fmt->s_freq = params->s_freq;
162 if (fixup & SKL_CH_FIXUP_MASK)
163 fmt->channels = params->ch;
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164 if (fixup & SKL_FMT_FIXUP_MASK) {
165 fmt->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
166
167 /*
168 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
169 * container so update bit depth accordingly
170 */
171 switch (fmt->valid_bit_depth) {
172 case SKL_DEPTH_16BIT:
173 fmt->bit_depth = fmt->valid_bit_depth;
174 break;
175
176 default:
177 fmt->bit_depth = SKL_DEPTH_32BIT;
178 break;
179 }
180 }
181
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182}
183
184/*
185 * A pipeline may have modules which impact the pcm parameters, like SRC,
186 * channel converter, format converter.
187 * We need to calculate the output params by applying the 'fixup'
188 * Topology will tell driver which type of fixup is to be applied by
189 * supplying the fixup mask, so based on that we calculate the output
190 *
191 * Now In FE the pcm hw_params is source/target format. Same is applicable
192 * for BE with its hw_params invoked.
193 * here based on FE, BE pipeline and direction we calculate the input and
194 * outfix and then apply that for a module
195 */
196static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg,
197 struct skl_pipe_params *params, bool is_fe)
198{
199 int in_fixup, out_fixup;
200 struct skl_module_fmt *in_fmt, *out_fmt;
201
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202 /* Fixups will be applied to pin 0 only */
203 in_fmt = &m_cfg->in_fmt[0];
204 out_fmt = &m_cfg->out_fmt[0];
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205
206 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
207 if (is_fe) {
208 in_fixup = m_cfg->params_fixup;
209 out_fixup = (~m_cfg->converter) &
210 m_cfg->params_fixup;
211 } else {
212 out_fixup = m_cfg->params_fixup;
213 in_fixup = (~m_cfg->converter) &
214 m_cfg->params_fixup;
215 }
216 } else {
217 if (is_fe) {
218 out_fixup = m_cfg->params_fixup;
219 in_fixup = (~m_cfg->converter) &
220 m_cfg->params_fixup;
221 } else {
222 in_fixup = m_cfg->params_fixup;
223 out_fixup = (~m_cfg->converter) &
224 m_cfg->params_fixup;
225 }
226 }
227
228 skl_tplg_update_params(in_fmt, params, in_fixup);
229 skl_tplg_update_params(out_fmt, params, out_fixup);
230}
231
232/*
233 * A module needs input and output buffers, which are dependent upon pcm
234 * params, so once we have calculate params, we need buffer calculation as
235 * well.
236 */
237static void skl_tplg_update_buffer_size(struct skl_sst *ctx,
238 struct skl_module_cfg *mcfg)
239{
240 int multiplier = 1;
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241 struct skl_module_fmt *in_fmt, *out_fmt;
242
243
244 /* Since fixups is applied to pin 0 only, ibs, obs needs
245 * change for pin 0 only
246 */
247 in_fmt = &mcfg->in_fmt[0];
248 out_fmt = &mcfg->out_fmt[0];
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249
250 if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
251 multiplier = 5;
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252 mcfg->ibs = (in_fmt->s_freq / 1000) *
253 (mcfg->in_fmt->channels) *
254 (mcfg->in_fmt->bit_depth >> 3) *
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255 multiplier;
256
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257 mcfg->obs = (mcfg->out_fmt->s_freq / 1000) *
258 (mcfg->out_fmt->channels) *
259 (mcfg->out_fmt->bit_depth >> 3) *
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260 multiplier;
261}
262
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263static int skl_tplg_update_be_blob(struct snd_soc_dapm_widget *w,
264 struct skl_sst *ctx)
265{
266 struct skl_module_cfg *m_cfg = w->priv;
267 int link_type, dir;
268 u32 ch, s_freq, s_fmt;
269 struct nhlt_specific_cfg *cfg;
270 struct skl *skl = get_skl_ctx(ctx->dev);
271
272 /* check if we already have blob */
273 if (m_cfg->formats_config.caps_size > 0)
274 return 0;
275
276 switch (m_cfg->dev_type) {
277 case SKL_DEVICE_DMIC:
278 link_type = NHLT_LINK_DMIC;
279 dir = 1;
280 s_freq = m_cfg->in_fmt[0].s_freq;
281 s_fmt = m_cfg->in_fmt[0].bit_depth;
282 ch = m_cfg->in_fmt[0].channels;
283 break;
284
285 case SKL_DEVICE_I2S:
286 link_type = NHLT_LINK_SSP;
287 if (m_cfg->hw_conn_type == SKL_CONN_SOURCE) {
288 dir = 1;
289 s_freq = m_cfg->in_fmt[0].s_freq;
290 s_fmt = m_cfg->in_fmt[0].bit_depth;
291 ch = m_cfg->in_fmt[0].channels;
292 } else {
293 dir = 0;
294 s_freq = m_cfg->out_fmt[0].s_freq;
295 s_fmt = m_cfg->out_fmt[0].bit_depth;
296 ch = m_cfg->out_fmt[0].channels;
297 }
298 break;
299
300 default:
301 return -EINVAL;
302 }
303
304 /* update the blob based on virtual bus_id and default params */
305 cfg = skl_get_ep_blob(skl, m_cfg->vbus_id, link_type,
306 s_fmt, ch, s_freq, dir);
307 if (cfg) {
308 m_cfg->formats_config.caps_size = cfg->size;
309 m_cfg->formats_config.caps = (u32 *) &cfg->caps;
310 } else {
311 dev_err(ctx->dev, "Blob NULL for id %x type %d dirn %d\n",
312 m_cfg->vbus_id, link_type, dir);
313 dev_err(ctx->dev, "PCM: ch %d, freq %d, fmt %d\n",
314 ch, s_freq, s_fmt);
315 return -EIO;
316 }
317
318 return 0;
319}
320
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321static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w,
322 struct skl_sst *ctx)
323{
324 struct skl_module_cfg *m_cfg = w->priv;
325 struct skl_pipe_params *params = m_cfg->pipe->p_params;
326 int p_conn_type = m_cfg->pipe->conn_type;
327 bool is_fe;
328
329 if (!m_cfg->params_fixup)
330 return;
331
332 dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n",
333 w->name);
334
335 skl_dump_mconfig(ctx, m_cfg);
336
337 if (p_conn_type == SKL_PIPE_CONN_TYPE_FE)
338 is_fe = true;
339 else
340 is_fe = false;
341
342 skl_tplg_update_params_fixup(m_cfg, params, is_fe);
343 skl_tplg_update_buffer_size(ctx, m_cfg);
344
345 dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n",
346 w->name);
347
348 skl_dump_mconfig(ctx, m_cfg);
349}
350
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351/*
352 * A pipe can have multiple modules, each of them will be a DAPM widget as
353 * well. While managing a pipeline we need to get the list of all the
354 * widgets in a pipelines, so this helper - skl_tplg_get_pipe_widget() helps
355 * to get the SKL type widgets in that pipeline
356 */
357static int skl_tplg_alloc_pipe_widget(struct device *dev,
358 struct snd_soc_dapm_widget *w, struct skl_pipe *pipe)
359{
360 struct skl_module_cfg *src_module = NULL;
361 struct snd_soc_dapm_path *p = NULL;
362 struct skl_pipe_module *p_module = NULL;
363
364 p_module = devm_kzalloc(dev, sizeof(*p_module), GFP_KERNEL);
365 if (!p_module)
366 return -ENOMEM;
367
368 p_module->w = w;
369 list_add_tail(&p_module->node, &pipe->w_list);
370
371 snd_soc_dapm_widget_for_each_sink_path(w, p) {
372 if ((p->sink->priv == NULL)
373 && (!is_skl_dsp_widget_type(w)))
374 continue;
375
376 if ((p->sink->priv != NULL) && p->connect
377 && is_skl_dsp_widget_type(p->sink)) {
378
379 src_module = p->sink->priv;
380 if (pipe->ppl_id == src_module->pipe->ppl_id)
381 skl_tplg_alloc_pipe_widget(dev,
382 p->sink, pipe);
383 }
384 }
385 return 0;
386}
387
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388/*
389 * some modules can have multiple params set from user control and
390 * need to be set after module is initialized. If set_param flag is
391 * set module params will be done after module is initialised.
392 */
393static int skl_tplg_set_module_params(struct snd_soc_dapm_widget *w,
394 struct skl_sst *ctx)
395{
396 int i, ret;
397 struct skl_module_cfg *mconfig = w->priv;
398 const struct snd_kcontrol_new *k;
399 struct soc_bytes_ext *sb;
400 struct skl_algo_data *bc;
401 struct skl_specific_cfg *sp_cfg;
402
403 if (mconfig->formats_config.caps_size > 0 &&
4ced1827 404 mconfig->formats_config.set_params == SKL_PARAM_SET) {
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405 sp_cfg = &mconfig->formats_config;
406 ret = skl_set_module_params(ctx, sp_cfg->caps,
407 sp_cfg->caps_size,
408 sp_cfg->param_id, mconfig);
409 if (ret < 0)
410 return ret;
411 }
412
413 for (i = 0; i < w->num_kcontrols; i++) {
414 k = &w->kcontrol_news[i];
415 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
416 sb = (void *) k->private_value;
417 bc = (struct skl_algo_data *)sb->dobj.private;
418
4ced1827 419 if (bc->set_params == SKL_PARAM_SET) {
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420 ret = skl_set_module_params(ctx,
421 (u32 *)bc->params, bc->max,
422 bc->param_id, mconfig);
423 if (ret < 0)
424 return ret;
425 }
426 }
427 }
428
429 return 0;
430}
431
432/*
433 * some module param can set from user control and this is required as
434 * when module is initailzed. if module param is required in init it is
435 * identifed by set_param flag. if set_param flag is not set, then this
436 * parameter needs to set as part of module init.
437 */
438static int skl_tplg_set_module_init_data(struct snd_soc_dapm_widget *w)
439{
440 const struct snd_kcontrol_new *k;
441 struct soc_bytes_ext *sb;
442 struct skl_algo_data *bc;
443 struct skl_module_cfg *mconfig = w->priv;
444 int i;
445
446 for (i = 0; i < w->num_kcontrols; i++) {
447 k = &w->kcontrol_news[i];
448 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
449 sb = (struct soc_bytes_ext *)k->private_value;
450 bc = (struct skl_algo_data *)sb->dobj.private;
451
4ced1827 452 if (bc->set_params != SKL_PARAM_INIT)
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453 continue;
454
455 mconfig->formats_config.caps = (u32 *)&bc->params;
456 mconfig->formats_config.caps_size = bc->max;
457
458 break;
459 }
460 }
461
462 return 0;
463}
464
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465/*
466 * Inside a pipe instance, we can have various modules. These modules need
467 * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by
468 * skl_init_module() routine, so invoke that for all modules in a pipeline
469 */
470static int
471skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe)
472{
473 struct skl_pipe_module *w_module;
474 struct snd_soc_dapm_widget *w;
475 struct skl_module_cfg *mconfig;
476 struct skl_sst *ctx = skl->skl_sst;
477 int ret = 0;
478
479 list_for_each_entry(w_module, &pipe->w_list, node) {
480 w = w_module->w;
481 mconfig = w->priv;
482
483 /* check resource available */
9ba8ffef 484 if (!skl_is_pipe_mcps_avail(skl, mconfig))
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485 return -ENOMEM;
486
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487 if (mconfig->is_loadable && ctx->dsp->fw_ops.load_mod) {
488 ret = ctx->dsp->fw_ops.load_mod(ctx->dsp,
489 mconfig->id.module_id, mconfig->guid);
490 if (ret < 0)
491 return ret;
492 }
493
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494 /* update blob if blob is null for be with default value */
495 skl_tplg_update_be_blob(w, ctx);
496
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497 /*
498 * apply fix/conversion to module params based on
499 * FE/BE params
500 */
501 skl_tplg_update_module_params(w, ctx);
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502
503 skl_tplg_set_module_init_data(w);
9939a9c3 504 ret = skl_init_module(ctx, mconfig);
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505 if (ret < 0)
506 return ret;
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507
508 ret = skl_tplg_set_module_params(w, ctx);
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509 if (ret < 0)
510 return ret;
9ba8ffef 511 skl_tplg_alloc_pipe_mcps(skl, mconfig);
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512 }
513
514 return 0;
515}
d93f8e55 516
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517static int skl_tplg_unload_pipe_modules(struct skl_sst *ctx,
518 struct skl_pipe *pipe)
519{
520 struct skl_pipe_module *w_module = NULL;
521 struct skl_module_cfg *mconfig = NULL;
522
523 list_for_each_entry(w_module, &pipe->w_list, node) {
524 mconfig = w_module->w->priv;
525
526 if (mconfig->is_loadable && ctx->dsp->fw_ops.unload_mod)
527 return ctx->dsp->fw_ops.unload_mod(ctx->dsp,
528 mconfig->id.module_id);
529 }
530
531 /* no modules to unload in this path, so return */
532 return 0;
533}
534
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535/*
536 * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we
537 * need create the pipeline. So we do following:
538 * - check the resources
539 * - Create the pipeline
540 * - Initialize the modules in pipeline
541 * - finally bind all modules together
542 */
543static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
544 struct skl *skl)
545{
546 int ret;
547 struct skl_module_cfg *mconfig = w->priv;
548 struct skl_pipe_module *w_module;
549 struct skl_pipe *s_pipe = mconfig->pipe;
550 struct skl_module_cfg *src_module = NULL, *dst_module;
551 struct skl_sst *ctx = skl->skl_sst;
552
553 /* check resource available */
9ba8ffef 554 if (!skl_is_pipe_mcps_avail(skl, mconfig))
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555 return -EBUSY;
556
9ba8ffef 557 if (!skl_is_pipe_mem_avail(skl, mconfig))
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558 return -ENOMEM;
559
560 /*
561 * Create a list of modules for pipe.
562 * This list contains modules from source to sink
563 */
564 ret = skl_create_pipeline(ctx, mconfig->pipe);
565 if (ret < 0)
566 return ret;
567
568 /*
569 * we create a w_list of all widgets in that pipe. This list is not
570 * freed on PMD event as widgets within a pipe are static. This
571 * saves us cycles to get widgets in pipe every time.
572 *
573 * So if we have already initialized all the widgets of a pipeline
574 * we skip, so check for list_empty and create the list if empty
575 */
576 if (list_empty(&s_pipe->w_list)) {
577 ret = skl_tplg_alloc_pipe_widget(ctx->dev, w, s_pipe);
578 if (ret < 0)
579 return ret;
580 }
581
582 /* Init all pipe modules from source to sink */
583 ret = skl_tplg_init_pipe_modules(skl, s_pipe);
584 if (ret < 0)
585 return ret;
586
587 /* Bind modules from source to sink */
588 list_for_each_entry(w_module, &s_pipe->w_list, node) {
589 dst_module = w_module->w->priv;
590
591 if (src_module == NULL) {
592 src_module = dst_module;
593 continue;
594 }
595
596 ret = skl_bind_modules(ctx, src_module, dst_module);
597 if (ret < 0)
598 return ret;
599
600 src_module = dst_module;
601 }
602
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603 skl_tplg_alloc_pipe_mem(skl, mconfig);
604 skl_tplg_alloc_pipe_mcps(skl, mconfig);
605
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606 return 0;
607}
608
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609/*
610 * Some modules require params to be set after the module is bound to
611 * all pins connected.
612 *
613 * The module provider initializes set_param flag for such modules and we
614 * send params after binding
615 */
616static int skl_tplg_set_module_bind_params(struct snd_soc_dapm_widget *w,
617 struct skl_module_cfg *mcfg, struct skl_sst *ctx)
618{
619 int i, ret;
620 struct skl_module_cfg *mconfig = w->priv;
621 const struct snd_kcontrol_new *k;
622 struct soc_bytes_ext *sb;
623 struct skl_algo_data *bc;
624 struct skl_specific_cfg *sp_cfg;
625
626 /*
627 * check all out/in pins are in bind state.
628 * if so set the module param
629 */
630 for (i = 0; i < mcfg->max_out_queue; i++) {
631 if (mcfg->m_out_pin[i].pin_state != SKL_PIN_BIND_DONE)
632 return 0;
633 }
634
635 for (i = 0; i < mcfg->max_in_queue; i++) {
636 if (mcfg->m_in_pin[i].pin_state != SKL_PIN_BIND_DONE)
637 return 0;
638 }
639
640 if (mconfig->formats_config.caps_size > 0 &&
641 mconfig->formats_config.set_params == SKL_PARAM_BIND) {
642 sp_cfg = &mconfig->formats_config;
643 ret = skl_set_module_params(ctx, sp_cfg->caps,
644 sp_cfg->caps_size,
645 sp_cfg->param_id, mconfig);
646 if (ret < 0)
647 return ret;
648 }
649
650 for (i = 0; i < w->num_kcontrols; i++) {
651 k = &w->kcontrol_news[i];
652 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
653 sb = (void *) k->private_value;
654 bc = (struct skl_algo_data *)sb->dobj.private;
655
656 if (bc->set_params == SKL_PARAM_BIND) {
657 ret = skl_set_module_params(ctx,
658 (u32 *)bc->params, bc->max,
659 bc->param_id, mconfig);
660 if (ret < 0)
661 return ret;
662 }
663 }
664 }
665
666 return 0;
667}
668
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669static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w,
670 struct skl *skl,
6bd4cf85 671 struct snd_soc_dapm_widget *src_w,
8724ff17 672 struct skl_module_cfg *src_mconfig)
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673{
674 struct snd_soc_dapm_path *p;
0ed95d76 675 struct snd_soc_dapm_widget *sink = NULL, *next_sink = NULL;
8724ff17 676 struct skl_module_cfg *sink_mconfig;
d93f8e55 677 struct skl_sst *ctx = skl->skl_sst;
8724ff17 678 int ret;
d93f8e55 679
8724ff17 680 snd_soc_dapm_widget_for_each_sink_path(w, p) {
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681 if (!p->connect)
682 continue;
683
684 dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name);
685 dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name);
686
0ed95d76 687 next_sink = p->sink;
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688
689 if (!is_skl_dsp_widget_type(p->sink))
690 return skl_tplg_bind_sinks(p->sink, skl, src_w, src_mconfig);
691
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692 /*
693 * here we will check widgets in sink pipelines, so that
694 * can be any widgets type and we are only interested if
695 * they are ones used for SKL so check that first
696 */
697 if ((p->sink->priv != NULL) &&
698 is_skl_dsp_widget_type(p->sink)) {
699
700 sink = p->sink;
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701 sink_mconfig = sink->priv;
702
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703 if (src_mconfig->m_state == SKL_MODULE_UNINIT ||
704 sink_mconfig->m_state == SKL_MODULE_UNINIT)
705 continue;
706
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707 /* Bind source to sink, mixin is always source */
708 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
709 if (ret)
710 return ret;
711
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712 /* set module params after bind */
713 skl_tplg_set_module_bind_params(src_w, src_mconfig, ctx);
714 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
715
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716 /* Start sinks pipe first */
717 if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) {
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718 if (sink_mconfig->pipe->conn_type !=
719 SKL_PIPE_CONN_TYPE_FE)
720 ret = skl_run_pipe(ctx,
721 sink_mconfig->pipe);
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722 if (ret)
723 return ret;
724 }
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725 }
726 }
727
8724ff17 728 if (!sink)
6bd4cf85 729 return skl_tplg_bind_sinks(next_sink, skl, src_w, src_mconfig);
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730
731 return 0;
732}
733
734/*
735 * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA
736 * we need to do following:
737 * - Bind to sink pipeline
738 * Since the sink pipes can be running and we don't get mixer event on
739 * connect for already running mixer, we need to find the sink pipes
740 * here and bind to them. This way dynamic connect works.
741 * - Start sink pipeline, if not running
742 * - Then run current pipe
743 */
744static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
745 struct skl *skl)
746{
747 struct skl_module_cfg *src_mconfig;
748 struct skl_sst *ctx = skl->skl_sst;
749 int ret = 0;
750
751 src_mconfig = w->priv;
752
753 /*
754 * find which sink it is connected to, bind with the sink,
755 * if sink is not started, start sink pipe first, then start
756 * this pipe
757 */
6bd4cf85 758 ret = skl_tplg_bind_sinks(w, skl, w, src_mconfig);
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759 if (ret)
760 return ret;
761
d93f8e55 762 /* Start source pipe last after starting all sinks */
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763 if (src_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
764 return skl_run_pipe(ctx, src_mconfig->pipe);
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765
766 return 0;
767}
768
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769static struct snd_soc_dapm_widget *skl_get_src_dsp_widget(
770 struct snd_soc_dapm_widget *w, struct skl *skl)
771{
772 struct snd_soc_dapm_path *p;
773 struct snd_soc_dapm_widget *src_w = NULL;
774 struct skl_sst *ctx = skl->skl_sst;
775
776 snd_soc_dapm_widget_for_each_source_path(w, p) {
777 src_w = p->source;
778 if (!p->connect)
779 continue;
780
781 dev_dbg(ctx->dev, "sink widget=%s\n", w->name);
782 dev_dbg(ctx->dev, "src widget=%s\n", p->source->name);
783
784 /*
785 * here we will check widgets in sink pipelines, so that can
786 * be any widgets type and we are only interested if they are
787 * ones used for SKL so check that first
788 */
789 if ((p->source->priv != NULL) &&
790 is_skl_dsp_widget_type(p->source)) {
791 return p->source;
792 }
793 }
794
795 if (src_w != NULL)
796 return skl_get_src_dsp_widget(src_w, skl);
797
798 return NULL;
799}
800
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801/*
802 * in the Post-PMU event of mixer we need to do following:
803 * - Check if this pipe is running
804 * - if not, then
805 * - bind this pipeline to its source pipeline
806 * if source pipe is already running, this means it is a dynamic
807 * connection and we need to bind only to that pipe
808 * - start this pipeline
809 */
810static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w,
811 struct skl *skl)
812{
813 int ret = 0;
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814 struct snd_soc_dapm_widget *source, *sink;
815 struct skl_module_cfg *src_mconfig, *sink_mconfig;
816 struct skl_sst *ctx = skl->skl_sst;
817 int src_pipe_started = 0;
818
819 sink = w;
820 sink_mconfig = sink->priv;
821
822 /*
823 * If source pipe is already started, that means source is driving
824 * one more sink before this sink got connected, Since source is
825 * started, bind this sink to source and start this pipe.
826 */
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827 source = skl_get_src_dsp_widget(w, skl);
828 if (source != NULL) {
829 src_mconfig = source->priv;
830 sink_mconfig = sink->priv;
831 src_pipe_started = 1;
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832
833 /*
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834 * check pipe state, then no need to bind or start the
835 * pipe
d93f8e55 836 */
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837 if (src_mconfig->pipe->state != SKL_PIPE_STARTED)
838 src_pipe_started = 0;
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839 }
840
841 if (src_pipe_started) {
842 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
843 if (ret)
844 return ret;
845
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846 /* set module params after bind */
847 skl_tplg_set_module_bind_params(source, src_mconfig, ctx);
848 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
849
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850 if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
851 ret = skl_run_pipe(ctx, sink_mconfig->pipe);
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852 }
853
854 return ret;
855}
856
857/*
858 * in the Pre-PMD event of mixer we need to do following:
859 * - Stop the pipe
860 * - find the source connections and remove that from dapm_path_list
861 * - unbind with source pipelines if still connected
862 */
863static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w,
864 struct skl *skl)
865{
d93f8e55 866 struct skl_module_cfg *src_mconfig, *sink_mconfig;
ce1b5551 867 int ret = 0, i;
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868 struct skl_sst *ctx = skl->skl_sst;
869
ce1b5551 870 sink_mconfig = w->priv;
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871
872 /* Stop the pipe */
873 ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
874 if (ret)
875 return ret;
876
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877 for (i = 0; i < sink_mconfig->max_in_queue; i++) {
878 if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) {
879 src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg;
880 if (!src_mconfig)
881 continue;
882 /*
883 * If path_found == 1, that means pmd for source
884 * pipe has not occurred, source is connected to
885 * some other sink. so its responsibility of sink
886 * to unbind itself from source.
887 */
888 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
889 if (ret < 0)
890 return ret;
d93f8e55 891
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892 ret = skl_unbind_modules(ctx,
893 src_mconfig, sink_mconfig);
d93f8e55 894 }
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895 }
896
897 return ret;
898}
899
900/*
901 * in the Post-PMD event of mixer we need to do following:
902 * - Free the mcps used
903 * - Free the mem used
904 * - Unbind the modules within the pipeline
905 * - Delete the pipeline (modules are not required to be explicitly
906 * deleted, pipeline delete is enough here
907 */
908static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
909 struct skl *skl)
910{
911 struct skl_module_cfg *mconfig = w->priv;
912 struct skl_pipe_module *w_module;
913 struct skl_module_cfg *src_module = NULL, *dst_module;
914 struct skl_sst *ctx = skl->skl_sst;
915 struct skl_pipe *s_pipe = mconfig->pipe;
916 int ret = 0;
917
918 skl_tplg_free_pipe_mcps(skl, mconfig);
65976878 919 skl_tplg_free_pipe_mem(skl, mconfig);
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920
921 list_for_each_entry(w_module, &s_pipe->w_list, node) {
922 dst_module = w_module->w->priv;
923
7ae3cb15 924 skl_tplg_free_pipe_mcps(skl, dst_module);
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925 if (src_module == NULL) {
926 src_module = dst_module;
927 continue;
928 }
929
7ca42f5a 930 skl_unbind_modules(ctx, src_module, dst_module);
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931 src_module = dst_module;
932 }
933
934 ret = skl_delete_pipe(ctx, mconfig->pipe);
d93f8e55 935
6c5768b3 936 return skl_tplg_unload_pipe_modules(ctx, s_pipe);
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937}
938
939/*
940 * in the Post-PMD event of PGA we need to do following:
941 * - Free the mcps used
942 * - Stop the pipeline
943 * - In source pipe is connected, unbind with source pipelines
944 */
945static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
946 struct skl *skl)
947{
d93f8e55 948 struct skl_module_cfg *src_mconfig, *sink_mconfig;
ce1b5551 949 int ret = 0, i;
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950 struct skl_sst *ctx = skl->skl_sst;
951
ce1b5551 952 src_mconfig = w->priv;
d93f8e55 953
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954 /* Stop the pipe since this is a mixin module */
955 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
956 if (ret)
957 return ret;
958
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959 for (i = 0; i < src_mconfig->max_out_queue; i++) {
960 if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) {
961 sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg;
962 if (!sink_mconfig)
963 continue;
964 /*
965 * This is a connecter and if path is found that means
966 * unbind between source and sink has not happened yet
967 */
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968 ret = skl_unbind_modules(ctx, src_mconfig,
969 sink_mconfig);
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970 }
971 }
972
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973 return ret;
974}
975
976/*
977 * In modelling, we assume there will be ONLY one mixer in a pipeline. If
978 * mixer is not required then it is treated as static mixer aka vmixer with
979 * a hard path to source module
980 * So we don't need to check if source is started or not as hard path puts
981 * dependency on each other
982 */
983static int skl_tplg_vmixer_event(struct snd_soc_dapm_widget *w,
984 struct snd_kcontrol *k, int event)
985{
986 struct snd_soc_dapm_context *dapm = w->dapm;
987 struct skl *skl = get_skl_ctx(dapm->dev);
988
989 switch (event) {
990 case SND_SOC_DAPM_PRE_PMU:
991 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
992
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993 case SND_SOC_DAPM_POST_PMU:
994 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
995
996 case SND_SOC_DAPM_PRE_PMD:
997 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
998
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999 case SND_SOC_DAPM_POST_PMD:
1000 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
1001 }
1002
1003 return 0;
1004}
1005
1006/*
1007 * In modelling, we assume there will be ONLY one mixer in a pipeline. If a
1008 * second one is required that is created as another pipe entity.
1009 * The mixer is responsible for pipe management and represent a pipeline
1010 * instance
1011 */
1012static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w,
1013 struct snd_kcontrol *k, int event)
1014{
1015 struct snd_soc_dapm_context *dapm = w->dapm;
1016 struct skl *skl = get_skl_ctx(dapm->dev);
1017
1018 switch (event) {
1019 case SND_SOC_DAPM_PRE_PMU:
1020 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
1021
1022 case SND_SOC_DAPM_POST_PMU:
1023 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
1024
1025 case SND_SOC_DAPM_PRE_PMD:
1026 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
1027
1028 case SND_SOC_DAPM_POST_PMD:
1029 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
1030 }
1031
1032 return 0;
1033}
1034
1035/*
1036 * In modelling, we assumed rest of the modules in pipeline are PGA. But we
1037 * are interested in last PGA (leaf PGA) in a pipeline to disconnect with
1038 * the sink when it is running (two FE to one BE or one FE to two BE)
1039 * scenarios
1040 */
1041static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w,
1042 struct snd_kcontrol *k, int event)
1043
1044{
1045 struct snd_soc_dapm_context *dapm = w->dapm;
1046 struct skl *skl = get_skl_ctx(dapm->dev);
1047
1048 switch (event) {
1049 case SND_SOC_DAPM_PRE_PMU:
1050 return skl_tplg_pga_dapm_pre_pmu_event(w, skl);
1051
1052 case SND_SOC_DAPM_POST_PMD:
1053 return skl_tplg_pga_dapm_post_pmd_event(w, skl);
1054 }
1055
1056 return 0;
1057}
cfb0a873 1058
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1059static int skl_tplg_tlv_control_get(struct snd_kcontrol *kcontrol,
1060 unsigned int __user *data, unsigned int size)
1061{
1062 struct soc_bytes_ext *sb =
1063 (struct soc_bytes_ext *)kcontrol->private_value;
1064 struct skl_algo_data *bc = (struct skl_algo_data *)sb->dobj.private;
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1065 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1066 struct skl_module_cfg *mconfig = w->priv;
1067 struct skl *skl = get_skl_ctx(w->dapm->dev);
1068
1069 if (w->power)
1070 skl_get_module_params(skl->skl_sst, (u32 *)bc->params,
1071 bc->max, bc->param_id, mconfig);
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1073 /* decrement size for TLV header */
1074 size -= 2 * sizeof(u32);
1075
1076 /* check size as we don't want to send kernel data */
1077 if (size > bc->max)
1078 size = bc->max;
1079
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1080 if (bc->params) {
1081 if (copy_to_user(data, &bc->param_id, sizeof(u32)))
1082 return -EFAULT;
e8bc3c99 1083 if (copy_to_user(data + 1, &size, sizeof(u32)))
140adfba 1084 return -EFAULT;
e8bc3c99 1085 if (copy_to_user(data + 2, bc->params, size))
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1086 return -EFAULT;
1087 }
1088
1089 return 0;
1090}
1091
1092#define SKL_PARAM_VENDOR_ID 0xff
1093
1094static int skl_tplg_tlv_control_set(struct snd_kcontrol *kcontrol,
1095 const unsigned int __user *data, unsigned int size)
1096{
1097 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1098 struct skl_module_cfg *mconfig = w->priv;
1099 struct soc_bytes_ext *sb =
1100 (struct soc_bytes_ext *)kcontrol->private_value;
1101 struct skl_algo_data *ac = (struct skl_algo_data *)sb->dobj.private;
1102 struct skl *skl = get_skl_ctx(w->dapm->dev);
1103
1104 if (ac->params) {
1105 /*
1106 * if the param_is is of type Vendor, firmware expects actual
1107 * parameter id and size from the control.
1108 */
1109 if (ac->param_id == SKL_PARAM_VENDOR_ID) {
1110 if (copy_from_user(ac->params, data, size))
1111 return -EFAULT;
1112 } else {
1113 if (copy_from_user(ac->params,
1114 data + 2 * sizeof(u32), size))
1115 return -EFAULT;
1116 }
1117
1118 if (w->power)
1119 return skl_set_module_params(skl->skl_sst,
1120 (u32 *)ac->params, ac->max,
1121 ac->param_id, mconfig);
1122 }
1123
1124 return 0;
1125}
1126
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1127/*
1128 * The FE params are passed by hw_params of the DAI.
1129 * On hw_params, the params are stored in Gateway module of the FE and we
1130 * need to calculate the format in DSP module configuration, that
1131 * conversion is done here
1132 */
1133int skl_tplg_update_pipe_params(struct device *dev,
1134 struct skl_module_cfg *mconfig,
1135 struct skl_pipe_params *params)
1136{
1137 struct skl_pipe *pipe = mconfig->pipe;
1138 struct skl_module_fmt *format = NULL;
1139
1140 memcpy(pipe->p_params, params, sizeof(*params));
1141
1142 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK)
4cd9899f 1143 format = &mconfig->in_fmt[0];
cfb0a873 1144 else
4cd9899f 1145 format = &mconfig->out_fmt[0];
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1146
1147 /* set the hw_params */
1148 format->s_freq = params->s_freq;
1149 format->channels = params->ch;
1150 format->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
1151
1152 /*
1153 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
1154 * container so update bit depth accordingly
1155 */
1156 switch (format->valid_bit_depth) {
1157 case SKL_DEPTH_16BIT:
1158 format->bit_depth = format->valid_bit_depth;
1159 break;
1160
1161 case SKL_DEPTH_24BIT:
6654f39e 1162 case SKL_DEPTH_32BIT:
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1163 format->bit_depth = SKL_DEPTH_32BIT;
1164 break;
1165
1166 default:
1167 dev_err(dev, "Invalid bit depth %x for pipe\n",
1168 format->valid_bit_depth);
1169 return -EINVAL;
1170 }
1171
1172 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1173 mconfig->ibs = (format->s_freq / 1000) *
1174 (format->channels) *
1175 (format->bit_depth >> 3);
1176 } else {
1177 mconfig->obs = (format->s_freq / 1000) *
1178 (format->channels) *
1179 (format->bit_depth >> 3);
1180 }
1181
1182 return 0;
1183}
1184
1185/*
1186 * Query the module config for the FE DAI
1187 * This is used to find the hw_params set for that DAI and apply to FE
1188 * pipeline
1189 */
1190struct skl_module_cfg *
1191skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream)
1192{
1193 struct snd_soc_dapm_widget *w;
1194 struct snd_soc_dapm_path *p = NULL;
1195
1196 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1197 w = dai->playback_widget;
f0900eb2 1198 snd_soc_dapm_widget_for_each_sink_path(w, p) {
cfb0a873 1199 if (p->connect && p->sink->power &&
a28f51db 1200 !is_skl_dsp_widget_type(p->sink))
cfb0a873
VK
1201 continue;
1202
1203 if (p->sink->priv) {
1204 dev_dbg(dai->dev, "set params for %s\n",
1205 p->sink->name);
1206 return p->sink->priv;
1207 }
1208 }
1209 } else {
1210 w = dai->capture_widget;
f0900eb2 1211 snd_soc_dapm_widget_for_each_source_path(w, p) {
cfb0a873 1212 if (p->connect && p->source->power &&
a28f51db 1213 !is_skl_dsp_widget_type(p->source))
cfb0a873
VK
1214 continue;
1215
1216 if (p->source->priv) {
1217 dev_dbg(dai->dev, "set params for %s\n",
1218 p->source->name);
1219 return p->source->priv;
1220 }
1221 }
1222 }
1223
1224 return NULL;
1225}
1226
718a42b5
D
1227static struct skl_module_cfg *skl_get_mconfig_pb_cpr(
1228 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1229{
1230 struct snd_soc_dapm_path *p;
1231 struct skl_module_cfg *mconfig = NULL;
1232
1233 snd_soc_dapm_widget_for_each_source_path(w, p) {
1234 if (w->endpoints[SND_SOC_DAPM_DIR_OUT] > 0) {
1235 if (p->connect &&
1236 (p->sink->id == snd_soc_dapm_aif_out) &&
1237 p->source->priv) {
1238 mconfig = p->source->priv;
1239 return mconfig;
1240 }
1241 mconfig = skl_get_mconfig_pb_cpr(dai, p->source);
1242 if (mconfig)
1243 return mconfig;
1244 }
1245 }
1246 return mconfig;
1247}
1248
1249static struct skl_module_cfg *skl_get_mconfig_cap_cpr(
1250 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1251{
1252 struct snd_soc_dapm_path *p;
1253 struct skl_module_cfg *mconfig = NULL;
1254
1255 snd_soc_dapm_widget_for_each_sink_path(w, p) {
1256 if (w->endpoints[SND_SOC_DAPM_DIR_IN] > 0) {
1257 if (p->connect &&
1258 (p->source->id == snd_soc_dapm_aif_in) &&
1259 p->sink->priv) {
1260 mconfig = p->sink->priv;
1261 return mconfig;
1262 }
1263 mconfig = skl_get_mconfig_cap_cpr(dai, p->sink);
1264 if (mconfig)
1265 return mconfig;
1266 }
1267 }
1268 return mconfig;
1269}
1270
1271struct skl_module_cfg *
1272skl_tplg_be_get_cpr_module(struct snd_soc_dai *dai, int stream)
1273{
1274 struct snd_soc_dapm_widget *w;
1275 struct skl_module_cfg *mconfig;
1276
1277 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1278 w = dai->playback_widget;
1279 mconfig = skl_get_mconfig_pb_cpr(dai, w);
1280 } else {
1281 w = dai->capture_widget;
1282 mconfig = skl_get_mconfig_cap_cpr(dai, w);
1283 }
1284 return mconfig;
1285}
1286
cfb0a873
VK
1287static u8 skl_tplg_be_link_type(int dev_type)
1288{
1289 int ret;
1290
1291 switch (dev_type) {
1292 case SKL_DEVICE_BT:
1293 ret = NHLT_LINK_SSP;
1294 break;
1295
1296 case SKL_DEVICE_DMIC:
1297 ret = NHLT_LINK_DMIC;
1298 break;
1299
1300 case SKL_DEVICE_I2S:
1301 ret = NHLT_LINK_SSP;
1302 break;
1303
1304 case SKL_DEVICE_HDALINK:
1305 ret = NHLT_LINK_HDA;
1306 break;
1307
1308 default:
1309 ret = NHLT_LINK_INVALID;
1310 break;
1311 }
1312
1313 return ret;
1314}
1315
1316/*
1317 * Fill the BE gateway parameters
1318 * The BE gateway expects a blob of parameters which are kept in the ACPI
1319 * NHLT blob, so query the blob for interface type (i2s/pdm) and instance.
1320 * The port can have multiple settings so pick based on the PCM
1321 * parameters
1322 */
1323static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai,
1324 struct skl_module_cfg *mconfig,
1325 struct skl_pipe_params *params)
1326{
1327 struct skl_pipe *pipe = mconfig->pipe;
1328 struct nhlt_specific_cfg *cfg;
1329 struct skl *skl = get_skl_ctx(dai->dev);
1330 int link_type = skl_tplg_be_link_type(mconfig->dev_type);
1331
1332 memcpy(pipe->p_params, params, sizeof(*params));
1333
b30c275e
JK
1334 if (link_type == NHLT_LINK_HDA)
1335 return 0;
1336
cfb0a873
VK
1337 /* update the blob based on virtual bus_id*/
1338 cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type,
1339 params->s_fmt, params->ch,
1340 params->s_freq, params->stream);
1341 if (cfg) {
1342 mconfig->formats_config.caps_size = cfg->size;
bc03281a 1343 mconfig->formats_config.caps = (u32 *) &cfg->caps;
cfb0a873
VK
1344 } else {
1345 dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n",
1346 mconfig->vbus_id, link_type,
1347 params->stream);
1348 dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n",
1349 params->ch, params->s_freq, params->s_fmt);
1350 return -EINVAL;
1351 }
1352
1353 return 0;
1354}
1355
1356static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai,
1357 struct snd_soc_dapm_widget *w,
1358 struct skl_pipe_params *params)
1359{
1360 struct snd_soc_dapm_path *p;
4d8adccb 1361 int ret = -EIO;
cfb0a873 1362
f0900eb2 1363 snd_soc_dapm_widget_for_each_source_path(w, p) {
cfb0a873
VK
1364 if (p->connect && is_skl_dsp_widget_type(p->source) &&
1365 p->source->priv) {
1366
9a03cb49
JK
1367 ret = skl_tplg_be_fill_pipe_params(dai,
1368 p->source->priv, params);
1369 if (ret < 0)
1370 return ret;
cfb0a873 1371 } else {
9a03cb49
JK
1372 ret = skl_tplg_be_set_src_pipe_params(dai,
1373 p->source, params);
4d8adccb
SP
1374 if (ret < 0)
1375 return ret;
cfb0a873
VK
1376 }
1377 }
1378
4d8adccb 1379 return ret;
cfb0a873
VK
1380}
1381
1382static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai,
1383 struct snd_soc_dapm_widget *w, struct skl_pipe_params *params)
1384{
1385 struct snd_soc_dapm_path *p = NULL;
4d8adccb 1386 int ret = -EIO;
cfb0a873 1387
f0900eb2 1388 snd_soc_dapm_widget_for_each_sink_path(w, p) {
cfb0a873
VK
1389 if (p->connect && is_skl_dsp_widget_type(p->sink) &&
1390 p->sink->priv) {
1391
9a03cb49
JK
1392 ret = skl_tplg_be_fill_pipe_params(dai,
1393 p->sink->priv, params);
1394 if (ret < 0)
1395 return ret;
cfb0a873 1396 } else {
4d8adccb 1397 ret = skl_tplg_be_set_sink_pipe_params(
cfb0a873 1398 dai, p->sink, params);
4d8adccb
SP
1399 if (ret < 0)
1400 return ret;
cfb0a873
VK
1401 }
1402 }
1403
4d8adccb 1404 return ret;
cfb0a873
VK
1405}
1406
1407/*
1408 * BE hw_params can be a source parameters (capture) or sink parameters
1409 * (playback). Based on sink and source we need to either find the source
1410 * list or the sink list and set the pipeline parameters
1411 */
1412int skl_tplg_be_update_params(struct snd_soc_dai *dai,
1413 struct skl_pipe_params *params)
1414{
1415 struct snd_soc_dapm_widget *w;
1416
1417 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1418 w = dai->playback_widget;
1419
1420 return skl_tplg_be_set_src_pipe_params(dai, w, params);
1421
1422 } else {
1423 w = dai->capture_widget;
1424
1425 return skl_tplg_be_set_sink_pipe_params(dai, w, params);
1426 }
1427
1428 return 0;
1429}
3af36706
VK
1430
1431static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = {
1432 {SKL_MIXER_EVENT, skl_tplg_mixer_event},
1433 {SKL_VMIXER_EVENT, skl_tplg_vmixer_event},
1434 {SKL_PGA_EVENT, skl_tplg_pga_event},
1435};
1436
140adfba
JK
1437static const struct snd_soc_tplg_bytes_ext_ops skl_tlv_ops[] = {
1438 {SKL_CONTROL_TYPE_BYTE_TLV, skl_tplg_tlv_control_get,
1439 skl_tplg_tlv_control_set},
1440};
1441
3af36706
VK
1442/*
1443 * The topology binary passes the pin info for a module so initialize the pin
1444 * info passed into module instance
1445 */
6abca1d7
JK
1446static void skl_fill_module_pin_info(struct skl_dfw_module_pin *dfw_pin,
1447 struct skl_module_pin *m_pin,
1448 bool is_dynamic, int max_pin)
3af36706
VK
1449{
1450 int i;
1451
1452 for (i = 0; i < max_pin; i++) {
6abca1d7
JK
1453 m_pin[i].id.module_id = dfw_pin[i].module_id;
1454 m_pin[i].id.instance_id = dfw_pin[i].instance_id;
3af36706 1455 m_pin[i].in_use = false;
6abca1d7 1456 m_pin[i].is_dynamic = is_dynamic;
4f745708 1457 m_pin[i].pin_state = SKL_PIN_UNBIND;
3af36706
VK
1458 }
1459}
1460
1461/*
1462 * Add pipeline from topology binary into driver pipeline list
1463 *
1464 * If already added we return that instance
1465 * Otherwise we create a new instance and add into driver list
1466 */
1467static struct skl_pipe *skl_tplg_add_pipe(struct device *dev,
1468 struct skl *skl, struct skl_dfw_pipe *dfw_pipe)
1469{
1470 struct skl_pipeline *ppl;
1471 struct skl_pipe *pipe;
1472 struct skl_pipe_params *params;
1473
1474 list_for_each_entry(ppl, &skl->ppl_list, node) {
1475 if (ppl->pipe->ppl_id == dfw_pipe->pipe_id)
1476 return ppl->pipe;
1477 }
1478
1479 ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL);
1480 if (!ppl)
1481 return NULL;
1482
1483 pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL);
1484 if (!pipe)
1485 return NULL;
1486
1487 params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL);
1488 if (!params)
1489 return NULL;
1490
1491 pipe->ppl_id = dfw_pipe->pipe_id;
1492 pipe->memory_pages = dfw_pipe->memory_pages;
1493 pipe->pipe_priority = dfw_pipe->pipe_priority;
1494 pipe->conn_type = dfw_pipe->conn_type;
1495 pipe->state = SKL_PIPE_INVALID;
1496 pipe->p_params = params;
1497 INIT_LIST_HEAD(&pipe->w_list);
1498
1499 ppl->pipe = pipe;
1500 list_add(&ppl->node, &skl->ppl_list);
1501
1502 return ppl->pipe;
1503}
1504
4cd9899f
HS
1505static void skl_tplg_fill_fmt(struct skl_module_fmt *dst_fmt,
1506 struct skl_dfw_module_fmt *src_fmt,
1507 int pins)
1508{
1509 int i;
1510
1511 for (i = 0; i < pins; i++) {
1512 dst_fmt[i].channels = src_fmt[i].channels;
1513 dst_fmt[i].s_freq = src_fmt[i].freq;
1514 dst_fmt[i].bit_depth = src_fmt[i].bit_depth;
1515 dst_fmt[i].valid_bit_depth = src_fmt[i].valid_bit_depth;
1516 dst_fmt[i].ch_cfg = src_fmt[i].ch_cfg;
1517 dst_fmt[i].ch_map = src_fmt[i].ch_map;
1518 dst_fmt[i].interleaving_style = src_fmt[i].interleaving_style;
1519 dst_fmt[i].sample_type = src_fmt[i].sample_type;
1520 }
1521}
1522
3af36706
VK
1523/*
1524 * Topology core widget load callback
1525 *
1526 * This is used to save the private data for each widget which gives
1527 * information to the driver about module and pipeline parameters which DSP
1528 * FW expects like ids, resource values, formats etc
1529 */
1530static int skl_tplg_widget_load(struct snd_soc_component *cmpnt,
b663a8c5
JK
1531 struct snd_soc_dapm_widget *w,
1532 struct snd_soc_tplg_dapm_widget *tplg_w)
3af36706
VK
1533{
1534 int ret;
1535 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
1536 struct skl *skl = ebus_to_skl(ebus);
1537 struct hdac_bus *bus = ebus_to_hbus(ebus);
1538 struct skl_module_cfg *mconfig;
1539 struct skl_pipe *pipe;
b663a8c5
JK
1540 struct skl_dfw_module *dfw_config =
1541 (struct skl_dfw_module *)tplg_w->priv.data;
3af36706
VK
1542
1543 if (!tplg_w->priv.size)
1544 goto bind_event;
1545
1546 mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL);
1547
1548 if (!mconfig)
1549 return -ENOMEM;
1550
1551 w->priv = mconfig;
1552 mconfig->id.module_id = dfw_config->module_id;
1553 mconfig->id.instance_id = dfw_config->instance_id;
1554 mconfig->mcps = dfw_config->max_mcps;
1555 mconfig->ibs = dfw_config->ibs;
1556 mconfig->obs = dfw_config->obs;
1557 mconfig->core_id = dfw_config->core_id;
1558 mconfig->max_in_queue = dfw_config->max_in_queue;
1559 mconfig->max_out_queue = dfw_config->max_out_queue;
1560 mconfig->is_loadable = dfw_config->is_loadable;
4cd9899f
HS
1561 skl_tplg_fill_fmt(mconfig->in_fmt, dfw_config->in_fmt,
1562 MODULE_MAX_IN_PINS);
1563 skl_tplg_fill_fmt(mconfig->out_fmt, dfw_config->out_fmt,
1564 MODULE_MAX_OUT_PINS);
1565
3af36706
VK
1566 mconfig->params_fixup = dfw_config->params_fixup;
1567 mconfig->converter = dfw_config->converter;
1568 mconfig->m_type = dfw_config->module_type;
1569 mconfig->vbus_id = dfw_config->vbus_id;
b18c458d 1570 mconfig->mem_pages = dfw_config->mem_pages;
3af36706
VK
1571
1572 pipe = skl_tplg_add_pipe(bus->dev, skl, &dfw_config->pipe);
1573 if (pipe)
1574 mconfig->pipe = pipe;
1575
1576 mconfig->dev_type = dfw_config->dev_type;
1577 mconfig->hw_conn_type = dfw_config->hw_conn_type;
1578 mconfig->time_slot = dfw_config->time_slot;
1579 mconfig->formats_config.caps_size = dfw_config->caps.caps_size;
1580
65aecfa8
HS
1581 if (dfw_config->is_loadable)
1582 memcpy(mconfig->guid, dfw_config->uuid,
1583 ARRAY_SIZE(dfw_config->uuid));
1584
4cd9899f
HS
1585 mconfig->m_in_pin = devm_kzalloc(bus->dev, (mconfig->max_in_queue) *
1586 sizeof(*mconfig->m_in_pin),
1587 GFP_KERNEL);
3af36706
VK
1588 if (!mconfig->m_in_pin)
1589 return -ENOMEM;
1590
6abca1d7
JK
1591 mconfig->m_out_pin = devm_kzalloc(bus->dev, (mconfig->max_out_queue) *
1592 sizeof(*mconfig->m_out_pin),
1593 GFP_KERNEL);
3af36706
VK
1594 if (!mconfig->m_out_pin)
1595 return -ENOMEM;
1596
6abca1d7
JK
1597 skl_fill_module_pin_info(dfw_config->in_pin, mconfig->m_in_pin,
1598 dfw_config->is_dynamic_in_pin,
1599 mconfig->max_in_queue);
1600
1601 skl_fill_module_pin_info(dfw_config->out_pin, mconfig->m_out_pin,
1602 dfw_config->is_dynamic_out_pin,
1603 mconfig->max_out_queue);
1604
3af36706
VK
1605
1606 if (mconfig->formats_config.caps_size == 0)
1607 goto bind_event;
1608
1609 mconfig->formats_config.caps = (u32 *)devm_kzalloc(bus->dev,
b663a8c5 1610 mconfig->formats_config.caps_size, GFP_KERNEL);
3af36706
VK
1611
1612 if (mconfig->formats_config.caps == NULL)
1613 return -ENOMEM;
1614
1615 memcpy(mconfig->formats_config.caps, dfw_config->caps.caps,
abb74003
JK
1616 dfw_config->caps.caps_size);
1617 mconfig->formats_config.param_id = dfw_config->caps.param_id;
1618 mconfig->formats_config.set_params = dfw_config->caps.set_params;
3af36706
VK
1619
1620bind_event:
1621 if (tplg_w->event_type == 0) {
3373f716 1622 dev_dbg(bus->dev, "ASoC: No event handler required\n");
3af36706
VK
1623 return 0;
1624 }
1625
1626 ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops,
b663a8c5
JK
1627 ARRAY_SIZE(skl_tplg_widget_ops),
1628 tplg_w->event_type);
3af36706
VK
1629
1630 if (ret) {
1631 dev_err(bus->dev, "%s: No matching event handlers found for %d\n",
1632 __func__, tplg_w->event_type);
1633 return -EINVAL;
1634 }
1635
1636 return 0;
1637}
1638
140adfba
JK
1639static int skl_init_algo_data(struct device *dev, struct soc_bytes_ext *be,
1640 struct snd_soc_tplg_bytes_control *bc)
1641{
1642 struct skl_algo_data *ac;
1643 struct skl_dfw_algo_data *dfw_ac =
1644 (struct skl_dfw_algo_data *)bc->priv.data;
1645
1646 ac = devm_kzalloc(dev, sizeof(*ac), GFP_KERNEL);
1647 if (!ac)
1648 return -ENOMEM;
1649
1650 /* Fill private data */
1651 ac->max = dfw_ac->max;
1652 ac->param_id = dfw_ac->param_id;
1653 ac->set_params = dfw_ac->set_params;
1654
1655 if (ac->max) {
1656 ac->params = (char *) devm_kzalloc(dev, ac->max, GFP_KERNEL);
1657 if (!ac->params)
1658 return -ENOMEM;
1659
1660 if (dfw_ac->params)
1661 memcpy(ac->params, dfw_ac->params, ac->max);
1662 }
1663
1664 be->dobj.private = ac;
1665 return 0;
1666}
1667
1668static int skl_tplg_control_load(struct snd_soc_component *cmpnt,
1669 struct snd_kcontrol_new *kctl,
1670 struct snd_soc_tplg_ctl_hdr *hdr)
1671{
1672 struct soc_bytes_ext *sb;
1673 struct snd_soc_tplg_bytes_control *tplg_bc;
1674 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
1675 struct hdac_bus *bus = ebus_to_hbus(ebus);
1676
1677 switch (hdr->ops.info) {
1678 case SND_SOC_TPLG_CTL_BYTES:
1679 tplg_bc = container_of(hdr,
1680 struct snd_soc_tplg_bytes_control, hdr);
1681 if (kctl->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
1682 sb = (struct soc_bytes_ext *)kctl->private_value;
1683 if (tplg_bc->priv.size)
1684 return skl_init_algo_data(
1685 bus->dev, sb, tplg_bc);
1686 }
1687 break;
1688
1689 default:
1690 dev_warn(bus->dev, "Control load not supported %d:%d:%d\n",
1691 hdr->ops.get, hdr->ops.put, hdr->ops.info);
1692 break;
1693 }
1694
1695 return 0;
1696}
1697
3af36706
VK
1698static struct snd_soc_tplg_ops skl_tplg_ops = {
1699 .widget_load = skl_tplg_widget_load,
140adfba
JK
1700 .control_load = skl_tplg_control_load,
1701 .bytes_ext_ops = skl_tlv_ops,
1702 .bytes_ext_ops_count = ARRAY_SIZE(skl_tlv_ops),
3af36706
VK
1703};
1704
1705/* This will be read from topology manifest, currently defined here */
1706#define SKL_MAX_MCPS 30000000
1707#define SKL_FW_MAX_MEM 1000000
1708
1709/*
1710 * SKL topology init routine
1711 */
1712int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus)
1713{
1714 int ret;
1715 const struct firmware *fw;
1716 struct hdac_bus *bus = ebus_to_hbus(ebus);
1717 struct skl *skl = ebus_to_skl(ebus);
1718
4b235c43 1719 ret = request_firmware(&fw, skl->tplg_name, bus->dev);
3af36706 1720 if (ret < 0) {
b663a8c5 1721 dev_err(bus->dev, "tplg fw %s load failed with %d\n",
4b235c43
VK
1722 skl->tplg_name, ret);
1723 ret = request_firmware(&fw, "dfw_sst.bin", bus->dev);
1724 if (ret < 0) {
1725 dev_err(bus->dev, "Fallback tplg fw %s load failed with %d\n",
1726 "dfw_sst.bin", ret);
1727 return ret;
1728 }
3af36706
VK
1729 }
1730
1731 /*
1732 * The complete tplg for SKL is loaded as index 0, we don't use
1733 * any other index
1734 */
b663a8c5
JK
1735 ret = snd_soc_tplg_component_load(&platform->component,
1736 &skl_tplg_ops, fw, 0);
3af36706
VK
1737 if (ret < 0) {
1738 dev_err(bus->dev, "tplg component load failed%d\n", ret);
c14a82c7 1739 release_firmware(fw);
3af36706
VK
1740 return -EINVAL;
1741 }
1742
1743 skl->resource.max_mcps = SKL_MAX_MCPS;
1744 skl->resource.max_mem = SKL_FW_MAX_MEM;
1745
d8018361
VK
1746 skl->tplg = fw;
1747
3af36706
VK
1748 return 0;
1749}