]>
Commit | Line | Data |
---|---|---|
53633a89 TR |
1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
2 | /* | |
3 | * Device Tree file for Marvell Armada 370 Reference Design board | |
4 | * (RD-88F6710-A1) | |
5 | * | |
6 | * Copied from arch/arm/boot/dts/armada-370-db.dts | |
7 | * | |
8 | * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org> | |
9 | * | |
10 | * Note: this Device Tree assumes that the bootloader has remapped the | |
11 | * internal registers to 0xf1000000 (instead of the default | |
12 | * 0xd0000000). The 0xf1000000 is the default used by the recent, | |
13 | * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier | |
14 | * boards were delivered with an older version of the bootloader that | |
15 | * left internal registers mapped at 0xd0000000. If you are in this | |
16 | * situation, you should either update your bootloader (preferred | |
17 | * solution) or the below Device Tree should be adjusted. | |
18 | */ | |
19 | ||
20 | /dts-v1/; | |
21 | #include <dt-bindings/input/input.h> | |
22 | #include <dt-bindings/interrupt-controller/irq.h> | |
23 | #include <dt-bindings/leds/common.h> | |
24 | #include <dt-bindings/gpio/gpio.h> | |
25 | #include "armada-370.dtsi" | |
26 | ||
27 | / { | |
28 | model = "Marvell Armada 370 Reference Design"; | |
29 | compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp"; | |
30 | ||
31 | chosen { | |
32 | stdout-path = "serial0:115200n8"; | |
33 | }; | |
34 | ||
35 | memory@0 { | |
36 | device_type = "memory"; | |
37 | reg = <0x00000000 0x20000000>; /* 512 MB */ | |
38 | }; | |
39 | ||
40 | soc { | |
41 | ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 | |
42 | MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000 | |
43 | MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>; | |
44 | ||
45 | internal-regs { | |
46 | serial@12000 { | |
47 | status = "okay"; | |
48 | }; | |
49 | sata@a0000 { | |
50 | nr-ports = <2>; | |
51 | status = "okay"; | |
52 | }; | |
53 | ||
54 | ethernet@70000 { | |
55 | status = "okay"; | |
56 | phy = <&phy0>; | |
57 | phy-mode = "sgmii"; | |
58 | }; | |
59 | ethernet@74000 { | |
60 | pinctrl-0 = <&ge1_rgmii_pins>; | |
61 | pinctrl-names = "default"; | |
62 | status = "okay"; | |
63 | phy-mode = "rgmii-id"; | |
64 | fixed-link { | |
65 | speed = <1000>; | |
66 | full-duplex; | |
67 | }; | |
68 | }; | |
69 | ||
70 | mvsdio@d4000 { | |
71 | pinctrl-0 = <&sdio_pins1>; | |
72 | pinctrl-names = "default"; | |
73 | status = "okay"; | |
74 | /* No CD or WP GPIOs */ | |
75 | broken-cd; | |
76 | }; | |
77 | ||
78 | usb@50000 { | |
79 | status = "okay"; | |
80 | }; | |
81 | ||
82 | usb@51000 { | |
83 | status = "okay"; | |
84 | }; | |
85 | ||
86 | gpio-keys { | |
87 | compatible = "gpio-keys"; | |
88 | button { | |
89 | label = "Software Button"; | |
90 | linux,code = <KEY_POWER>; | |
91 | gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; | |
92 | }; | |
93 | }; | |
94 | ||
95 | gpio-fan { | |
96 | compatible = "gpio-fan"; | |
97 | gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; | |
93743d24 | 98 | gpio-fan,speed-map = <0 0>, <3000 1>; |
53633a89 TR |
99 | pinctrl-0 = <&fan_pins>; |
100 | pinctrl-names = "default"; | |
101 | }; | |
102 | ||
103 | gpio_leds { | |
104 | compatible = "gpio-leds"; | |
105 | pinctrl-names = "default"; | |
106 | pinctrl-0 = <&led_pins>; | |
107 | ||
108 | sw_led { | |
109 | label = "370rd:green:sw"; | |
110 | gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; | |
111 | default-state = "keep"; | |
112 | }; | |
113 | }; | |
114 | }; | |
115 | }; | |
116 | }; | |
117 | ||
118 | &pciec { | |
119 | status = "okay"; | |
120 | ||
121 | /* Internal mini-PCIe connector */ | |
122 | pcie@1,0 { | |
123 | /* Port 0, Lane 0 */ | |
124 | status = "okay"; | |
125 | }; | |
126 | ||
127 | /* Internal mini-PCIe connector */ | |
128 | pcie@2,0 { | |
129 | /* Port 1, Lane 0 */ | |
130 | status = "okay"; | |
131 | }; | |
132 | }; | |
133 | ||
134 | &mdio { | |
135 | pinctrl-0 = <&mdio_pins>; | |
136 | pinctrl-names = "default"; | |
137 | phy0: ethernet-phy@0 { | |
138 | reg = <0>; | |
139 | leds { | |
140 | #address-cells = <1>; | |
141 | #size-cells = <0>; | |
142 | ||
143 | led@0 { | |
144 | reg = <0>; | |
145 | color = <LED_COLOR_ID_WHITE>; | |
146 | function = LED_FUNCTION_WAN; | |
147 | default-state = "keep"; | |
148 | }; | |
149 | }; | |
150 | }; | |
151 | ||
93743d24 | 152 | switch: ethernet-switch@10 { |
53633a89 | 153 | compatible = "marvell,mv88e6085"; |
53633a89 TR |
154 | reg = <0x10>; |
155 | interrupt-controller; | |
156 | #interrupt-cells = <2>; | |
157 | ||
93743d24 | 158 | ethernet-ports { |
53633a89 TR |
159 | #address-cells = <1>; |
160 | #size-cells = <0>; | |
161 | ||
93743d24 | 162 | ethernet-port@0 { |
53633a89 TR |
163 | reg = <0>; |
164 | label = "lan0"; | |
165 | }; | |
166 | ||
93743d24 | 167 | ethernet-port@1 { |
53633a89 TR |
168 | reg = <1>; |
169 | label = "lan1"; | |
170 | }; | |
171 | ||
93743d24 | 172 | ethernet-port@2 { |
53633a89 TR |
173 | reg = <2>; |
174 | label = "lan2"; | |
175 | }; | |
176 | ||
93743d24 | 177 | ethernet-port@3 { |
53633a89 TR |
178 | reg = <3>; |
179 | label = "lan3"; | |
180 | }; | |
181 | ||
93743d24 | 182 | ethernet-port@5 { |
53633a89 TR |
183 | reg = <5>; |
184 | ethernet = <ð1>; | |
185 | phy-mode = "rgmii-id"; | |
186 | fixed-link { | |
187 | speed = <1000>; | |
188 | full-duplex; | |
189 | }; | |
190 | }; | |
191 | }; | |
192 | ||
193 | mdio { | |
194 | #address-cells = <1>; | |
195 | #size-cells = <0>; | |
196 | ||
93743d24 | 197 | switchphy0: ethernet-phy@0 { |
53633a89 TR |
198 | reg = <0>; |
199 | interrupt-parent = <&switch>; | |
200 | interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; | |
201 | }; | |
202 | ||
93743d24 | 203 | switchphy1: ethernet-phy@1 { |
53633a89 TR |
204 | reg = <1>; |
205 | interrupt-parent = <&switch>; | |
206 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; | |
207 | }; | |
208 | ||
93743d24 | 209 | switchphy2: ethernet-phy@2 { |
53633a89 TR |
210 | reg = <2>; |
211 | interrupt-parent = <&switch>; | |
212 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; | |
213 | }; | |
214 | ||
93743d24 | 215 | switchphy3: ethernet-phy@3 { |
53633a89 TR |
216 | reg = <3>; |
217 | interrupt-parent = <&switch>; | |
218 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; | |
219 | }; | |
220 | }; | |
221 | }; | |
222 | }; | |
223 | ||
224 | ||
225 | &pinctrl { | |
226 | fan_pins: fan-pins { | |
227 | marvell,pins = "mpp8"; | |
228 | marvell,function = "gpio"; | |
229 | }; | |
230 | ||
231 | led_pins: led-pins { | |
232 | marvell,pins = "mpp32"; | |
233 | marvell,function = "gpio"; | |
234 | }; | |
235 | }; | |
236 | ||
237 | &nand_controller { | |
238 | status = "okay"; | |
239 | ||
240 | nand@0 { | |
241 | reg = <0>; | |
242 | label = "pxa3xx_nand-0"; | |
243 | nand-rb = <0>; | |
244 | marvell,nand-keep-config; | |
245 | nand-on-flash-bbt; | |
246 | ||
247 | partitions { | |
248 | compatible = "fixed-partitions"; | |
249 | #address-cells = <1>; | |
250 | #size-cells = <1>; | |
251 | ||
252 | partition@0 { | |
253 | label = "U-Boot"; | |
254 | reg = <0 0x800000>; | |
255 | }; | |
256 | partition@800000 { | |
257 | label = "Linux"; | |
258 | reg = <0x800000 0x800000>; | |
259 | }; | |
260 | partition@1000000 { | |
261 | label = "Filesystem"; | |
262 | reg = <0x1000000 0x3f000000>; | |
263 | }; | |
264 | }; | |
265 | }; | |
266 | }; |