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53633a89 TR |
1 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
2 | /* | |
3 | * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828) | |
4 | * | |
5 | * Copyright (C) 2015 Russell King | |
6 | */ | |
7 | ||
8 | /dts-v1/; | |
9 | #include "armada-388-clearfog.dtsi" | |
10 | ||
11 | / { | |
12 | model = "SolidRun Clearfog A1"; | |
13 | compatible = "solidrun,clearfog-a1", "marvell,armada388", | |
14 | "marvell,armada385", "marvell,armada380"; | |
15 | ||
16 | soc { | |
17 | internal-regs { | |
18 | usb3@f0000 { | |
19 | /* CON2, nearest CPU, USB2 only. */ | |
20 | status = "okay"; | |
21 | }; | |
22 | }; | |
23 | ||
24 | pcie { | |
25 | pcie@3,0 { | |
26 | /* Port 2, Lane 0. CON2, nearest CPU. */ | |
27 | reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; | |
28 | status = "okay"; | |
29 | }; | |
30 | }; | |
31 | }; | |
32 | ||
33 | gpio-keys { | |
34 | compatible = "gpio-keys"; | |
35 | pinctrl-0 = <&rear_button_pins>; | |
36 | pinctrl-names = "default"; | |
37 | ||
38 | button-0 { | |
39 | /* The rear SW3 button */ | |
40 | label = "Rear Button"; | |
41 | gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; | |
42 | linux,can-disable; | |
43 | linux,code = <BTN_0>; | |
44 | }; | |
45 | }; | |
46 | }; | |
47 | ||
48 | ð1 { | |
49 | /* ethernet@30000 */ | |
50 | phy-mode = "1000base-x"; | |
51 | ||
52 | fixed-link { | |
53 | speed = <1000>; | |
54 | full-duplex; | |
55 | }; | |
56 | }; | |
57 | ||
58 | &expander0 { | |
59 | /* | |
60 | * PCA9655 GPIO expander: | |
61 | * 0-CON3 CLKREQ# | |
62 | * 1-CON3 PERST# | |
63 | * 2-CON2 PERST# | |
64 | * 3-CON3 W_DISABLE | |
65 | * 4-CON2 CLKREQ# | |
66 | * 5-USB3 overcurrent | |
67 | * 6-USB3 power | |
68 | * 7-CON2 W_DISABLE | |
69 | * 8-JP4 P1 | |
70 | * 9-JP4 P4 | |
71 | * 10-JP4 P5 | |
72 | * 11-m.2 DEVSLP | |
73 | * 12-SFP_LOS | |
74 | * 13-SFP_TX_FAULT | |
75 | * 14-SFP_TX_DISABLE | |
76 | * 15-SFP_MOD_DEF0 | |
77 | */ | |
78 | pcie2-0-clkreq-hog { | |
79 | gpio-hog; | |
80 | gpios = <4 GPIO_ACTIVE_LOW>; | |
81 | input; | |
82 | line-name = "pcie2.0-clkreq"; | |
83 | }; | |
84 | pcie2-0-w-disable-hog { | |
85 | gpio-hog; | |
86 | gpios = <7 GPIO_ACTIVE_LOW>; | |
87 | output-low; | |
88 | line-name = "pcie2.0-w-disable"; | |
89 | }; | |
90 | }; | |
91 | ||
92 | &mdio { | |
93 | status = "okay"; | |
94 | ||
93743d24 | 95 | ethernet-switch@4 { |
53633a89 | 96 | compatible = "marvell,mv88e6085"; |
53633a89 TR |
97 | reg = <4>; |
98 | pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>; | |
99 | pinctrl-names = "default"; | |
100 | ||
93743d24 | 101 | ethernet-ports { |
53633a89 TR |
102 | #address-cells = <1>; |
103 | #size-cells = <0>; | |
104 | ||
93743d24 | 105 | ethernet-port@0 { |
53633a89 TR |
106 | reg = <0>; |
107 | label = "lan5"; | |
108 | }; | |
109 | ||
93743d24 | 110 | ethernet-port@1 { |
53633a89 TR |
111 | reg = <1>; |
112 | label = "lan4"; | |
113 | }; | |
114 | ||
93743d24 | 115 | ethernet-port@2 { |
53633a89 TR |
116 | reg = <2>; |
117 | label = "lan3"; | |
118 | }; | |
119 | ||
93743d24 | 120 | ethernet-port@3 { |
53633a89 TR |
121 | reg = <3>; |
122 | label = "lan2"; | |
123 | }; | |
124 | ||
93743d24 | 125 | ethernet-port@4 { |
53633a89 TR |
126 | reg = <4>; |
127 | label = "lan1"; | |
128 | }; | |
129 | ||
93743d24 | 130 | ethernet-port@5 { |
53633a89 TR |
131 | reg = <5>; |
132 | ethernet = <ð1>; | |
133 | phy-mode = "1000base-x"; | |
134 | ||
135 | fixed-link { | |
136 | speed = <1000>; | |
137 | full-duplex; | |
138 | }; | |
139 | }; | |
140 | ||
93743d24 | 141 | ethernet-port@6 { |
53633a89 TR |
142 | /* 88E1512 external phy */ |
143 | reg = <6>; | |
144 | label = "lan6"; | |
145 | phy-mode = "rgmii-id"; | |
146 | ||
147 | fixed-link { | |
148 | speed = <1000>; | |
149 | full-duplex; | |
150 | }; | |
151 | }; | |
152 | }; | |
153 | }; | |
154 | }; | |
155 | ||
156 | &pinctrl { | |
157 | clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins { | |
158 | marvell,pins = "mpp46"; | |
159 | marvell,function = "ref"; | |
160 | }; | |
161 | clearfog_dsa0_pins: clearfog-dsa0-pins { | |
162 | marvell,pins = "mpp23", "mpp41"; | |
163 | marvell,function = "gpio"; | |
164 | }; | |
165 | clearfog_spi1_cs_pins: spi1-cs-pins { | |
166 | marvell,pins = "mpp55"; | |
167 | marvell,function = "spi1"; | |
168 | }; | |
169 | rear_button_pins: rear-button-pins { | |
170 | marvell,pins = "mpp34"; | |
171 | marvell,function = "gpio"; | |
172 | }; | |
173 | }; | |
174 | ||
175 | &spi1 { | |
176 | /* | |
177 | * Add SPI CS pins for clearfog: | |
178 | * CS0: W25Q32 | |
179 | * CS1: | |
180 | * CS2: mikrobus | |
181 | */ | |
182 | pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>; | |
183 | }; |