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53633a89 TR |
1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
2 | /* | |
3 | * Device tree definitions for the Turing RK1 SoM. | |
4 | * | |
5 | * Copyright (c) 2023 Sam Edwards <CFSworks@gmail.com> | |
6 | * | |
7 | * Based on RK3588-EVB1 devicetree | |
8 | * Copyright (c) 2021 Rockchip Electronics Co., Ltd. | |
9 | */ | |
10 | ||
11 | /dts-v1/; | |
12 | #include <dt-bindings/gpio/gpio.h> | |
13 | #include <dt-bindings/pinctrl/rockchip.h> | |
14 | #include "rk3588.dtsi" | |
15 | ||
16 | / { | |
17 | compatible = "turing,rk1", "rockchip,rk3588"; | |
18 | ||
19 | aliases { | |
20 | ethernet0 = &gmac1; | |
21 | mmc0 = &sdhci; | |
53633a89 TR |
22 | }; |
23 | ||
24 | fan: pwm-fan { | |
25 | compatible = "pwm-fan"; | |
26 | cooling-levels = <0 25 95 145 195 255>; | |
27 | fan-supply = <&vcc5v0_sys>; | |
28 | pinctrl-names = "default"; | |
29 | pinctrl-0 = <&pwm0m2_pins &fan_int>; | |
30 | interrupt-parent = <&gpio0>; | |
31 | interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>; | |
32 | pwms = <&pwm0 0 50000 0>; | |
33 | #cooling-cells = <2>; | |
34 | }; | |
35 | ||
36 | vcc3v3_pcie30: vcc3v3-pcie30-regulator { | |
37 | compatible = "regulator-fixed"; | |
38 | regulator-name = "vcc3v3_pcie30"; | |
39 | regulator-min-microvolt = <3300000>; | |
40 | regulator-max-microvolt = <3300000>; | |
41 | enable-active-high; | |
42 | gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; | |
43 | pinctrl-names = "default"; | |
44 | pinctrl-0 = <&vcc3v3_pcie30_en>; | |
45 | startup-delay-us = <5000>; | |
46 | }; | |
47 | ||
48 | vcc5v0_sys: vcc5v0-sys-regulator { | |
49 | compatible = "regulator-fixed"; | |
50 | regulator-name = "vcc5v0_sys"; | |
51 | regulator-always-on; | |
52 | regulator-boot-on; | |
53 | regulator-min-microvolt = <5000000>; | |
54 | regulator-max-microvolt = <5000000>; | |
55 | }; | |
56 | ||
57 | vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { | |
58 | compatible = "regulator-fixed"; | |
59 | regulator-name = "vcc_1v1_nldo_s3"; | |
60 | regulator-always-on; | |
61 | regulator-boot-on; | |
62 | regulator-min-microvolt = <1100000>; | |
63 | regulator-max-microvolt = <1100000>; | |
64 | vin-supply = <&vcc5v0_sys>; | |
65 | }; | |
66 | }; | |
67 | ||
68 | &combphy2_psu { | |
69 | status = "okay"; | |
70 | }; | |
71 | ||
72 | &cpu_b0 { | |
73 | cpu-supply = <&vdd_cpu_big0_s0>; | |
74 | }; | |
75 | ||
76 | &cpu_b1 { | |
77 | cpu-supply = <&vdd_cpu_big0_s0>; | |
78 | }; | |
79 | ||
80 | &cpu_b2 { | |
81 | cpu-supply = <&vdd_cpu_big1_s0>; | |
82 | }; | |
83 | ||
84 | &cpu_b3 { | |
85 | cpu-supply = <&vdd_cpu_big1_s0>; | |
86 | }; | |
87 | ||
88 | &cpu_l0 { | |
89 | cpu-supply = <&vdd_cpu_lit_s0>; | |
90 | }; | |
91 | ||
92 | &cpu_l1 { | |
93 | cpu-supply = <&vdd_cpu_lit_s0>; | |
94 | }; | |
95 | ||
96 | &cpu_l2 { | |
97 | cpu-supply = <&vdd_cpu_lit_s0>; | |
98 | }; | |
99 | ||
100 | &cpu_l3 { | |
101 | cpu-supply = <&vdd_cpu_lit_s0>; | |
102 | }; | |
103 | ||
104 | &gmac1 { | |
105 | clock_in_out = "output"; | |
106 | phy-handle = <&rgmii_phy>; | |
107 | phy-mode = "rgmii-rxid"; | |
108 | pinctrl-0 = <&gmac1_miim | |
109 | &gmac1_tx_bus2 | |
110 | &gmac1_rx_bus2 | |
111 | &gmac1_rgmii_clk | |
112 | &gmac1_rgmii_bus>; | |
113 | pinctrl-names = "default"; | |
114 | rx_delay = <0x00>; | |
115 | tx_delay = <0x43>; | |
116 | status = "okay"; | |
117 | }; | |
118 | ||
119 | &i2c0 { | |
120 | pinctrl-names = "default"; | |
121 | pinctrl-0 = <&i2c0m2_xfer>; | |
122 | status = "okay"; | |
123 | ||
124 | vdd_cpu_big0_s0: regulator@42 { | |
125 | compatible = "rockchip,rk8602"; | |
126 | reg = <0x42>; | |
127 | fcs,suspend-voltage-selector = <1>; | |
128 | regulator-name = "vdd_cpu_big0_s0"; | |
129 | regulator-always-on; | |
130 | regulator-boot-on; | |
131 | regulator-min-microvolt = <550000>; | |
132 | regulator-max-microvolt = <1050000>; | |
133 | regulator-ramp-delay = <2300>; | |
134 | vin-supply = <&vcc5v0_sys>; | |
135 | ||
136 | regulator-state-mem { | |
137 | regulator-off-in-suspend; | |
138 | }; | |
139 | }; | |
140 | ||
141 | vdd_cpu_big1_s0: regulator@43 { | |
142 | compatible = "rockchip,rk8603", "rockchip,rk8602"; | |
143 | reg = <0x43>; | |
144 | fcs,suspend-voltage-selector = <1>; | |
145 | regulator-name = "vdd_cpu_big1_s0"; | |
146 | regulator-always-on; | |
147 | regulator-boot-on; | |
148 | regulator-min-microvolt = <550000>; | |
149 | regulator-max-microvolt = <1050000>; | |
150 | regulator-ramp-delay = <2300>; | |
151 | vin-supply = <&vcc5v0_sys>; | |
152 | ||
153 | regulator-state-mem { | |
154 | regulator-off-in-suspend; | |
155 | }; | |
156 | }; | |
157 | }; | |
158 | ||
159 | &i2c1 { | |
160 | pinctrl-names = "default"; | |
161 | pinctrl-0 = <&i2c1m2_xfer>; | |
162 | status = "okay"; | |
163 | ||
164 | vdd_npu_s0: regulator@42 { | |
165 | compatible = "rockchip,rk8602"; | |
166 | reg = <0x42>; | |
167 | fcs,suspend-voltage-selector = <1>; | |
168 | regulator-name = "vdd_npu_s0"; | |
169 | regulator-always-on; | |
170 | regulator-boot-on; | |
171 | regulator-min-microvolt = <550000>; | |
172 | regulator-max-microvolt = <950000>; | |
173 | regulator-ramp-delay = <2300>; | |
174 | vin-supply = <&vcc5v0_sys>; | |
175 | ||
176 | regulator-state-mem { | |
177 | regulator-off-in-suspend; | |
178 | }; | |
179 | }; | |
180 | }; | |
181 | ||
182 | &i2c6 { | |
183 | status = "okay"; | |
184 | ||
185 | hym8563: rtc@51 { | |
186 | compatible = "haoyu,hym8563"; | |
187 | reg = <0x51>; | |
188 | #clock-cells = <0>; | |
189 | clock-output-names = "hym8563"; | |
190 | pinctrl-names = "default"; | |
191 | pinctrl-0 = <&hym8563_int>; | |
192 | interrupt-parent = <&gpio0>; | |
193 | interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; | |
194 | wakeup-source; | |
195 | }; | |
196 | }; | |
197 | ||
198 | &mdio1 { | |
199 | rgmii_phy: ethernet-phy@1 { | |
200 | /* RTL8211F */ | |
201 | compatible = "ethernet-phy-id001c.c916", | |
202 | "ethernet-phy-ieee802.3-c22"; | |
203 | reg = <0x1>; | |
204 | pinctrl-names = "default"; | |
205 | pinctrl-0 = <&rtl8211f_rst>; | |
206 | reset-assert-us = <15000>; | |
207 | reset-deassert-us = <50000>; | |
208 | reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; | |
209 | }; | |
210 | }; | |
211 | ||
212 | &pcie2x1l1 { | |
213 | linux,pci-domain = <1>; | |
214 | pinctrl-names = "default"; | |
215 | pinctrl-0 = <&pcie2_reset>; | |
216 | reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; | |
217 | status = "okay"; | |
218 | }; | |
219 | ||
220 | &pcie30phy { | |
221 | status = "okay"; | |
222 | }; | |
223 | ||
224 | &pcie3x4 { | |
225 | linux,pci-domain = <0>; | |
226 | pinctrl-names = "default"; | |
227 | pinctrl-0 = <&pcie3_reset>; | |
228 | reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; | |
229 | vpcie3v3-supply = <&vcc3v3_pcie30>; | |
230 | status = "okay"; | |
231 | }; | |
232 | ||
233 | &pinctrl { | |
234 | fan { | |
235 | fan_int: fan-int { | |
236 | rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; | |
237 | }; | |
238 | }; | |
239 | ||
240 | hym8563 { | |
241 | hym8563_int: hym8563-int { | |
242 | rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; | |
243 | }; | |
244 | }; | |
245 | ||
246 | pcie2 { | |
247 | pcie2_reset: pcie2-reset { | |
248 | rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; | |
249 | }; | |
250 | }; | |
251 | ||
252 | pcie3 { | |
253 | pcie3_reset: pcie3-reset { | |
254 | rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; | |
255 | }; | |
256 | ||
257 | vcc3v3_pcie30_en: pcie3-reg { | |
258 | rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; | |
259 | }; | |
260 | }; | |
261 | ||
262 | rtl8211f { | |
263 | rtl8211f_rst: rtl8211f-rst { | |
264 | rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; | |
265 | }; | |
266 | }; | |
267 | }; | |
268 | ||
269 | &pwm0 { | |
270 | status = "okay"; | |
271 | }; | |
272 | ||
273 | &sdhci { | |
274 | bus-width = <8>; | |
275 | no-sdio; | |
276 | no-sd; | |
277 | non-removable; | |
278 | mmc-hs400-1_8v; | |
279 | mmc-hs400-enhanced-strobe; | |
280 | status = "okay"; | |
281 | }; | |
282 | ||
283 | &spi2 { | |
284 | status = "okay"; | |
285 | pinctrl-names = "default"; | |
286 | pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; | |
287 | num-cs = <1>; | |
288 | ||
289 | pmic@0 { | |
290 | compatible = "rockchip,rk806"; | |
291 | spi-max-frequency = <1000000>; | |
292 | reg = <0x0>; | |
293 | ||
294 | interrupt-parent = <&gpio0>; | |
295 | interrupts = <7 IRQ_TYPE_LEVEL_LOW>; | |
296 | ||
297 | pinctrl-names = "default"; | |
298 | pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, | |
299 | <&rk806_dvs2_null>, <&rk806_dvs3_null>; | |
300 | ||
301 | vcc1-supply = <&vcc5v0_sys>; | |
302 | vcc2-supply = <&vcc5v0_sys>; | |
303 | vcc3-supply = <&vcc5v0_sys>; | |
304 | vcc4-supply = <&vcc5v0_sys>; | |
305 | vcc5-supply = <&vcc5v0_sys>; | |
306 | vcc6-supply = <&vcc5v0_sys>; | |
307 | vcc7-supply = <&vcc5v0_sys>; | |
308 | vcc8-supply = <&vcc5v0_sys>; | |
309 | vcc9-supply = <&vcc5v0_sys>; | |
310 | vcc10-supply = <&vcc5v0_sys>; | |
311 | vcc11-supply = <&vcc_2v0_pldo_s3>; | |
312 | vcc12-supply = <&vcc5v0_sys>; | |
313 | vcc13-supply = <&vcc_1v1_nldo_s3>; | |
314 | vcc14-supply = <&vcc_1v1_nldo_s3>; | |
315 | vcca-supply = <&vcc5v0_sys>; | |
316 | ||
317 | gpio-controller; | |
318 | #gpio-cells = <2>; | |
319 | ||
320 | rk806_dvs1_null: dvs1-null-pins { | |
321 | pins = "gpio_pwrctrl2"; | |
322 | function = "pin_fun0"; | |
323 | }; | |
324 | ||
325 | rk806_dvs2_null: dvs2-null-pins { | |
326 | pins = "gpio_pwrctrl2"; | |
327 | function = "pin_fun0"; | |
328 | }; | |
329 | ||
330 | rk806_dvs3_null: dvs3-null-pins { | |
331 | pins = "gpio_pwrctrl3"; | |
332 | function = "pin_fun0"; | |
333 | }; | |
334 | ||
335 | regulators { | |
336 | vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { | |
337 | regulator-boot-on; | |
338 | regulator-min-microvolt = <550000>; | |
339 | regulator-max-microvolt = <950000>; | |
340 | regulator-ramp-delay = <12500>; | |
341 | regulator-name = "vdd_gpu_s0"; | |
342 | regulator-enable-ramp-delay = <400>; | |
343 | ||
344 | regulator-state-mem { | |
345 | regulator-off-in-suspend; | |
346 | }; | |
347 | }; | |
348 | ||
349 | vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { | |
350 | regulator-always-on; | |
351 | regulator-boot-on; | |
352 | regulator-min-microvolt = <550000>; | |
353 | regulator-max-microvolt = <950000>; | |
354 | regulator-ramp-delay = <12500>; | |
355 | regulator-name = "vdd_cpu_lit_s0"; | |
356 | ||
357 | regulator-state-mem { | |
358 | regulator-off-in-suspend; | |
359 | }; | |
360 | }; | |
361 | ||
362 | vdd_log_s0: dcdc-reg3 { | |
363 | regulator-always-on; | |
364 | regulator-boot-on; | |
365 | regulator-min-microvolt = <675000>; | |
366 | regulator-max-microvolt = <750000>; | |
367 | regulator-ramp-delay = <12500>; | |
368 | regulator-name = "vdd_log_s0"; | |
369 | ||
370 | regulator-state-mem { | |
371 | regulator-off-in-suspend; | |
372 | regulator-suspend-microvolt = <750000>; | |
373 | }; | |
374 | }; | |
375 | ||
376 | vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { | |
377 | regulator-always-on; | |
378 | regulator-boot-on; | |
379 | regulator-min-microvolt = <550000>; | |
380 | regulator-max-microvolt = <950000>; | |
381 | regulator-ramp-delay = <12500>; | |
382 | regulator-name = "vdd_vdenc_s0"; | |
383 | ||
384 | regulator-state-mem { | |
385 | regulator-off-in-suspend; | |
386 | }; | |
387 | }; | |
388 | ||
389 | vdd_ddr_s0: dcdc-reg5 { | |
390 | regulator-always-on; | |
391 | regulator-boot-on; | |
392 | regulator-min-microvolt = <675000>; | |
393 | regulator-max-microvolt = <900000>; | |
394 | regulator-ramp-delay = <12500>; | |
395 | regulator-name = "vdd_ddr_s0"; | |
396 | ||
397 | regulator-state-mem { | |
398 | regulator-off-in-suspend; | |
399 | regulator-suspend-microvolt = <850000>; | |
400 | }; | |
401 | }; | |
402 | ||
403 | vdd2_ddr_s3: dcdc-reg6 { | |
404 | regulator-always-on; | |
405 | regulator-boot-on; | |
406 | regulator-name = "vdd2_ddr_s3"; | |
407 | ||
408 | regulator-state-mem { | |
409 | regulator-on-in-suspend; | |
410 | }; | |
411 | }; | |
412 | ||
413 | vcc_2v0_pldo_s3: dcdc-reg7 { | |
414 | regulator-always-on; | |
415 | regulator-boot-on; | |
416 | regulator-min-microvolt = <2000000>; | |
417 | regulator-max-microvolt = <2000000>; | |
418 | regulator-ramp-delay = <12500>; | |
419 | regulator-name = "vdd_2v0_pldo_s3"; | |
420 | ||
421 | regulator-state-mem { | |
422 | regulator-on-in-suspend; | |
423 | regulator-suspend-microvolt = <2000000>; | |
424 | }; | |
425 | }; | |
426 | ||
427 | vcc_3v3_s3: dcdc-reg8 { | |
428 | regulator-always-on; | |
429 | regulator-boot-on; | |
430 | regulator-min-microvolt = <3300000>; | |
431 | regulator-max-microvolt = <3300000>; | |
432 | regulator-name = "vcc_3v3_s3"; | |
433 | ||
434 | regulator-state-mem { | |
435 | regulator-on-in-suspend; | |
436 | regulator-suspend-microvolt = <3300000>; | |
437 | }; | |
438 | }; | |
439 | ||
440 | vddq_ddr_s0: dcdc-reg9 { | |
441 | regulator-always-on; | |
442 | regulator-boot-on; | |
443 | regulator-name = "vddq_ddr_s0"; | |
444 | ||
445 | regulator-state-mem { | |
446 | regulator-off-in-suspend; | |
447 | }; | |
448 | }; | |
449 | ||
450 | vcc_1v8_s3: dcdc-reg10 { | |
451 | regulator-always-on; | |
452 | regulator-boot-on; | |
453 | regulator-min-microvolt = <1800000>; | |
454 | regulator-max-microvolt = <1800000>; | |
455 | regulator-name = "vcc_1v8_s3"; | |
456 | ||
457 | regulator-state-mem { | |
458 | regulator-on-in-suspend; | |
459 | regulator-suspend-microvolt = <1800000>; | |
460 | }; | |
461 | }; | |
462 | ||
463 | avcc_1v8_s0: pldo-reg1 { | |
464 | regulator-always-on; | |
465 | regulator-boot-on; | |
466 | regulator-min-microvolt = <1800000>; | |
467 | regulator-max-microvolt = <1800000>; | |
468 | regulator-name = "avcc_1v8_s0"; | |
469 | ||
470 | regulator-state-mem { | |
471 | regulator-off-in-suspend; | |
472 | }; | |
473 | }; | |
474 | ||
475 | vcc_1v8_s0: pldo-reg2 { | |
476 | regulator-always-on; | |
477 | regulator-boot-on; | |
478 | regulator-min-microvolt = <1800000>; | |
479 | regulator-max-microvolt = <1800000>; | |
480 | regulator-name = "vcc_1v8_s0"; | |
481 | ||
482 | regulator-state-mem { | |
483 | regulator-off-in-suspend; | |
484 | regulator-suspend-microvolt = <1800000>; | |
485 | }; | |
486 | }; | |
487 | ||
488 | avdd_1v2_s0: pldo-reg3 { | |
489 | regulator-always-on; | |
490 | regulator-boot-on; | |
491 | regulator-min-microvolt = <1200000>; | |
492 | regulator-max-microvolt = <1200000>; | |
493 | regulator-name = "avdd_1v2_s0"; | |
494 | ||
495 | regulator-state-mem { | |
496 | regulator-off-in-suspend; | |
497 | }; | |
498 | }; | |
499 | ||
500 | vcc_3v3_s0: pldo-reg4 { | |
501 | regulator-always-on; | |
502 | regulator-boot-on; | |
503 | regulator-min-microvolt = <3300000>; | |
504 | regulator-max-microvolt = <3300000>; | |
505 | regulator-ramp-delay = <12500>; | |
506 | regulator-name = "vcc_3v3_s0"; | |
507 | ||
508 | regulator-state-mem { | |
509 | regulator-off-in-suspend; | |
510 | }; | |
511 | }; | |
512 | ||
513 | vccio_sd_s0: pldo-reg5 { | |
514 | regulator-always-on; | |
515 | regulator-boot-on; | |
516 | regulator-min-microvolt = <1800000>; | |
517 | regulator-max-microvolt = <3300000>; | |
518 | regulator-ramp-delay = <12500>; | |
519 | regulator-name = "vccio_sd_s0"; | |
520 | ||
521 | regulator-state-mem { | |
522 | regulator-off-in-suspend; | |
523 | }; | |
524 | }; | |
525 | ||
526 | pldo6_s3: pldo-reg6 { | |
527 | regulator-always-on; | |
528 | regulator-boot-on; | |
529 | regulator-min-microvolt = <1800000>; | |
530 | regulator-max-microvolt = <1800000>; | |
531 | regulator-name = "pldo6_s3"; | |
532 | ||
533 | regulator-state-mem { | |
534 | regulator-on-in-suspend; | |
535 | regulator-suspend-microvolt = <1800000>; | |
536 | }; | |
537 | }; | |
538 | ||
539 | vdd_0v75_s3: nldo-reg1 { | |
540 | regulator-always-on; | |
541 | regulator-boot-on; | |
542 | regulator-min-microvolt = <750000>; | |
543 | regulator-max-microvolt = <750000>; | |
544 | regulator-name = "vdd_0v75_s3"; | |
545 | ||
546 | regulator-state-mem { | |
547 | regulator-on-in-suspend; | |
548 | regulator-suspend-microvolt = <750000>; | |
549 | }; | |
550 | }; | |
551 | ||
552 | vdd_ddr_pll_s0: nldo-reg2 { | |
553 | regulator-always-on; | |
554 | regulator-boot-on; | |
555 | regulator-min-microvolt = <850000>; | |
556 | regulator-max-microvolt = <850000>; | |
557 | regulator-name = "vdd_ddr_pll_s0"; | |
558 | ||
559 | regulator-state-mem { | |
560 | regulator-off-in-suspend; | |
561 | regulator-suspend-microvolt = <850000>; | |
562 | }; | |
563 | }; | |
564 | ||
565 | avdd_0v75_s0: nldo-reg3 { | |
566 | regulator-always-on; | |
567 | regulator-boot-on; | |
568 | regulator-min-microvolt = <750000>; | |
569 | regulator-max-microvolt = <750000>; | |
570 | regulator-name = "avdd_0v75_s0"; | |
571 | ||
572 | regulator-state-mem { | |
573 | regulator-off-in-suspend; | |
574 | }; | |
575 | }; | |
576 | ||
577 | vdd_0v85_s0: nldo-reg4 { | |
578 | regulator-always-on; | |
579 | regulator-boot-on; | |
580 | regulator-min-microvolt = <850000>; | |
581 | regulator-max-microvolt = <850000>; | |
582 | regulator-name = "vdd_0v85_s0"; | |
583 | ||
584 | regulator-state-mem { | |
585 | regulator-off-in-suspend; | |
586 | }; | |
587 | }; | |
588 | ||
589 | vdd_0v75_s0: nldo-reg5 { | |
590 | regulator-always-on; | |
591 | regulator-boot-on; | |
592 | regulator-min-microvolt = <750000>; | |
593 | regulator-max-microvolt = <750000>; | |
594 | regulator-name = "vdd_0v75_s0"; | |
595 | ||
596 | regulator-state-mem { | |
597 | regulator-off-in-suspend; | |
598 | }; | |
599 | }; | |
600 | }; | |
601 | }; | |
602 | }; | |
603 | ||
604 | &uart2 { | |
605 | pinctrl-0 = <&uart2m0_xfer>; | |
606 | status = "okay"; | |
607 | }; | |
608 | ||
609 | &uart9 { | |
610 | pinctrl-0 = <&uart9m0_xfer>; | |
611 | status = "okay"; | |
612 | }; |