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53633a89 TR |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ | |
4 | */ | |
5 | ||
6 | /dts-v1/; | |
7 | ||
8 | #include "k3-j7200.dtsi" | |
9 | ||
10 | / { | |
11 | memory@80000000 { | |
12 | device_type = "memory"; | |
13 | /* 4G RAM */ | |
14 | reg = <0x00 0x80000000 0x00 0x80000000>, | |
15 | <0x08 0x80000000 0x00 0x80000000>; | |
16 | }; | |
17 | ||
18 | reserved_memory: reserved-memory { | |
19 | #address-cells = <2>; | |
20 | #size-cells = <2>; | |
21 | ranges; | |
22 | ||
23 | secure_ddr: optee@9e800000 { | |
24 | reg = <0x00 0x9e800000 0x00 0x01800000>; | |
25 | alignment = <0x1000>; | |
26 | no-map; | |
27 | }; | |
28 | ||
29 | mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { | |
30 | compatible = "shared-dma-pool"; | |
31 | reg = <0x00 0xa0000000 0x00 0x100000>; | |
32 | no-map; | |
33 | }; | |
34 | ||
35 | mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { | |
36 | compatible = "shared-dma-pool"; | |
37 | reg = <0x00 0xa0100000 0x00 0xf00000>; | |
38 | no-map; | |
39 | }; | |
40 | ||
41 | mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { | |
42 | compatible = "shared-dma-pool"; | |
43 | reg = <0x00 0xa1000000 0x00 0x100000>; | |
44 | no-map; | |
45 | }; | |
46 | ||
47 | mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { | |
48 | compatible = "shared-dma-pool"; | |
49 | reg = <0x00 0xa1100000 0x00 0xf00000>; | |
50 | no-map; | |
51 | }; | |
52 | ||
53 | main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 { | |
54 | compatible = "shared-dma-pool"; | |
55 | reg = <0x00 0xa2000000 0x00 0x100000>; | |
56 | no-map; | |
57 | }; | |
58 | ||
59 | main_r5fss0_core0_memory_region: r5f-memory@a2100000 { | |
60 | compatible = "shared-dma-pool"; | |
61 | reg = <0x00 0xa2100000 0x00 0xf00000>; | |
62 | no-map; | |
63 | }; | |
64 | ||
65 | main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 { | |
66 | compatible = "shared-dma-pool"; | |
67 | reg = <0x00 0xa3000000 0x00 0x100000>; | |
68 | no-map; | |
69 | }; | |
70 | ||
71 | main_r5fss0_core1_memory_region: r5f-memory@a3100000 { | |
72 | compatible = "shared-dma-pool"; | |
73 | reg = <0x00 0xa3100000 0x00 0xf00000>; | |
74 | no-map; | |
75 | }; | |
76 | ||
77 | rtos_ipc_memory_region: ipc-memories@a4000000 { | |
78 | reg = <0x00 0xa4000000 0x00 0x00800000>; | |
79 | alignment = <0x1000>; | |
80 | no-map; | |
81 | }; | |
82 | }; | |
83 | }; | |
84 | ||
85 | &wkup_pmx0 { | |
86 | mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-default-pins { | |
87 | pinctrl-single,pins = < | |
88 | J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1) /* (B6) MCU_OSPI0_CLK.MCU_HYPERBUS0_CK */ | |
89 | J721E_WKUP_IOPAD(0x4, PIN_OUTPUT, 1) /* (C8) MCU_OSPI0_LBCLKO.MCU_HYPERBUS0_CKn */ | |
90 | J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 1) /* (D6) MCU_OSPI0_CSn0.MCU_HYPERBUS0_CSn0 */ | |
91 | J721E_WKUP_IOPAD(0x30, PIN_OUTPUT, 1) /* (D7) MCU_OSPI0_CSn1.MCU_HYPERBUS0_RESETn */ | |
92 | J721E_WKUP_IOPAD(0x8, PIN_INPUT, 1) /* (B7) MCU_OSPI0_DQS.MCU_HYPERBUS0_RWDS */ | |
93 | J721E_WKUP_IOPAD(0xc, PIN_INPUT, 1) /* (D8) MCU_OSPI0_D0.MCU_HYPERBUS0_DQ0 */ | |
94 | J721E_WKUP_IOPAD(0x10, PIN_INPUT, 1) /* (C7) MCU_OSPI0_D1.MCU_HYPERBUS0_DQ1 */ | |
95 | J721E_WKUP_IOPAD(0x14, PIN_INPUT, 1) /* (C5) MCU_OSPI0_D2.MCU_HYPERBUS0_DQ2 */ | |
96 | J721E_WKUP_IOPAD(0x18, PIN_INPUT, 1) /* (A5) MCU_OSPI0_D3.MCU_HYPERBUS0_DQ3 */ | |
97 | J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 1) /* (A6) MCU_OSPI0_D4.MCU_HYPERBUS0_DQ4 */ | |
98 | J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (B8) MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */ | |
99 | J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (A8) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */ | |
100 | J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (A7) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */ | |
101 | >; | |
102 | }; | |
103 | ||
104 | mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { | |
105 | pinctrl-single,pins = < | |
106 | J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */ | |
107 | J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */ | |
108 | J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */ | |
109 | J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */ | |
110 | J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */ | |
111 | J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */ | |
112 | J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */ | |
113 | J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */ | |
114 | J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */ | |
115 | J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */ | |
116 | J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */ | |
117 | >; | |
118 | }; | |
119 | }; | |
120 | ||
121 | &wkup_pmx2 { | |
122 | wkup_i2c0_pins_default: wkup-i2c0-default-pins { | |
123 | pinctrl-single,pins = < | |
124 | J721E_WKUP_IOPAD(0x98, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */ | |
125 | J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */ | |
126 | >; | |
127 | }; | |
128 | }; | |
129 | ||
130 | &main_pmx0 { | |
131 | main_i2c0_pins_default: main-i2c0-default-pins { | |
132 | pinctrl-single,pins = < | |
133 | J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ | |
134 | J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ | |
135 | >; | |
136 | }; | |
137 | }; | |
138 | ||
139 | &hbmc { | |
140 | /* OSPI and HBMC are muxed inside FSS, Bootloader will enable | |
141 | * appropriate node based on board detection | |
142 | */ | |
143 | status = "disabled"; | |
144 | pinctrl-names = "default"; | |
145 | pinctrl-0 = <&mcu_fss0_hpb0_pins_default>; | |
146 | ranges = <0x00 0x00 0x05 0x00000000 0x4000000>, /* 64MB Flash on CS0 */ | |
147 | <0x01 0x00 0x05 0x04000000 0x800000>; /* 8MB RAM on CS1 */ | |
148 | ||
149 | flash@0,0 { | |
150 | compatible = "cypress,hyperflash", "cfi-flash"; | |
151 | reg = <0x00 0x00 0x4000000>; | |
152 | ||
153 | partitions { | |
154 | compatible = "fixed-partitions"; | |
155 | #address-cells = <1>; | |
156 | #size-cells = <1>; | |
157 | ||
158 | partition@0 { | |
159 | label = "hbmc.tiboot3"; | |
160 | reg = <0x0 0x100000>; | |
161 | }; | |
162 | ||
163 | partition@100000 { | |
164 | label = "hbmc.tispl"; | |
165 | reg = <0x100000 0x200000>; | |
166 | }; | |
167 | ||
168 | partition@300000 { | |
169 | label = "hbmc.u-boot"; | |
170 | reg = <0x300000 0x400000>; | |
171 | }; | |
172 | ||
173 | partition@700000 { | |
174 | label = "hbmc.env"; | |
175 | reg = <0x700000 0x40000>; | |
176 | }; | |
177 | ||
178 | partition@800000 { | |
179 | label = "hbmc.rootfs"; | |
180 | reg = <0x800000 0x3800000>; | |
181 | }; | |
182 | }; | |
183 | }; | |
184 | }; | |
185 | ||
186 | &mailbox0_cluster0 { | |
187 | status = "okay"; | |
188 | interrupts = <436>; | |
189 | ||
190 | mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { | |
191 | ti,mbox-rx = <0 0 0>; | |
192 | ti,mbox-tx = <1 0 0>; | |
193 | }; | |
194 | ||
195 | mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { | |
196 | ti,mbox-rx = <2 0 0>; | |
197 | ti,mbox-tx = <3 0 0>; | |
198 | }; | |
199 | }; | |
200 | ||
201 | &mailbox0_cluster1 { | |
202 | status = "okay"; | |
203 | interrupts = <432>; | |
204 | ||
205 | mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { | |
206 | ti,mbox-rx = <0 0 0>; | |
207 | ti,mbox-tx = <1 0 0>; | |
208 | }; | |
209 | ||
210 | mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { | |
211 | ti,mbox-rx = <2 0 0>; | |
212 | ti,mbox-tx = <3 0 0>; | |
213 | }; | |
214 | }; | |
215 | ||
216 | &mcu_r5fss0_core0 { | |
217 | mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; | |
218 | memory-region = <&mcu_r5fss0_core0_dma_memory_region>, | |
219 | <&mcu_r5fss0_core0_memory_region>; | |
220 | }; | |
221 | ||
222 | &mcu_r5fss0_core1 { | |
223 | mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>; | |
224 | memory-region = <&mcu_r5fss0_core1_dma_memory_region>, | |
225 | <&mcu_r5fss0_core1_memory_region>; | |
226 | }; | |
227 | ||
228 | &main_r5fss0_core0 { | |
229 | mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>; | |
230 | memory-region = <&main_r5fss0_core0_dma_memory_region>, | |
231 | <&main_r5fss0_core0_memory_region>; | |
232 | }; | |
233 | ||
234 | &main_r5fss0_core1 { | |
235 | mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>; | |
236 | memory-region = <&main_r5fss0_core1_dma_memory_region>, | |
237 | <&main_r5fss0_core1_memory_region>; | |
238 | }; | |
239 | ||
240 | &main_i2c0 { | |
241 | pinctrl-names = "default"; | |
242 | pinctrl-0 = <&main_i2c0_pins_default>; | |
243 | clock-frequency = <400000>; | |
244 | ||
245 | exp_som: gpio@21 { | |
246 | compatible = "ti,tca6408"; | |
247 | reg = <0x21>; | |
248 | gpio-controller; | |
249 | #gpio-cells = <2>; | |
250 | gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0", | |
251 | "CANUART_MUX2_SEL0", "CANUART_MUX_SEL1", | |
252 | "UART/LIN_MUX_SEL", "TRC_D17/AUDIO_REFCLK_SEL", | |
253 | "GPIO_LIN_EN", "CAN_STB"; | |
254 | }; | |
255 | }; | |
256 | ||
257 | &wkup_i2c0 { | |
258 | status = "okay"; | |
259 | pinctrl-names = "default"; | |
260 | pinctrl-0 = <&wkup_i2c0_pins_default>; | |
261 | clock-frequency = <400000>; | |
262 | ||
263 | eeprom@50 { | |
264 | compatible = "atmel,24c256"; | |
265 | reg = <0x50>; | |
266 | }; | |
267 | }; | |
268 | ||
269 | &ospi0 { | |
270 | status = "okay"; | |
271 | pinctrl-names = "default"; | |
272 | pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; | |
273 | ||
274 | flash@0 { | |
275 | compatible = "jedec,spi-nor"; | |
276 | reg = <0x0>; | |
277 | spi-tx-bus-width = <8>; | |
278 | spi-rx-bus-width = <8>; | |
279 | spi-max-frequency = <25000000>; | |
280 | cdns,tshsl-ns = <60>; | |
281 | cdns,tsd2d-ns = <60>; | |
282 | cdns,tchsh-ns = <60>; | |
283 | cdns,tslch-ns = <60>; | |
284 | cdns,read-delay = <4>; | |
285 | ||
286 | partitions { | |
287 | compatible = "fixed-partitions"; | |
288 | #address-cells = <1>; | |
289 | #size-cells = <1>; | |
290 | ||
291 | partition@0 { | |
292 | label = "ospi.tiboot3"; | |
293 | reg = <0x0 0x100000>; | |
294 | }; | |
295 | ||
296 | partition@100000 { | |
297 | label = "ospi.tispl"; | |
298 | reg = <0x100000 0x200000>; | |
299 | }; | |
300 | ||
301 | partition@300000 { | |
302 | label = "ospi.u-boot"; | |
303 | reg = <0x300000 0x400000>; | |
304 | }; | |
305 | ||
306 | partition@700000 { | |
307 | label = "ospi.env"; | |
308 | reg = <0x700000 0x40000>; | |
309 | }; | |
310 | ||
311 | partition@740000 { | |
312 | label = "ospi.env.backup"; | |
313 | reg = <0x740000 0x40000>; | |
314 | }; | |
315 | ||
316 | partition@800000 { | |
317 | label = "ospi.rootfs"; | |
318 | reg = <0x800000 0x37c0000>; | |
319 | }; | |
320 | ||
321 | partition@3fc0000 { | |
322 | label = "ospi.phypattern"; | |
323 | reg = <0x3fc0000 0x40000>; | |
324 | }; | |
325 | }; | |
326 | }; | |
327 | }; |