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CommitLineData
32993977
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1/*
2 * QEMU System Emulator
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24/*
669dcb60 25 * split out ioport related stuffs from vl.c.
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26 */
27
d38ea87a 28#include "qemu/osdep.h"
33c11879 29#include "cpu.h"
022c62cb 30#include "exec/ioport.h"
022c62cb 31#include "exec/memory.h"
b40acf99 32#include "exec/address-spaces.h"
8b7a5507 33#include "trace.h"
32993977 34
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35struct MemoryRegionPortioList {
36 Object obj;
37
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38 MemoryRegion mr;
39 void *portio_opaque;
d2f07b75 40 MemoryRegionPortio *ports;
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41};
42
43#define TYPE_MEMORY_REGION_PORTIO_LIST "memory-region-portio-list"
44OBJECT_DECLARE_SIMPLE_TYPE(MemoryRegionPortioList, MEMORY_REGION_PORTIO_LIST)
b40acf99 45
3bb28b72
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46static uint64_t unassigned_io_read(void *opaque, hwaddr addr, unsigned size)
47{
48 return -1ULL;
49}
50
51static void unassigned_io_write(void *opaque, hwaddr addr, uint64_t val,
52 unsigned size)
53{
54}
55
56const MemoryRegionOps unassigned_io_ops = {
57 .read = unassigned_io_read,
58 .write = unassigned_io_write,
59 .endianness = DEVICE_NATIVE_ENDIAN,
60};
61
89a80e74 62void cpu_outb(uint32_t addr, uint8_t val)
32993977 63{
6f94b7d9 64 trace_cpu_out(addr, 'b', val);
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65 address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
66 &val, 1);
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67}
68
89a80e74 69void cpu_outw(uint32_t addr, uint16_t val)
32993977 70{
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71 uint8_t buf[2];
72
6f94b7d9 73 trace_cpu_out(addr, 'w', val);
b40acf99 74 stw_p(buf, val);
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75 address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
76 buf, 2);
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77}
78
89a80e74 79void cpu_outl(uint32_t addr, uint32_t val)
32993977 80{
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81 uint8_t buf[4];
82
6f94b7d9 83 trace_cpu_out(addr, 'l', val);
b40acf99 84 stl_p(buf, val);
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85 address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
86 buf, 4);
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87}
88
89a80e74 89uint8_t cpu_inb(uint32_t addr)
32993977 90{
07323531 91 uint8_t val;
b40acf99 92
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93 address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
94 &val, 1);
6f94b7d9 95 trace_cpu_in(addr, 'b', val);
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96 return val;
97}
98
89a80e74 99uint16_t cpu_inw(uint32_t addr)
32993977 100{
b40acf99 101 uint8_t buf[2];
07323531 102 uint16_t val;
b40acf99 103
5c9eb028 104 address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 2);
b40acf99 105 val = lduw_p(buf);
6f94b7d9 106 trace_cpu_in(addr, 'w', val);
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107 return val;
108}
109
89a80e74 110uint32_t cpu_inl(uint32_t addr)
32993977 111{
b40acf99 112 uint8_t buf[4];
07323531 113 uint32_t val;
b40acf99 114
5c9eb028 115 address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 4);
b40acf99 116 val = ldl_p(buf);
6f94b7d9 117 trace_cpu_in(addr, 'l', val);
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118 return val;
119}
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120
121void portio_list_init(PortioList *piolist,
db10ca90 122 Object *owner,
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123 const MemoryRegionPortio *callbacks,
124 void *opaque, const char *name)
125{
126 unsigned n = 0;
127
128 while (callbacks[n].size) {
129 ++n;
130 }
131
132 piolist->ports = callbacks;
133 piolist->nr = 0;
134 piolist->regions = g_new0(MemoryRegion *, n);
135 piolist->address_space = NULL;
ad2b6523 136 piolist->addr = 0;
6bf9fd43 137 piolist->opaque = opaque;
db10ca90 138 piolist->owner = owner;
6bf9fd43 139 piolist->name = name;
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140 piolist->flush_coalesced_mmio = false;
141}
142
143void portio_list_set_flush_coalesced(PortioList *piolist)
144{
145 piolist->flush_coalesced_mmio = true;
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146}
147
148void portio_list_destroy(PortioList *piolist)
149{
e3fb0ade
PB
150 MemoryRegionPortioList *mrpio;
151 unsigned i;
152
153 for (i = 0; i < piolist->nr; ++i) {
154 mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr);
d8d95814 155 object_unparent(OBJECT(&mrpio->mr));
28770689 156 object_unref(mrpio);
e3fb0ade 157 }
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158 g_free(piolist->regions);
159}
160
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161static const MemoryRegionPortio *find_portio(MemoryRegionPortioList *mrpio,
162 uint64_t offset, unsigned size,
163 bool write)
164{
165 const MemoryRegionPortio *mrp;
166
167 for (mrp = mrpio->ports; mrp->size; ++mrp) {
168 if (offset >= mrp->offset && offset < mrp->offset + mrp->len &&
169 size == mrp->size &&
170 (write ? (bool)mrp->write : (bool)mrp->read)) {
171 return mrp;
172 }
173 }
174 return NULL;
175}
176
177static uint64_t portio_read(void *opaque, hwaddr addr, unsigned size)
178{
179 MemoryRegionPortioList *mrpio = opaque;
180 const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, false);
181 uint64_t data;
182
183 data = ((uint64_t)1 << (size * 8)) - 1;
184 if (mrp) {
4edee342 185 data = mrp->read(mrpio->portio_opaque, mrpio->mr.addr + addr);
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186 } else if (size == 2) {
187 mrp = find_portio(mrpio, addr, 1, false);
147ed379 188 if (mrp) {
4edee342 189 data = mrp->read(mrpio->portio_opaque, mrpio->mr.addr + addr);
147ed379 190 if (addr + 1 < mrp->offset + mrp->len) {
4edee342 191 data |= mrp->read(mrpio->portio_opaque, mrpio->mr.addr + addr + 1) << 8;
147ed379
PB
192 } else {
193 data |= 0xff00;
194 }
195 }
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196 }
197 return data;
198}
199
200static void portio_write(void *opaque, hwaddr addr, uint64_t data,
201 unsigned size)
202{
203 MemoryRegionPortioList *mrpio = opaque;
204 const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, true);
205
206 if (mrp) {
4edee342 207 mrp->write(mrpio->portio_opaque, mrpio->mr.addr + addr, data);
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208 } else if (size == 2) {
209 mrp = find_portio(mrpio, addr, 1, true);
147ed379 210 if (mrp) {
4edee342 211 mrp->write(mrpio->portio_opaque, mrpio->mr.addr + addr, data & 0xff);
147ed379 212 if (addr + 1 < mrp->offset + mrp->len) {
4edee342 213 mrp->write(mrpio->portio_opaque, mrpio->mr.addr + addr + 1, data >> 8);
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214 }
215 }
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216 }
217}
218
219static const MemoryRegionOps portio_ops = {
220 .read = portio_read,
221 .write = portio_write,
f36a6382 222 .endianness = DEVICE_LITTLE_ENDIAN,
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223 .valid.unaligned = true,
224 .impl.unaligned = true,
225};
226
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227static void portio_list_add_1(PortioList *piolist,
228 const MemoryRegionPortio *pio_init,
229 unsigned count, unsigned start,
230 unsigned off_low, unsigned off_high)
231{
b40acf99 232 MemoryRegionPortioList *mrpio;
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233 Object *owner;
234 char *name;
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235 unsigned i;
236
237 /* Copy the sub-list and null-terminate it. */
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238 mrpio = MEMORY_REGION_PORTIO_LIST(
239 object_new(TYPE_MEMORY_REGION_PORTIO_LIST));
b40acf99 240 mrpio->portio_opaque = piolist->opaque;
d2f07b75 241 mrpio->ports = g_malloc0(sizeof(MemoryRegionPortio) * (count + 1));
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242 memcpy(mrpio->ports, pio_init, sizeof(MemoryRegionPortio) * count);
243 memset(mrpio->ports + count, 0, sizeof(MemoryRegionPortio));
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244
245 /* Adjust the offsets to all be zero-based for the region. */
246 for (i = 0; i < count; ++i) {
b40acf99 247 mrpio->ports[i].offset -= off_low;
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248 }
249
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250 /*
251 * The MemoryRegion owner is the MemoryRegionPortioList since that manages
252 * the lifecycle via the refcount
253 */
254 memory_region_init_io(&mrpio->mr, OBJECT(mrpio), &portio_ops, mrpio,
db10ca90 255 piolist->name, off_high - off_low);
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256
257 /* Reparent the MemoryRegion to the piolist owner */
258 object_ref(&mrpio->mr);
259 object_unparent(OBJECT(&mrpio->mr));
260 if (!piolist->owner) {
261 owner = container_get(qdev_get_machine(), "/unattached");
262 } else {
263 owner = piolist->owner;
264 }
265 name = g_strdup_printf("%s[*]", piolist->name);
266 object_property_add_child(owner, name, OBJECT(&mrpio->mr));
267 g_free(name);
268
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269 if (piolist->flush_coalesced_mmio) {
270 memory_region_set_flush_coalesced(&mrpio->mr);
271 }
6bf9fd43 272 memory_region_add_subregion(piolist->address_space,
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273 start + off_low, &mrpio->mr);
274 piolist->regions[piolist->nr] = &mrpio->mr;
de58ac72 275 ++piolist->nr;
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276}
277
278void portio_list_add(PortioList *piolist,
279 MemoryRegion *address_space,
280 uint32_t start)
281{
282 const MemoryRegionPortio *pio, *pio_start = piolist->ports;
283 unsigned int off_low, off_high, off_last, count;
284
285 piolist->address_space = address_space;
ad2b6523 286 piolist->addr = start;
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287
288 /* Handle the first entry specially. */
289 off_last = off_low = pio_start->offset;
4080a13c 290 off_high = off_low + pio_start->len + pio_start->size - 1;
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291 count = 1;
292
293 for (pio = pio_start + 1; pio->size != 0; pio++, count++) {
294 /* All entries must be sorted by offset. */
295 assert(pio->offset >= off_last);
296 off_last = pio->offset;
297
298 /* If we see a hole, break the region. */
299 if (off_last > off_high) {
300 portio_list_add_1(piolist, pio_start, count, start, off_low,
301 off_high);
302 /* ... and start collecting anew. */
303 pio_start = pio;
304 off_low = off_last;
4080a13c 305 off_high = off_low + pio->len + pio_start->size - 1;
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306 count = 0;
307 } else if (off_last + pio->len > off_high) {
4080a13c 308 off_high = off_last + pio->len + pio_start->size - 1;
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309 }
310 }
311
312 /* There will always be an open sub-list. */
313 portio_list_add_1(piolist, pio_start, count, start, off_low, off_high);
314}
315
316void portio_list_del(PortioList *piolist)
317{
b40acf99 318 MemoryRegionPortioList *mrpio;
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319 unsigned i;
320
321 for (i = 0; i < piolist->nr; ++i) {
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322 mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr);
323 memory_region_del_subregion(piolist->address_space, &mrpio->mr);
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324 }
325}
28770689 326
f165cdf1
BB
327void portio_list_set_enabled(PortioList *piolist, bool enabled)
328{
329 unsigned i;
330
331 for (i = 0; i < piolist->nr; ++i) {
332 memory_region_set_enabled(piolist->regions[i], enabled);
333 }
334}
335
ad2b6523
BB
336void portio_list_set_address(PortioList *piolist, uint32_t addr)
337{
338 MemoryRegionPortioList *mrpio;
339 unsigned i, j;
340
341 for (i = 0; i < piolist->nr; ++i) {
342 mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr);
343 memory_region_set_address(&mrpio->mr,
344 mrpio->mr.addr - piolist->addr + addr);
345 for (j = 0; mrpio->ports[j].size; ++j) {
346 mrpio->ports[j].offset += addr - piolist->addr;
347 }
348 }
349
350 piolist->addr = addr;
351}
352
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353static void memory_region_portio_list_finalize(Object *obj)
354{
355 MemoryRegionPortioList *mrpio = MEMORY_REGION_PORTIO_LIST(obj);
356
690705ca 357 object_unref(&mrpio->mr);
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358 g_free(mrpio->ports);
359}
360
361static const TypeInfo memory_region_portio_list_info = {
362 .parent = TYPE_OBJECT,
363 .name = TYPE_MEMORY_REGION_PORTIO_LIST,
364 .instance_size = sizeof(MemoryRegionPortioList),
365 .instance_finalize = memory_region_portio_list_finalize,
366};
367
368static void ioport_register_types(void)
369{
370 type_register_static(&memory_region_portio_list_info);
371}
372
373type_init(ioport_register_types)