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translate-all: Change cpu_restore_state() argument to CPUState
[thirdparty/qemu.git] / target-moxie / helper.c
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1/*
2 * Moxie helper routines.
3 *
4 * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <string.h>
22#include <assert.h>
23
24#include "config.h"
25#include "cpu.h"
26#include "mmu.h"
27#include "exec/exec-all.h"
b1669e5e 28#include "exec/softmmu_exec.h"
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29#include "qemu/host-utils.h"
30#include "helper.h"
31
32#define MMUSUFFIX _mmu
33
34#define SHIFT 0
35#include "exec/softmmu_template.h"
36
37#define SHIFT 1
38#include "exec/softmmu_template.h"
39
40#define SHIFT 2
41#include "exec/softmmu_template.h"
42
43#define SHIFT 3
44#include "exec/softmmu_template.h"
45
46/* Try to fill the TLB and return an exception if error. If retaddr is
47 NULL, it means that the function was called in C code (i.e. not
48 from generated code or from helper.c) */
d5a11fef 49void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
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50 uintptr_t retaddr)
51{
52 int ret;
53
d5a11fef 54 ret = moxie_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
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55 if (unlikely(ret)) {
56 if (retaddr) {
3f38f309 57 cpu_restore_state(cs, retaddr);
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58 }
59 }
5638d180 60 cpu_loop_exit(cs);
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61}
62
63void helper_raise_exception(CPUMoxieState *env, int ex)
64{
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65 CPUState *cs = CPU(moxie_env_get_cpu(env));
66
67 cs->exception_index = ex;
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68 /* Stash the exception type. */
69 env->sregs[2] = ex;
70 /* Stash the address where the exception occurred. */
3f38f309 71 cpu_restore_state(cs, GETPC());
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72 env->sregs[5] = env->pc;
73 /* Jump the the exception handline routine. */
74 env->pc = env->sregs[1];
5638d180 75 cpu_loop_exit(cs);
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76}
77
78uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
79{
80 if (unlikely(b == 0)) {
81 helper_raise_exception(env, MOXIE_EX_DIV0);
82 return 0;
83 }
84 if (unlikely(a == INT_MIN && b == -1)) {
85 return INT_MIN;
86 }
87
88 return (int32_t)a / (int32_t)b;
89}
90
91uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b)
92{
93 if (unlikely(b == 0)) {
94 helper_raise_exception(env, MOXIE_EX_DIV0);
95 return 0;
96 }
97 return a / b;
98}
99
100void helper_debug(CPUMoxieState *env)
101{
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102 CPUState *cs = CPU(moxie_env_get_cpu(env));
103
104 cs->exception_index = EXCP_DEBUG;
5638d180 105 cpu_loop_exit(cs);
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106}
107
108#if defined(CONFIG_USER_ONLY)
109
7510454e 110void moxie_cpu_do_interrupt(CPUState *cs)
525bd324 111{
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112 CPUState *cs = CPU(moxie_env_get_cpu(env));
113
114 cs->exception_index = -1;
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115}
116
7510454e 117int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
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118 int rw, int mmu_idx)
119{
7510454e 120 MoxieCPU *cpu = MOXIE_CPU(cs);
878096ee 121
27103424 122 cs->exception_index = 0xaa;
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123 cpu->env.debug1 = address;
124 cpu_dump_state(cs, stderr, fprintf, 0);
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125 return 1;
126}
127
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128#else /* !CONFIG_USER_ONLY */
129
7510454e 130int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
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131 int rw, int mmu_idx)
132{
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133 MoxieCPU *cpu = MOXIE_CPU(cs);
134 CPUMoxieState *env = &cpu->env;
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135 MoxieMMUResult res;
136 int prot, miss;
137 target_ulong phy;
138 int r = 1;
139
140 address &= TARGET_PAGE_MASK;
141 prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
142 miss = moxie_mmu_translate(&res, env, address, rw, mmu_idx);
143 if (miss) {
144 /* handle the miss. */
145 phy = 0;
27103424 146 cs->exception_index = MOXIE_EX_MMU_MISS;
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147 } else {
148 phy = res.phy;
149 r = 0;
150 }
151 tlb_set_page(env, address, phy, prot, mmu_idx, TARGET_PAGE_SIZE);
152 return r;
153}
154
155
53574064 156void moxie_cpu_do_interrupt(CPUState *cs)
525bd324 157{
27103424 158 switch (cs->exception_index) {
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159 case MOXIE_EX_BREAK:
160 break;
161 default:
162 break;
163 }
164}
165
00b941e5 166hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
525bd324 167{
00b941e5 168 MoxieCPU *cpu = MOXIE_CPU(cs);
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169 uint32_t phy = addr;
170 MoxieMMUResult res;
171 int miss;
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172
173 miss = moxie_mmu_translate(&res, &cpu->env, addr, 0, 0);
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174 if (!miss) {
175 phy = res.phy;
176 }
177 return phy;
178}
179#endif