[thirdparty/qemu.git] / target-s390x / misc_helper.c

/*
 *  S/390 misc helper routines
 *
 *  Copyright (c) 2009 Ulrich Hecht
 *  Copyright (c) 2009 Alexander Graf
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#include "cpu.h"
#include "exec/memory.h"
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
#include <string.h>
#include "sysemu/kvm.h"
#include "qemu/timer.h"
#include "exec/address-spaces.h"
#ifdef CONFIG_KVM
#include <linux/kvm.h>
#endif
#include "exec/cpu_ldst.h"
#include "hw/watchdog/wdt_diag288.h"

#if !defined(CONFIG_USER_ONLY)
#include "sysemu/cpus.h"
#include "sysemu/sysemu.h"
#include "hw/s390x/ebcdic.h"
#include "hw/s390x/ipl.h"
#endif

/* #define DEBUG_HELPER */
#ifdef DEBUG_HELPER
#define HELPER_LOG(x...) qemu_log(x)
#else
#define HELPER_LOG(x...)
#endif

/* Raise an exception dynamically from a helper function.  */
void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
                                     uintptr_t retaddr)
{
    CPUState *cs = CPU(s390_env_get_cpu(env));
    int t;

    cs->exception_index = EXCP_PGM;
    env->int_pgm_code = excp;

    /* Use the (ultimate) callers address to find the insn that trapped.  */
    cpu_restore_state(cs, retaddr);

    /* Advance past the insn.  */
    t = cpu_ldub_code(env, env->psw.addr);
    env->int_pgm_ilen = t = get_ilen(t);
    env->psw.addr += t;

    cpu_loop_exit(cs);
}

/* Raise an exception statically from a TB.  */
void HELPER(exception)(CPUS390XState *env, uint32_t excp)
{
    CPUState *cs = CPU(s390_env_get_cpu(env));

    HELPER_LOG("%s: exception %d\n", __func__, excp);
    cs->exception_index = excp;
    cpu_loop_exit(cs);
}

#ifndef CONFIG_USER_ONLY

void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
{
    S390CPU *cpu = s390_env_get_cpu(env);

    qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
                  env->psw.addr);

    if (kvm_enabled()) {
#ifdef CONFIG_KVM
        struct kvm_s390_irq irq = {
            .type = KVM_S390_PROGRAM_INT,
            .u.pgm.code = code,
        };

        kvm_s390_vcpu_interrupt(cpu, &irq);
#endif
    } else {
        CPUState *cs = CPU(cpu);

        env->int_pgm_code = code;
        env->int_pgm_ilen = ilen;
        cs->exception_index = EXCP_PGM;
        cpu_loop_exit(cs);
    }
}

/* SCLP service call */
uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
{
    int r = sclp_service_call(env, r1, r2);
    if (r < 0) {
        program_interrupt(env, -r, 4);
        return 0;
    }
    return r;
}

#ifndef CONFIG_USER_ONLY
static int modified_clear_reset(S390CPU *cpu)
{
    S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
    CPUState *t;

    pause_all_vcpus();
    cpu_synchronize_all_states();
    CPU_FOREACH(t) {
        run_on_cpu(t, s390_do_cpu_full_reset, t);
    }
    s390_cmma_reset();
    subsystem_reset();
    s390_crypto_reset();
    scc->load_normal(CPU(cpu));
    cpu_synchronize_all_post_reset();
    resume_all_vcpus();
    return 0;
}

static int load_normal_reset(S390CPU *cpu)
{
    S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
    CPUState *t;

    pause_all_vcpus();
    cpu_synchronize_all_states();
    CPU_FOREACH(t) {
        run_on_cpu(t, s390_do_cpu_reset, t);
    }
    s390_cmma_reset();
    subsystem_reset();
    scc->initial_cpu_reset(CPU(cpu));
    scc->load_normal(CPU(cpu));
    cpu_synchronize_all_post_reset();
    resume_all_vcpus();
    return 0;
}

int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3)
{
    uint64_t func = env->regs[r1];
    uint64_t timeout = env->regs[r1 + 1];
    uint64_t action = env->regs[r3];
    Object *obj;
    DIAG288State *diag288;
    DIAG288Class *diag288_class;

    if (r1 % 2 || action != 0) {
        return -1;
    }

    /* Timeout must be more than 15 seconds except for timer deletion */
    if (func != WDT_DIAG288_CANCEL && timeout < 15) {
        return -1;
    }

    obj = object_resolve_path_type("", TYPE_WDT_DIAG288, NULL);
    if (!obj) {
        return -1;
    }

    diag288 = DIAG288(obj);
    diag288_class = DIAG288_GET_CLASS(diag288);
    return diag288_class->handle_timer(diag288, func, timeout);
}

#define DIAG_308_RC_OK              0x0001
#define DIAG_308_RC_NO_CONF         0x0102
#define DIAG_308_RC_INVALID         0x0402

void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
{
    uint64_t addr =  env->regs[r1];
    uint64_t subcode = env->regs[r3];
    IplParameterBlock *iplb;

    if (env->psw.mask & PSW_MASK_PSTATE) {
        program_interrupt(env, PGM_PRIVILEGED, ILEN_LATER_INC);
        return;
    }

    if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
        program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
        return;
    }

    switch (subcode) {
    case 0:
        modified_clear_reset(s390_env_get_cpu(env));
        if (tcg_enabled()) {
            cpu_loop_exit(CPU(s390_env_get_cpu(env)));
        }
        break;
    case 1:
        load_normal_reset(s390_env_get_cpu(env));
        if (tcg_enabled()) {
            cpu_loop_exit(CPU(s390_env_get_cpu(env)));
        }
        break;
    case 3:
        s390_reipl_request();
        if (tcg_enabled()) {
            cpu_loop_exit(CPU(s390_env_get_cpu(env)));
        }
        break;
    case 5:
        if ((r1 & 1) || (addr & 0x0fffULL)) {
            program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
            return;
        }
        if (!address_space_access_valid(&address_space_memory, addr,
                                        sizeof(IplParameterBlock), false)) {
            program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
            return;
        }
        iplb = g_malloc0(sizeof(struct IplParameterBlock));
        cpu_physical_memory_read(addr, iplb, sizeof(struct IplParameterBlock));
        s390_ipl_update_diag308(iplb);
        env->regs[r1 + 1] = DIAG_308_RC_OK;
        g_free(iplb);
        return;
    case 6:
        if ((r1 & 1) || (addr & 0x0fffULL)) {
            program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
            return;
        }
        if (!address_space_access_valid(&address_space_memory, addr,
                                        sizeof(IplParameterBlock), true)) {
            program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
            return;
        }
        iplb = s390_ipl_get_iplb();
        if (iplb) {
            cpu_physical_memory_write(addr, iplb,
                                      sizeof(struct IplParameterBlock));
            env->regs[r1 + 1] = DIAG_308_RC_OK;
        } else {
            env->regs[r1 + 1] = DIAG_308_RC_NO_CONF;
        }
        return;
    default:
        hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
        break;
    }
}
#endif

void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num)
{
    uint64_t r;

    switch (num) {
    case 0x500:
        /* KVM hypercall */
        r = s390_virtio_hypercall(env);
        break;
    case 0x44:
        /* yield */
        r = 0;
        break;
    case 0x308:
        /* ipl */
        handle_diag_308(env, r1, r3);
        r = 0;
        break;
    default:
        r = -1;
        break;
    }

    if (r) {
        program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
    }
}

/* Set Prefix */
void HELPER(spx)(CPUS390XState *env, uint64_t a1)
{
    CPUState *cs = CPU(s390_env_get_cpu(env));
    uint32_t prefix = a1 & 0x7fffe000;

    env->psa = prefix;
    qemu_log("prefix: %#x\n", prefix);
    tlb_flush_page(cs, 0);
    tlb_flush_page(cs, TARGET_PAGE_SIZE);
}

/* Store Clock */
uint64_t HELPER(stck)(CPUS390XState *env)
{
    uint64_t time;

    time = env->tod_offset +
        time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);

    return time;
}

/* Set Clock Comparator */
void HELPER(sckc)(CPUS390XState *env, uint64_t time)
{
    if (time == -1ULL) {
        return;
    }

    env->ckc = time;

    /* difference between origins */
    time -= env->tod_offset;

    /* nanoseconds */
    time = tod2time(time);

    timer_mod(env->tod_timer, env->tod_basetime + time);
}

/* Store Clock Comparator */
uint64_t HELPER(stckc)(CPUS390XState *env)
{
    return env->ckc;
}

/* Set CPU Timer */
void HELPER(spt)(CPUS390XState *env, uint64_t time)
{
    if (time == -1ULL) {
        return;
    }

    /* nanoseconds */
    time = tod2time(time);

    env->cputm = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time;

    timer_mod(env->cpu_timer, env->cputm);
}

/* Store CPU Timer */
uint64_t HELPER(stpt)(CPUS390XState *env)
{
    return time2tod(env->cputm - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
}

/* Store System Information */
uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
                      uint64_t r0, uint64_t r1)
{
    int cc = 0;
    int sel1, sel2;

    if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
        ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
        /* valid function code, invalid reserved bits */
        program_interrupt(env, PGM_SPECIFICATION, 2);
    }

    sel1 = r0 & STSI_R0_SEL1_MASK;
    sel2 = r1 & STSI_R1_SEL2_MASK;

    /* XXX: spec exception if sysib is not 4k-aligned */

    switch (r0 & STSI_LEVEL_MASK) {
    case STSI_LEVEL_1:
        if ((sel1 == 1) && (sel2 == 1)) {
            /* Basic Machine Configuration */
            struct sysib_111 sysib;

            memset(&sysib, 0, sizeof(sysib));
            ebcdic_put(sysib.manuf, "QEMU            ", 16);
            /* same as machine type number in STORE CPU ID */
            ebcdic_put(sysib.type, "QEMU", 4);
            /* same as model number in STORE CPU ID */
            ebcdic_put(sysib.model, "QEMU            ", 16);
            ebcdic_put(sysib.sequence, "QEMU            ", 16);
            ebcdic_put(sysib.plant, "QEMU", 4);
            cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
        } else if ((sel1 == 2) && (sel2 == 1)) {
            /* Basic Machine CPU */
            struct sysib_121 sysib;

            memset(&sysib, 0, sizeof(sysib));
            /* XXX make different for different CPUs? */
            ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
            ebcdic_put(sysib.plant, "QEMU", 4);
            stw_p(&sysib.cpu_addr, env->cpu_num);
            cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
        } else if ((sel1 == 2) && (sel2 == 2)) {
            /* Basic Machine CPUs */
            struct sysib_122 sysib;

            memset(&sysib, 0, sizeof(sysib));
            stl_p(&sysib.capability, 0x443afc29);
            /* XXX change when SMP comes */
            stw_p(&sysib.total_cpus, 1);
            stw_p(&sysib.active_cpus, 1);
            stw_p(&sysib.standby_cpus, 0);
            stw_p(&sysib.reserved_cpus, 0);
            cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
        } else {
            cc = 3;
        }
        break;
    case STSI_LEVEL_2:
        {
            if ((sel1 == 2) && (sel2 == 1)) {
                /* LPAR CPU */
                struct sysib_221 sysib;

                memset(&sysib, 0, sizeof(sysib));
                /* XXX make different for different CPUs? */
                ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
                ebcdic_put(sysib.plant, "QEMU", 4);
                stw_p(&sysib.cpu_addr, env->cpu_num);
                stw_p(&sysib.cpu_id, 0);
                cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
            } else if ((sel1 == 2) && (sel2 == 2)) {
                /* LPAR CPUs */
                struct sysib_222 sysib;

                memset(&sysib, 0, sizeof(sysib));
                stw_p(&sysib.lpar_num, 0);
                sysib.lcpuc = 0;
                /* XXX change when SMP comes */
                stw_p(&sysib.total_cpus, 1);
                stw_p(&sysib.conf_cpus, 1);
                stw_p(&sysib.standby_cpus, 0);
                stw_p(&sysib.reserved_cpus, 0);
                ebcdic_put(sysib.name, "QEMU    ", 8);
                stl_p(&sysib.caf, 1000);
                stw_p(&sysib.dedicated_cpus, 0);
                stw_p(&sysib.shared_cpus, 0);
                cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
            } else {
                cc = 3;
            }
            break;
        }
    case STSI_LEVEL_3:
        {
            if ((sel1 == 2) && (sel2 == 2)) {
                /* VM CPUs */
                struct sysib_322 sysib;

                memset(&sysib, 0, sizeof(sysib));
                sysib.count = 1;
                /* XXX change when SMP comes */
                stw_p(&sysib.vm[0].total_cpus, 1);
                stw_p(&sysib.vm[0].conf_cpus, 1);
                stw_p(&sysib.vm[0].standby_cpus, 0);
                stw_p(&sysib.vm[0].reserved_cpus, 0);
                ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
                stl_p(&sysib.vm[0].caf, 1000);
                ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
                cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
            } else {
                cc = 3;
            }
            break;
        }
    case STSI_LEVEL_CURRENT:
        env->regs[0] = STSI_LEVEL_3;
        break;
    default:
        cc = 3;
        break;
    }

    return cc;
}

uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
                      uint64_t cpu_addr)
{
    int cc = SIGP_CC_ORDER_CODE_ACCEPTED;

    HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
               __func__, order_code, r1, cpu_addr);

    /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
       as parameter (input). Status (output) is always R1. */

    switch (order_code) {
    case SIGP_SET_ARCH:
        /* switch arch */
        break;
    case SIGP_SENSE:
        /* enumerate CPU status */
        if (cpu_addr) {
            /* XXX implement when SMP comes */
            return 3;
        }
        env->regs[r1] &= 0xffffffff00000000ULL;
        cc = 1;
        break;
#if !defined(CONFIG_USER_ONLY)
    case SIGP_RESTART:
        qemu_system_reset_request();
        cpu_loop_exit(CPU(s390_env_get_cpu(env)));
        break;
    case SIGP_STOP:
        qemu_system_shutdown_request();
        cpu_loop_exit(CPU(s390_env_get_cpu(env)));
        break;
#endif
    default:
        /* unknown sigp */
        fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
        cc = SIGP_CC_NOT_OPERATIONAL;
    }

    return cc;
}
#endif

#ifndef CONFIG_USER_ONLY
void HELPER(xsch)(CPUS390XState *env, uint64_t r1)
{
    S390CPU *cpu = s390_env_get_cpu(env);
    ioinst_handle_xsch(cpu, r1);
}

void HELPER(csch)(CPUS390XState *env, uint64_t r1)
{
    S390CPU *cpu = s390_env_get_cpu(env);
    ioinst_handle_csch(cpu, r1);
}

void HELPER(hsch)(CPUS390XState *env, uint64_t r1)
{
    S390CPU *cpu = s390_env_get_cpu(env);
    ioinst_handle_hsch(cpu, r1);
}

void HELPER(msch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
{
    S390CPU *cpu = s390_env_get_cpu(env);
    ioinst_handle_msch(cpu, r1, inst >> 16);
}

void HELPER(rchp)(CPUS390XState *env, uint64_t r1)
{
    S390CPU *cpu = s390_env_get_cpu(env);
    ioinst_handle_rchp(cpu, r1);
}

void HELPER(rsch)(CPUS390XState *env, uint64_t r1)
{
    S390CPU *cpu = s390_env_get_cpu(env);
    ioinst_handle_rsch(cpu, r1);
}

void HELPER(ssch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
{
    S390CPU *cpu = s390_env_get_cpu(env);
    ioinst_handle_ssch(cpu, r1, inst >> 16);
}

void HELPER(stsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
{
    S390CPU *cpu = s390_env_get_cpu(env);
    ioinst_handle_stsch(cpu, r1, inst >> 16);
}

void HELPER(tsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
{
    S390CPU *cpu = s390_env_get_cpu(env);
    ioinst_handle_tsch(cpu, r1, inst >> 16);
}

void HELPER(chsc)(CPUS390XState *env, uint64_t inst)
{
    S390CPU *cpu = s390_env_get_cpu(env);
    ioinst_handle_chsc(cpu, inst >> 16);
}
#endif

#ifndef CONFIG_USER_ONLY
void HELPER(per_check_exception)(CPUS390XState *env)
{
    CPUState *cs = CPU(s390_env_get_cpu(env));

    if (env->per_perc_atmid) {
        env->int_pgm_code = PGM_PER;
        env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, env->per_address));

        cs->exception_index = EXCP_PGM;
        cpu_loop_exit(cs);
    }
}

void HELPER(per_branch)(CPUS390XState *env, uint64_t from, uint64_t to)
{
    if ((env->cregs[9] & PER_CR9_EVENT_BRANCH)) {
        if (!(env->cregs[9] & PER_CR9_CONTROL_BRANCH_ADDRESS)
            || get_per_in_range(env, to)) {
            env->per_address = from;
            env->per_perc_atmid = PER_CODE_EVENT_BRANCH | get_per_atmid(env);
        }
    }
}

void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr)
{
    if ((env->cregs[9] & PER_CR9_EVENT_IFETCH) && get_per_in_range(env, addr)) {
        env->per_address = addr;
        env->per_perc_atmid = PER_CODE_EVENT_IFETCH | get_per_atmid(env);

        /* If the instruction has to be nullified, trigger the
           exception immediately. */
        if (env->cregs[9] & PER_CR9_EVENT_NULLIFICATION) {
            CPUState *cs = CPU(s390_env_get_cpu(env));

            env->int_pgm_code = PGM_PER;
            env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, addr));

            cs->exception_index = EXCP_PGM;
            cpu_loop_exit(cs);
        }
    }
}
#endif
Commit	Line	Data
10ec5117	1	/*
aea1e885	2	* S/390 misc helper routines
10ec5117	3	*
defb0e31	4	* Copyright (c) 2009 Ulrich Hecht
10ec5117 AG	5	* Copyright (c) 2009 Alexander Graf
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
70539e18	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
10ec5117 AG	19	*/
10ec5117 AG	20
3e457172	21	#include "cpu.h"
022c62cb	22	#include "exec/memory.h"
1de7afc9	23	#include "qemu/host-utils.h"
2ef6175a	24	#include "exec/helper-proto.h"
defb0e31	25	#include <string.h>
9c17d615	26	#include "sysemu/kvm.h"
1de7afc9	27	#include "qemu/timer.h"
df75a4e2	28	#include "exec/address-spaces.h"
af2be207 JK	29	#ifdef CONFIG_KVM
	30	#include <linux/kvm.h>
	31	#endif
f08b6170	32	#include "exec/cpu_ldst.h"
8fc639af	33	#include "hw/watchdog/wdt_diag288.h"
10ec5117	34
71e47088	35	#if !defined(CONFIG_USER_ONLY)
f0778475	36	#include "sysemu/cpus.h"
9c17d615	37	#include "sysemu/sysemu.h"
40fa5264	38	#include "hw/s390x/ebcdic.h"
df75a4e2	39	#include "hw/s390x/ipl.h"
10ec5117	40	#endif
d5a43964	41
defb0e31 AG	42	/* #define DEBUG_HELPER */
	43	#ifdef DEBUG_HELPER
	44	#define HELPER_LOG(x...) qemu_log(x)
	45	#else
	46	#define HELPER_LOG(x...)
	47	#endif
	48
b4e2bd35 RH	49	/* Raise an exception dynamically from a helper function. */
	50	void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
	51	uintptr_t retaddr)
	52	{
27103424	53	CPUState *cs = CPU(s390_env_get_cpu(env));
b4e2bd35 RH	54	int t;
b4e2bd35 RH	55
27103424	56	cs->exception_index = EXCP_PGM;
b4e2bd35 RH	57	env->int_pgm_code = excp;
	58
	59	/* Use the (ultimate) callers address to find the insn that trapped. */
3f38f309	60	cpu_restore_state(cs, retaddr);
b4e2bd35 RH	61
	62	/* Advance past the insn. */
	63	t = cpu_ldub_code(env, env->psw.addr);
	64	env->int_pgm_ilen = t = get_ilen(t);
9bebf986	65	env->psw.addr += t;
b4e2bd35	66
5638d180	67	cpu_loop_exit(cs);
b4e2bd35 RH	68	}
b4e2bd35 RH	69
d5a103cd	70	/* Raise an exception statically from a TB. */
089f5c06	71	void HELPER(exception)(CPUS390XState *env, uint32_t excp)
defb0e31	72	{
27103424 AF	73	CPUState *cs = CPU(s390_env_get_cpu(env));
27103424 AF	74
71e47088	75	HELPER_LOG("%s: exception %d\n", __func__, excp);
27103424	76	cs->exception_index = excp;
5638d180	77	cpu_loop_exit(cs);
defb0e31 AG	78	}
defb0e31 AG	79
defb0e31	80	#ifndef CONFIG_USER_ONLY
a158986d	81
d5a103cd	82	void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
defb0e31	83	{
27103424 AF	84	S390CPU *cpu = s390_env_get_cpu(env);
27103424 AF	85
0d404541 RH	86	qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
0d404541 RH	87	env->psw.addr);
defb0e31 AG	88
defb0e31 AG	89	if (kvm_enabled()) {
af2be207	90	#ifdef CONFIG_KVM
de13d216 CH	91	struct kvm_s390_irq irq = {
	92	.type = KVM_S390_PROGRAM_INT,
	93	.u.pgm.code = code,
	94	};
	95
	96	kvm_s390_vcpu_interrupt(cpu, &irq);
af2be207	97	#endif
defb0e31	98	} else {
27103424 AF	99	CPUState *cs = CPU(cpu);
27103424 AF	100
defb0e31	101	env->int_pgm_code = code;
d5a103cd	102	env->int_pgm_ilen = ilen;
27103424	103	cs->exception_index = EXCP_PGM;
5638d180	104	cpu_loop_exit(cs);
defb0e31 AG	105	}
	106	}
	107
defb0e31	108	/* SCLP service call */
dc458df9	109	uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
defb0e31	110	{
6e252802	111	int r = sclp_service_call(env, r1, r2);
9abf567d CB	112	if (r < 0) {
	113	program_interrupt(env, -r, 4);
	114	return 0;
	115	}
	116	return r;
defb0e31 AG	117	}
defb0e31 AG	118
268846ba	119	#ifndef CONFIG_USER_ONLY
d8b30c83 CB	120	static int modified_clear_reset(S390CPU *cpu)
	121	{
	122	S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
85ca3371	123	CPUState *t;
d8b30c83 CB	124
	125	pause_all_vcpus();
	126	cpu_synchronize_all_states();
85ca3371 DH	127	CPU_FOREACH(t) {
	128	run_on_cpu(t, s390_do_cpu_full_reset, t);
	129	}
1cd4e0f6	130	s390_cmma_reset();
d9f090ec	131	subsystem_reset();
4ab72920	132	s390_crypto_reset();
d8b30c83 CB	133	scc->load_normal(CPU(cpu));
	134	cpu_synchronize_all_post_reset();
	135	resume_all_vcpus();
	136	return 0;
	137	}
	138
f0778475 CB	139	static int load_normal_reset(S390CPU *cpu)
	140	{
	141	S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
85ca3371	142	CPUState *t;
f0778475 CB	143
	144	pause_all_vcpus();
	145	cpu_synchronize_all_states();
85ca3371 DH	146	CPU_FOREACH(t) {
	147	run_on_cpu(t, s390_do_cpu_reset, t);
	148	}
1cd4e0f6	149	s390_cmma_reset();
d9f090ec	150	subsystem_reset();
f0778475 CB	151	scc->initial_cpu_reset(CPU(cpu));
	152	scc->load_normal(CPU(cpu));
	153	cpu_synchronize_all_post_reset();
	154	resume_all_vcpus();
	155	return 0;
	156	}
	157
8fc639af XW	158	int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3)
	159	{
	160	uint64_t func = env->regs[r1];
	161	uint64_t timeout = env->regs[r1 + 1];
	162	uint64_t action = env->regs[r3];
	163	Object *obj;
	164	DIAG288State *diag288;
	165	DIAG288Class *diag288_class;
	166
	167	if (r1 % 2 \|\| action != 0) {
	168	return -1;
	169	}
	170
	171	/* Timeout must be more than 15 seconds except for timer deletion */
	172	if (func != WDT_DIAG288_CANCEL && timeout < 15) {
	173	return -1;
	174	}
	175
	176	obj = object_resolve_path_type("", TYPE_WDT_DIAG288, NULL);
	177	if (!obj) {
	178	return -1;
	179	}
	180
	181	diag288 = DIAG288(obj);
	182	diag288_class = DIAG288_GET_CLASS(diag288);
	183	return diag288_class->handle_timer(diag288, func, timeout);
	184	}
	185
df75a4e2	186	#define DIAG_308_RC_OK 0x0001
268846ba ED	187	#define DIAG_308_RC_NO_CONF 0x0102
268846ba ED	188	#define DIAG_308_RC_INVALID 0x0402
df75a4e2	189
268846ba ED	190	void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
	191	{
	192	uint64_t addr = env->regs[r1];
	193	uint64_t subcode = env->regs[r3];
df75a4e2	194	IplParameterBlock *iplb;
268846ba ED	195
	196	if (env->psw.mask & PSW_MASK_PSTATE) {
	197	program_interrupt(env, PGM_PRIVILEGED, ILEN_LATER_INC);
	198	return;
	199	}
	200
	201	if ((subcode & ~0x0ffffULL) \|\| (subcode > 6)) {
	202	program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
	203	return;
	204	}
	205
	206	switch (subcode) {
d8b30c83 CB	207	case 0:
d8b30c83 CB	208	modified_clear_reset(s390_env_get_cpu(env));
8df7eef3 AJ	209	if (tcg_enabled()) {
	210	cpu_loop_exit(CPU(s390_env_get_cpu(env)));
	211	}
d8b30c83	212	break;
f0778475 CB	213	case 1:
f0778475 CB	214	load_normal_reset(s390_env_get_cpu(env));
8df7eef3 AJ	215	if (tcg_enabled()) {
	216	cpu_loop_exit(CPU(s390_env_get_cpu(env)));
	217	}
f0778475	218	break;
2ecacb0b AJ	219	case 3:
	220	s390_reipl_request();
	221	if (tcg_enabled()) {
	222	cpu_loop_exit(CPU(s390_env_get_cpu(env)));
	223	}
	224	break;
268846ba ED	225	case 5:
	226	if ((r1 & 1) \|\| (addr & 0x0fffULL)) {
	227	program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
	228	return;
	229	}
df75a4e2 FZ	230	if (!address_space_access_valid(&address_space_memory, addr,
	231	sizeof(IplParameterBlock), false)) {
	232	program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
	233	return;
	234	}
	235	iplb = g_malloc0(sizeof(struct IplParameterBlock));
	236	cpu_physical_memory_read(addr, iplb, sizeof(struct IplParameterBlock));
feacc6c2 DH	237	s390_ipl_update_diag308(iplb);
feacc6c2 DH	238	env->regs[r1 + 1] = DIAG_308_RC_OK;
df75a4e2	239	g_free(iplb);
268846ba ED	240	return;
	241	case 6:
	242	if ((r1 & 1) \|\| (addr & 0x0fffULL)) {
	243	program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
	244	return;
	245	}
df75a4e2 FZ	246	if (!address_space_access_valid(&address_space_memory, addr,
	247	sizeof(IplParameterBlock), true)) {
	248	program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
	249	return;
	250	}
	251	iplb = s390_ipl_get_iplb();
	252	if (iplb) {
	253	cpu_physical_memory_write(addr, iplb,
	254	sizeof(struct IplParameterBlock));
	255	env->regs[r1 + 1] = DIAG_308_RC_OK;
	256	} else {
	257	env->regs[r1 + 1] = DIAG_308_RC_NO_CONF;
	258	}
268846ba ED	259	return;
	260	default:
	261	hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
	262	break;
	263	}
	264	}
	265	#endif
	266
8df7eef3	267	void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num)
defb0e31 AG	268	{
	269	uint64_t r;
	270
	271	switch (num) {
	272	case 0x500:
	273	/* KVM hypercall */
28e942f8	274	r = s390_virtio_hypercall(env);
defb0e31 AG	275	break;
	276	case 0x44:
	277	/* yield */
	278	r = 0;
	279	break;
	280	case 0x308:
	281	/* ipl */
8df7eef3	282	handle_diag_308(env, r1, r3);
defb0e31 AG	283	r = 0;
	284	break;
	285	default:
	286	r = -1;
	287	break;
	288	}
	289
	290	if (r) {
d5a103cd	291	program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
defb0e31	292	}
defb0e31 AG	293	}
defb0e31 AG	294
defb0e31	295	/* Set Prefix */
089f5c06	296	void HELPER(spx)(CPUS390XState *env, uint64_t a1)
defb0e31	297	{
31b030d4	298	CPUState *cs = CPU(s390_env_get_cpu(env));
e805a0d3	299	uint32_t prefix = a1 & 0x7fffe000;
31b030d4	300
e805a0d3	301	env->psa = prefix;
defb0e31	302	qemu_log("prefix: %#x\n", prefix);
31b030d4 AF	303	tlb_flush_page(cs, 0);
31b030d4 AF	304	tlb_flush_page(cs, TARGET_PAGE_SIZE);
defb0e31 AG	305	}
defb0e31 AG	306
d9d55f11 AJ	307	/* Store Clock */
d9d55f11 AJ	308	uint64_t HELPER(stck)(CPUS390XState *env)
defb0e31 AG	309	{
	310	uint64_t time;
	311
	312	time = env->tod_offset +
bc72ad67	313	time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);
defb0e31 AG	314
	315	return time;
	316	}
	317
defb0e31	318	/* Set Clock Comparator */
dd3eb7b5	319	void HELPER(sckc)(CPUS390XState *env, uint64_t time)
defb0e31	320	{
defb0e31 AG	321	if (time == -1ULL) {
	322	return;
	323	}
	324
aa9e14e6 AJ	325	env->ckc = time;
aa9e14e6 AJ	326
c941f074 AJ	327	/* difference between origins */
	328	time -= env->tod_offset;
	329
defb0e31	330	/* nanoseconds */
9cb32c44	331	time = tod2time(time);
defb0e31	332
c941f074	333	timer_mod(env->tod_timer, env->tod_basetime + time);
defb0e31 AG	334	}
	335
	336	/* Store Clock Comparator */
dd3eb7b5	337	uint64_t HELPER(stckc)(CPUS390XState *env)
defb0e31	338	{
aa9e14e6	339	return env->ckc;
defb0e31 AG	340	}
	341
	342	/* Set CPU Timer */
c4f0a863	343	void HELPER(spt)(CPUS390XState *env, uint64_t time)
defb0e31	344	{
defb0e31 AG	345	if (time == -1ULL) {
	346	return;
	347	}
	348
	349	/* nanoseconds */
9cb32c44	350	time = tod2time(time);
defb0e31	351
b8ae94bd AJ	352	env->cputm = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time;
	353
	354	timer_mod(env->cpu_timer, env->cputm);
defb0e31 AG	355	}
	356
	357	/* Store CPU Timer */
c4f0a863	358	uint64_t HELPER(stpt)(CPUS390XState *env)
defb0e31	359	{
b8ae94bd	360	return time2tod(env->cputm - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
defb0e31 AG	361	}
	362
	363	/* Store System Information */
d14b3e09 RH	364	uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
d14b3e09 RH	365	uint64_t r0, uint64_t r1)
defb0e31 AG	366	{
	367	int cc = 0;
	368	int sel1, sel2;
	369
	370	if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
	371	((r0 & STSI_R0_RESERVED_MASK) \|\| (r1 & STSI_R1_RESERVED_MASK))) {
	372	/* valid function code, invalid reserved bits */
	373	program_interrupt(env, PGM_SPECIFICATION, 2);
	374	}
	375
	376	sel1 = r0 & STSI_R0_SEL1_MASK;
	377	sel2 = r1 & STSI_R1_SEL2_MASK;
	378
	379	/* XXX: spec exception if sysib is not 4k-aligned */
	380
	381	switch (r0 & STSI_LEVEL_MASK) {
	382	case STSI_LEVEL_1:
	383	if ((sel1 == 1) && (sel2 == 1)) {
	384	/* Basic Machine Configuration */
	385	struct sysib_111 sysib;
	386
	387	memset(&sysib, 0, sizeof(sysib));
	388	ebcdic_put(sysib.manuf, "QEMU ", 16);
	389	/* same as machine type number in STORE CPU ID */
	390	ebcdic_put(sysib.type, "QEMU", 4);
	391	/* same as model number in STORE CPU ID */
	392	ebcdic_put(sysib.model, "QEMU ", 16);
	393	ebcdic_put(sysib.sequence, "QEMU ", 16);
	394	ebcdic_put(sysib.plant, "QEMU", 4);
eb6282f2	395	cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
defb0e31 AG	396	} else if ((sel1 == 2) && (sel2 == 1)) {
	397	/* Basic Machine CPU */
	398	struct sysib_121 sysib;
	399
	400	memset(&sysib, 0, sizeof(sysib));
	401	/* XXX make different for different CPUs? */
	402	ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
	403	ebcdic_put(sysib.plant, "QEMU", 4);
	404	stw_p(&sysib.cpu_addr, env->cpu_num);
eb6282f2	405	cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
defb0e31 AG	406	} else if ((sel1 == 2) && (sel2 == 2)) {
	407	/* Basic Machine CPUs */
	408	struct sysib_122 sysib;
	409
	410	memset(&sysib, 0, sizeof(sysib));
	411	stl_p(&sysib.capability, 0x443afc29);
	412	/* XXX change when SMP comes */
	413	stw_p(&sysib.total_cpus, 1);
	414	stw_p(&sysib.active_cpus, 1);
	415	stw_p(&sysib.standby_cpus, 0);
	416	stw_p(&sysib.reserved_cpus, 0);
eb6282f2	417	cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
defb0e31 AG	418	} else {
	419	cc = 3;
	420	}
	421	break;
	422	case STSI_LEVEL_2:
71e47088 BS	423	{
	424	if ((sel1 == 2) && (sel2 == 1)) {
	425	/* LPAR CPU */
	426	struct sysib_221 sysib;
	427
	428	memset(&sysib, 0, sizeof(sysib));
	429	/* XXX make different for different CPUs? */
	430	ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
	431	ebcdic_put(sysib.plant, "QEMU", 4);
	432	stw_p(&sysib.cpu_addr, env->cpu_num);
	433	stw_p(&sysib.cpu_id, 0);
eb6282f2	434	cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
71e47088 BS	435	} else if ((sel1 == 2) && (sel2 == 2)) {
	436	/* LPAR CPUs */
	437	struct sysib_222 sysib;
	438
	439	memset(&sysib, 0, sizeof(sysib));
	440	stw_p(&sysib.lpar_num, 0);
	441	sysib.lcpuc = 0;
	442	/* XXX change when SMP comes */
	443	stw_p(&sysib.total_cpus, 1);
	444	stw_p(&sysib.conf_cpus, 1);
	445	stw_p(&sysib.standby_cpus, 0);
	446	stw_p(&sysib.reserved_cpus, 0);
	447	ebcdic_put(sysib.name, "QEMU ", 8);
	448	stl_p(&sysib.caf, 1000);
	449	stw_p(&sysib.dedicated_cpus, 0);
	450	stw_p(&sysib.shared_cpus, 0);
eb6282f2	451	cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
71e47088 BS	452	} else {
	453	cc = 3;
	454	}
	455	break;
defb0e31	456	}
defb0e31	457	case STSI_LEVEL_3:
71e47088 BS	458	{
	459	if ((sel1 == 2) && (sel2 == 2)) {
	460	/* VM CPUs */
	461	struct sysib_322 sysib;
	462
	463	memset(&sysib, 0, sizeof(sysib));
	464	sysib.count = 1;
	465	/* XXX change when SMP comes */
	466	stw_p(&sysib.vm[0].total_cpus, 1);
	467	stw_p(&sysib.vm[0].conf_cpus, 1);
	468	stw_p(&sysib.vm[0].standby_cpus, 0);
	469	stw_p(&sysib.vm[0].reserved_cpus, 0);
	470	ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
	471	stl_p(&sysib.vm[0].caf, 1000);
	472	ebcdic_put(sysib.vm[0].cpi, "KVM/Linux ", 16);
eb6282f2	473	cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
71e47088 BS	474	} else {
	475	cc = 3;
	476	}
	477	break;
defb0e31	478	}
defb0e31 AG	479	case STSI_LEVEL_CURRENT:
	480	env->regs[0] = STSI_LEVEL_3;
	481	break;
	482	default:
	483	cc = 3;
	484	break;
	485	}
	486
	487	return cc;
	488	}
	489
089f5c06 BS	490	uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
089f5c06 BS	491	uint64_t cpu_addr)
defb0e31	492	{
5172b780	493	int cc = SIGP_CC_ORDER_CODE_ACCEPTED;
defb0e31 AG	494
defb0e31 AG	495	HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
71e47088	496	__func__, order_code, r1, cpu_addr);
defb0e31	497
71e47088	498	/* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
defb0e31 AG	499	as parameter (input). Status (output) is always R1. */
	500
	501	switch (order_code) {
	502	case SIGP_SET_ARCH:
	503	/* switch arch */
	504	break;
	505	case SIGP_SENSE:
	506	/* enumerate CPU status */
	507	if (cpu_addr) {
	508	/* XXX implement when SMP comes */
	509	return 3;
	510	}
	511	env->regs[r1] &= 0xffffffff00000000ULL;
	512	cc = 1;
	513	break;
71e47088	514	#if !defined(CONFIG_USER_ONLY)
1864b94a AG	515	case SIGP_RESTART:
1864b94a AG	516	qemu_system_reset_request();
5638d180	517	cpu_loop_exit(CPU(s390_env_get_cpu(env)));
1864b94a AG	518	break;
	519	case SIGP_STOP:
	520	qemu_system_shutdown_request();
5638d180	521	cpu_loop_exit(CPU(s390_env_get_cpu(env)));
1864b94a AG	522	break;
1864b94a AG	523	#endif
defb0e31 AG	524	default:
	525	/* unknown sigp */
	526	fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
5172b780	527	cc = SIGP_CC_NOT_OPERATIONAL;
defb0e31 AG	528	}
	529
	530	return cc;
	531	}
defb0e31	532	#endif
ad8a4570 AG	533
	534	#ifndef CONFIG_USER_ONLY
	535	void HELPER(xsch)(CPUS390XState *env, uint64_t r1)
	536	{
	537	S390CPU *cpu = s390_env_get_cpu(env);
	538	ioinst_handle_xsch(cpu, r1);
	539	}
	540
	541	void HELPER(csch)(CPUS390XState *env, uint64_t r1)
	542	{
	543	S390CPU *cpu = s390_env_get_cpu(env);
	544	ioinst_handle_csch(cpu, r1);
	545	}
	546
	547	void HELPER(hsch)(CPUS390XState *env, uint64_t r1)
	548	{
	549	S390CPU *cpu = s390_env_get_cpu(env);
	550	ioinst_handle_hsch(cpu, r1);
	551	}
	552
	553	void HELPER(msch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
	554	{
	555	S390CPU *cpu = s390_env_get_cpu(env);
	556	ioinst_handle_msch(cpu, r1, inst >> 16);
	557	}
	558
	559	void HELPER(rchp)(CPUS390XState *env, uint64_t r1)
	560	{
	561	S390CPU *cpu = s390_env_get_cpu(env);
	562	ioinst_handle_rchp(cpu, r1);
	563	}
	564
	565	void HELPER(rsch)(CPUS390XState *env, uint64_t r1)
	566	{
	567	S390CPU *cpu = s390_env_get_cpu(env);
	568	ioinst_handle_rsch(cpu, r1);
	569	}
	570
	571	void HELPER(ssch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
	572	{
	573	S390CPU *cpu = s390_env_get_cpu(env);
	574	ioinst_handle_ssch(cpu, r1, inst >> 16);
	575	}
	576
	577	void HELPER(stsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
	578	{
	579	S390CPU *cpu = s390_env_get_cpu(env);
	580	ioinst_handle_stsch(cpu, r1, inst >> 16);
	581	}
	582
	583	void HELPER(tsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
	584	{
	585	S390CPU *cpu = s390_env_get_cpu(env);
	586	ioinst_handle_tsch(cpu, r1, inst >> 16);
	587	}
	588
	589	void HELPER(chsc)(CPUS390XState *env, uint64_t inst)
	590	{
	591	S390CPU *cpu = s390_env_get_cpu(env);
	592	ioinst_handle_chsc(cpu, inst >> 16);
	593	}
	594	#endif
777c98c3 AJ	595
	596	#ifndef CONFIG_USER_ONLY
	597	void HELPER(per_check_exception)(CPUS390XState *env)
	598	{
	599	CPUState *cs = CPU(s390_env_get_cpu(env));
	600
	601	if (env->per_perc_atmid) {
	602	env->int_pgm_code = PGM_PER;
	603	env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, env->per_address));
	604
	605	cs->exception_index = EXCP_PGM;
	606	cpu_loop_exit(cs);
	607	}
	608	}
2c2275eb AJ	609
	610	void HELPER(per_branch)(CPUS390XState *env, uint64_t from, uint64_t to)
	611	{
	612	if ((env->cregs[9] & PER_CR9_EVENT_BRANCH)) {
	613	if (!(env->cregs[9] & PER_CR9_CONTROL_BRANCH_ADDRESS)
	614	\|\| get_per_in_range(env, to)) {
	615	env->per_address = from;
	616	env->per_perc_atmid = PER_CODE_EVENT_BRANCH \| get_per_atmid(env);
	617	}
	618	}
	619	}
f0e0d817 AJ	620
	621	void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr)
	622	{
	623	if ((env->cregs[9] & PER_CR9_EVENT_IFETCH) && get_per_in_range(env, addr)) {
	624	env->per_address = addr;
	625	env->per_perc_atmid = PER_CODE_EVENT_IFETCH \| get_per_atmid(env);
83bb1612 AJ	626
	627	/* If the instruction has to be nullified, trigger the
	628	exception immediately. */
	629	if (env->cregs[9] & PER_CR9_EVENT_NULLIFICATION) {
	630	CPUState *cs = CPU(s390_env_get_cpu(env));
	631
	632	env->int_pgm_code = PGM_PER;
	633	env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, addr));
	634
	635	cs->exception_index = EXCP_PGM;
	636	cpu_loop_exit(cs);
	637	}
f0e0d817 AJ	638	}
f0e0d817 AJ	639	}
777c98c3	640	#endif