]> git.ipfire.org Git - people/ms/u-boot.git/blame - tools/imximage.c
aspeed: Board init functions and common configs for ast2500 based boards
[people/ms/u-boot.git] / tools / imximage.c
CommitLineData
8edcde5e
SB
1/*
2 * (C) Copyright 2009
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
5 * (C) Copyright 2008
6 * Marvell Semiconductor <www.marvell.com>
7 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8 *
3765b3e7 9 * SPDX-License-Identifier: GPL-2.0+
8edcde5e
SB
10 */
11
f86ed6a8 12#include "imagetool.h"
8edcde5e
SB
13#include <image.h>
14#include "imximage.h"
15
0187c985
SB
16#define UNDEFINED 0xFFFFFFFF
17
8edcde5e
SB
18/*
19 * Supported commands for configuration file
20 */
21static table_entry_t imximage_cmds[] = {
8a1edd7d 22 {CMD_BOOT_FROM, "BOOT_FROM", "boot command", },
6cb83829 23 {CMD_BOOT_OFFSET, "BOOT_OFFSET", "Boot offset", },
0b7f7c33
AA
24 {CMD_WRITE_DATA, "DATA", "Reg Write Data", },
25 {CMD_WRITE_CLR_BIT, "CLR_BIT", "Reg clear bit", },
26 {CMD_CHECK_BITS_SET, "CHECK_BITS_SET", "Reg Check bits set", },
27 {CMD_CHECK_BITS_CLR, "CHECK_BITS_CLR", "Reg Check bits clr", },
0187c985 28 {CMD_CSF, "CSF", "Command Sequence File", },
8a1edd7d 29 {CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", },
b55e4f48 30 {CMD_PLUGIN, "PLUGIN", "file plugin_addr", },
8a1edd7d 31 {-1, "", "", },
8edcde5e
SB
32};
33
34/*
35 * Supported Boot options for configuration file
36 * this is needed to set the correct flash offset
37 */
377e367a 38static table_entry_t imximage_boot_offset[] = {
8edcde5e 39 {FLASH_OFFSET_ONENAND, "onenand", "OneNAND Flash",},
bd25864c 40 {FLASH_OFFSET_NAND, "nand", "NAND Flash", },
19b409c0
DB
41 {FLASH_OFFSET_NOR, "nor", "NOR Flash", },
42 {FLASH_OFFSET_SATA, "sata", "SATA Disk", },
bd25864c
DB
43 {FLASH_OFFSET_SD, "sd", "SD Card", },
44 {FLASH_OFFSET_SPI, "spi", "SPI Flash", },
9598f8c3 45 {FLASH_OFFSET_QSPI, "qspi", "QSPI NOR Flash",},
8edcde5e
SB
46 {-1, "", "Invalid", },
47};
48
377e367a
SB
49/*
50 * Supported Boot options for configuration file
51 * this is needed to determine the initial load size
52 */
53static table_entry_t imximage_boot_loadsize[] = {
54 {FLASH_LOADSIZE_ONENAND, "onenand", "OneNAND Flash",},
55 {FLASH_LOADSIZE_NAND, "nand", "NAND Flash", },
56 {FLASH_LOADSIZE_NOR, "nor", "NOR Flash", },
57 {FLASH_LOADSIZE_SATA, "sata", "SATA Disk", },
58 {FLASH_LOADSIZE_SD, "sd", "SD Card", },
59 {FLASH_LOADSIZE_SPI, "spi", "SPI Flash", },
9598f8c3 60 {FLASH_LOADSIZE_QSPI, "qspi", "QSPI NOR Flash",},
377e367a
SB
61 {-1, "", "Invalid", },
62};
63
8a1edd7d
LHR
64/*
65 * IMXIMAGE version definition for i.MX chips
66 */
67static table_entry_t imximage_versions[] = {
68 {IMXIMAGE_V1, "", " (i.MX25/35/51 compatible)", },
0b7f7c33 69 {IMXIMAGE_V2, "", " (i.MX53/6/7 compatible)", },
8a1edd7d
LHR
70 {-1, "", " (Invalid)", },
71};
8edcde5e
SB
72
73static struct imx_header imximage_header;
8a1edd7d 74static uint32_t imximage_version;
0187c985
SB
75/*
76 * Image Vector Table Offset
77 * Initialized to a wrong not 4-bytes aligned address to
78 * check if it is was set by the cfg file.
79 */
80static uint32_t imximage_ivt_offset = UNDEFINED;
81static uint32_t imximage_csf_size = UNDEFINED;
377e367a
SB
82/* Initial Load Region Size */
83static uint32_t imximage_init_loadsize;
b55e4f48
PF
84static uint32_t imximage_iram_free_start;
85static uint32_t imximage_plugin_size;
86static uint32_t plugin_image;
8a1edd7d
LHR
87
88static set_dcd_val_t set_dcd_val;
0b7f7c33 89static set_dcd_param_t set_dcd_param;
8a1edd7d
LHR
90static set_dcd_rst_t set_dcd_rst;
91static set_imx_hdr_t set_imx_hdr;
4d5fa985 92static uint32_t max_dcd_entries;
24331982 93static uint32_t *header_size_ptr;
0187c985 94static uint32_t *csf_ptr;
8edcde5e
SB
95
96static uint32_t get_cfg_value(char *token, char *name, int linenr)
97{
98 char *endptr;
99 uint32_t value;
100
101 errno = 0;
102 value = strtoul(token, &endptr, 16);
103 if (errno || (token == endptr)) {
104 fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n",
105 name, linenr, token);
106 exit(EXIT_FAILURE);
107 }
108 return value;
109}
110
8a1edd7d 111static uint32_t detect_imximage_version(struct imx_header *imx_hdr)
8edcde5e 112{
8a1edd7d
LHR
113 imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
114 imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
115 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
116 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
117
118 /* Try to detect V1 */
119 if ((fhdr_v1->app_code_barker == APP_CODE_BARKER) &&
120 (hdr_v1->dcd_table.preamble.barker == DCD_BARKER))
121 return IMXIMAGE_V1;
122
123 /* Try to detect V2 */
124 if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
b55e4f48
PF
125 (hdr_v2->data.dcd_table.header.tag == DCD_HEADER_TAG))
126 return IMXIMAGE_V2;
127
128 if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
129 hdr_v2->boot_data.plugin)
8a1edd7d
LHR
130 return IMXIMAGE_V2;
131
132 return IMXIMAGE_VER_INVALID;
8edcde5e
SB
133}
134
8a1edd7d 135static void err_imximage_version(int version)
8edcde5e 136{
8a1edd7d
LHR
137 fprintf(stderr,
138 "Error: Unsupported imximage version:%d\n", version);
8edcde5e 139
8a1edd7d
LHR
140 exit(EXIT_FAILURE);
141}
8edcde5e 142
8a1edd7d
LHR
143static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno,
144 int fld, uint32_t value, uint32_t off)
145{
146 dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
147
148 switch (fld) {
149 case CFG_REG_SIZE:
150 /* Byte, halfword, word */
151 if ((value != 1) && (value != 2) && (value != 4)) {
152 fprintf(stderr, "Error: %s[%d] - "
153 "Invalid register size " "(%d)\n",
154 name, lineno, value);
155 exit(EXIT_FAILURE);
156 }
157 dcd_v1->addr_data[off].type = value;
158 break;
159 case CFG_REG_ADDRESS:
160 dcd_v1->addr_data[off].addr = value;
161 break;
162 case CFG_REG_VALUE:
163 dcd_v1->addr_data[off].value = value;
164 break;
165 default:
166 break;
8edcde5e 167
8a1edd7d
LHR
168 }
169}
8edcde5e 170
61903b75
TK
171static struct dcd_v2_cmd *gd_last_cmd;
172
0b7f7c33
AA
173static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
174 int32_t cmd)
175{
b55e4f48 176 dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
61903b75
TK
177 struct dcd_v2_cmd *d = gd_last_cmd;
178 struct dcd_v2_cmd *d2;
179 int len;
180
181 if (!d)
182 d = &dcd_v2->dcd_cmd;
183 d2 = d;
184 len = be16_to_cpu(d->write_dcd_command.length);
185 if (len > 4)
186 d2 = (struct dcd_v2_cmd *)(((char *)d) + len);
0b7f7c33
AA
187
188 switch (cmd) {
189 case CMD_WRITE_DATA:
61903b75
TK
190 if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
191 (d->write_dcd_command.param == DCD_WRITE_DATA_PARAM))
192 break;
193 d = d2;
194 d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
195 d->write_dcd_command.length = cpu_to_be16(4);
196 d->write_dcd_command.param = DCD_WRITE_DATA_PARAM;
0b7f7c33
AA
197 break;
198 case CMD_WRITE_CLR_BIT:
61903b75
TK
199 if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
200 (d->write_dcd_command.param == DCD_WRITE_CLR_BIT_PARAM))
201 break;
202 d = d2;
203 d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
204 d->write_dcd_command.length = cpu_to_be16(4);
205 d->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM;
0b7f7c33
AA
206 break;
207 /*
208 * Check data command only supports one entry,
0b7f7c33
AA
209 */
210 case CMD_CHECK_BITS_SET:
61903b75
TK
211 d = d2;
212 d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
213 d->write_dcd_command.length = cpu_to_be16(4);
214 d->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM;
0b7f7c33
AA
215 break;
216 case CMD_CHECK_BITS_CLR:
61903b75
TK
217 d = d2;
218 d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
219 d->write_dcd_command.length = cpu_to_be16(4);
0782a880 220 d->write_dcd_command.param = DCD_CHECK_BITS_CLR_PARAM;
0b7f7c33
AA
221 break;
222 default:
223 break;
224 }
61903b75 225 gd_last_cmd = d;
0b7f7c33
AA
226}
227
8a1edd7d
LHR
228static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno,
229 int fld, uint32_t value, uint32_t off)
230{
61903b75
TK
231 struct dcd_v2_cmd *d = gd_last_cmd;
232 int len;
233
234 len = be16_to_cpu(d->write_dcd_command.length);
235 off = (len - 4) >> 3;
8a1edd7d
LHR
236
237 switch (fld) {
238 case CFG_REG_ADDRESS:
61903b75 239 d->addr_data[off].addr = cpu_to_be32(value);
8a1edd7d
LHR
240 break;
241 case CFG_REG_VALUE:
61903b75
TK
242 d->addr_data[off].value = cpu_to_be32(value);
243 off++;
244 d->write_dcd_command.length = cpu_to_be16((off << 3) + 4);
8a1edd7d
LHR
245 break;
246 default:
247 break;
248
249 }
8edcde5e
SB
250}
251
8a1edd7d
LHR
252/*
253 * Complete setting up the rest field of DCD of V1
254 * such as barker code and DCD data length.
255 */
256static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len,
257 char *name, int lineno)
8edcde5e 258{
8a1edd7d
LHR
259 dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
260
8a1edd7d
LHR
261 dcd_v1->preamble.barker = DCD_BARKER;
262 dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t);
263}
264
265/*
266 * Complete setting up the reset field of DCD of V2
267 * such as DCD tag, version, length, etc.
268 */
269static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
270 char *name, int lineno)
271{
b55e4f48
PF
272 if (!imxhdr->header.hdr_v2.boot_data.plugin) {
273 dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
274 struct dcd_v2_cmd *d = gd_last_cmd;
275 int len;
276
277 if (!d)
278 d = &dcd_v2->dcd_cmd;
279 len = be16_to_cpu(d->write_dcd_command.length);
280 if (len > 4)
281 d = (struct dcd_v2_cmd *)(((char *)d) + len);
282
283 len = (char *)d - (char *)&dcd_v2->header;
b55e4f48
PF
284 dcd_v2->header.tag = DCD_HEADER_TAG;
285 dcd_v2->header.length = cpu_to_be16(len);
286 dcd_v2->header.version = DCD_VERSION;
287 }
8a1edd7d
LHR
288}
289
290static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
ad0826dc 291 uint32_t entry_point, uint32_t flash_offset)
8a1edd7d
LHR
292{
293 imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1;
294 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
295 dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
ab857f26 296 uint32_t hdr_base;
24331982
TK
297 uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr)
298 - ((char *)imxhdr));
8a1edd7d 299
8a1edd7d
LHR
300 /* Set magic number */
301 fhdr_v1->app_code_barker = APP_CODE_BARKER;
302
377e367a
SB
303 /* TODO: check i.MX image V1 handling, for now use 'old' style */
304 hdr_base = entry_point - 4096;
ab857f26 305 fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
ad0826dc 306 fhdr_v1->app_code_jump_vector = entry_point;
8a1edd7d 307
ab857f26
TK
308 fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr);
309 fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
8a1edd7d 310
8a1edd7d
LHR
311 /* Security feature are not supported */
312 fhdr_v1->app_code_csf = 0;
313 fhdr_v1->super_root_key = 0;
24331982 314 header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
8a1edd7d
LHR
315}
316
317static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
ad0826dc 318 uint32_t entry_point, uint32_t flash_offset)
8a1edd7d
LHR
319{
320 imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
321 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
ab857f26 322 uint32_t hdr_base;
8a1edd7d 323
8a1edd7d
LHR
324 /* Set magic number */
325 fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
326 fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
327 fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
328
b55e4f48
PF
329 if (!hdr_v2->boot_data.plugin) {
330 fhdr_v2->entry = entry_point;
331 fhdr_v2->reserved1 = 0;
332 fhdr_v2->reserved1 = 0;
333 hdr_base = entry_point - imximage_init_loadsize +
334 flash_offset;
335 fhdr_v2->self = hdr_base;
336 if (dcd_len > 0)
337 fhdr_v2->dcd_ptr = hdr_base +
338 offsetof(imx_header_v2_t, data);
339 else
340 fhdr_v2->dcd_ptr = 0;
341 fhdr_v2->boot_data_ptr = hdr_base
342 + offsetof(imx_header_v2_t, boot_data);
343 hdr_v2->boot_data.start = entry_point - imximage_init_loadsize;
344
345 fhdr_v2->csf = 0;
346
347 header_size_ptr = &hdr_v2->boot_data.size;
348 csf_ptr = &fhdr_v2->csf;
349 } else {
350 imx_header_v2_t *next_hdr_v2;
351 flash_header_v2_t *next_fhdr_v2;
352
353 if (imximage_csf_size != 0) {
354 fprintf(stderr, "Error: Header v2: SECURE_BOOT is only supported in DCD mode!");
355 exit(EXIT_FAILURE);
356 }
357
358 fhdr_v2->entry = imximage_iram_free_start +
359 flash_offset + sizeof(flash_header_v2_t) +
360 sizeof(boot_data_t);
361
362 fhdr_v2->reserved1 = 0;
363 fhdr_v2->reserved2 = 0;
364 fhdr_v2->self = imximage_iram_free_start + flash_offset;
365
b893c989 366 fhdr_v2->dcd_ptr = 0;
8a1edd7d 367
b55e4f48
PF
368 fhdr_v2->boot_data_ptr = fhdr_v2->self +
369 offsetof(imx_header_v2_t, boot_data);
370
371 hdr_v2->boot_data.start = imximage_iram_free_start;
372 /*
373 * The actural size of plugin image is "imximage_plugin_size +
374 * sizeof(flash_header_v2_t) + sizeof(boot_data_t)", plus the
375 * flash_offset space.The ROM code only need to copy this size
376 * to run the plugin code. However, later when copy the whole
377 * U-Boot image to DDR, the ROM code use memcpy to copy the
378 * first part of the image, and use the storage read function
379 * to get the remaining part. This requires the dividing point
380 * must be multiple of storage sector size. Here we set the
381 * first section to be MAX_PLUGIN_CODE_SIZE(64KB) for this
382 * purpose.
383 */
384 hdr_v2->boot_data.size = MAX_PLUGIN_CODE_SIZE;
385
386 /* Security feature are not supported */
387 fhdr_v2->csf = 0;
388
389 next_hdr_v2 = (imx_header_v2_t *)((char *)hdr_v2 +
390 imximage_plugin_size);
391
392 next_fhdr_v2 = &next_hdr_v2->fhdr;
393
394 next_fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
395 next_fhdr_v2->header.length =
396 cpu_to_be16(sizeof(flash_header_v2_t));
397 next_fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
398
399 next_fhdr_v2->entry = entry_point;
400 hdr_base = entry_point - sizeof(struct imx_header);
401 next_fhdr_v2->reserved1 = 0;
402 next_fhdr_v2->reserved2 = 0;
403 next_fhdr_v2->self = hdr_base + imximage_plugin_size;
404
405 next_fhdr_v2->dcd_ptr = 0;
406 next_fhdr_v2->boot_data_ptr = next_fhdr_v2->self +
407 offsetof(imx_header_v2_t, boot_data);
408
409 next_hdr_v2->boot_data.start = hdr_base - flash_offset;
410
411 header_size_ptr = &next_hdr_v2->boot_data.size;
0187c985 412
b55e4f48
PF
413 next_hdr_v2->boot_data.plugin = 0;
414
415 next_fhdr_v2->csf = 0;
416 }
8a1edd7d
LHR
417}
418
72048bc3 419static void set_hdr_func(void)
8a1edd7d
LHR
420{
421 switch (imximage_version) {
422 case IMXIMAGE_V1:
423 set_dcd_val = set_dcd_val_v1;
0b7f7c33 424 set_dcd_param = NULL;
8a1edd7d
LHR
425 set_dcd_rst = set_dcd_rst_v1;
426 set_imx_hdr = set_imx_hdr_v1;
4d5fa985 427 max_dcd_entries = MAX_HW_CFG_SIZE_V1;
8a1edd7d
LHR
428 break;
429 case IMXIMAGE_V2:
61903b75 430 gd_last_cmd = NULL;
8a1edd7d 431 set_dcd_val = set_dcd_val_v2;
0b7f7c33 432 set_dcd_param = set_dcd_param_v2;
8a1edd7d
LHR
433 set_dcd_rst = set_dcd_rst_v2;
434 set_imx_hdr = set_imx_hdr_v2;
4d5fa985 435 max_dcd_entries = MAX_HW_CFG_SIZE_V2;
8a1edd7d
LHR
436 break;
437 default:
438 err_imximage_version(imximage_version);
439 break;
440 }
441}
8edcde5e 442
8a1edd7d
LHR
443static void print_hdr_v1(struct imx_header *imx_hdr)
444{
445 imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
446 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
447 dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
448 uint32_t size, length, ver;
449
450 size = dcd_v1->preamble.length;
451 if (size > (MAX_HW_CFG_SIZE_V1 * sizeof(dcd_type_addr_data_t))) {
8edcde5e
SB
452 fprintf(stderr,
453 "Error: Image corrupt DCD size %d exceed maximum %d\n",
5b28e913 454 (uint32_t)(size / sizeof(dcd_type_addr_data_t)),
8a1edd7d
LHR
455 MAX_HW_CFG_SIZE_V1);
456 exit(EXIT_FAILURE);
457 }
458
459 length = dcd_v1->preamble.length / sizeof(dcd_type_addr_data_t);
460 ver = detect_imximage_version(imx_hdr);
461
462 printf("Image Type: Freescale IMX Boot Image\n");
463 printf("Image Ver: %x", ver);
464 printf("%s\n", get_table_entry_name(imximage_versions, NULL, ver));
465 printf("Data Size: ");
466 genimg_print_size(dcd_v1->addr_data[length].type);
467 printf("Load Address: %08x\n", (uint32_t)fhdr_v1->app_dest_ptr);
468 printf("Entry Point: %08x\n", (uint32_t)fhdr_v1->app_code_jump_vector);
469}
470
471static void print_hdr_v2(struct imx_header *imx_hdr)
472{
473 imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
474 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
b55e4f48
PF
475 dcd_v2_t *dcd_v2 = &hdr_v2->data.dcd_table;
476 uint32_t size, version, plugin;
8a1edd7d 477
b55e4f48
PF
478 plugin = hdr_v2->boot_data.plugin;
479 if (!plugin) {
480 size = be16_to_cpu(dcd_v2->header.length);
481 if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) {
482 fprintf(stderr,
483 "Error: Image corrupt DCD size %d exceed maximum %d\n",
484 (uint32_t)(size / sizeof(dcd_addr_data_t)),
485 MAX_HW_CFG_SIZE_V2);
486 exit(EXIT_FAILURE);
487 }
8edcde5e
SB
488 }
489
8a1edd7d 490 version = detect_imximage_version(imx_hdr);
8edcde5e
SB
491
492 printf("Image Type: Freescale IMX Boot Image\n");
8a1edd7d
LHR
493 printf("Image Ver: %x", version);
494 printf("%s\n", get_table_entry_name(imximage_versions, NULL, version));
b55e4f48
PF
495 printf("Mode: %s\n", plugin ? "PLUGIN" : "DCD");
496 if (!plugin) {
497 printf("Data Size: ");
498 genimg_print_size(hdr_v2->boot_data.size);
499 printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr);
500 printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
501 if (fhdr_v2->csf && (imximage_ivt_offset != UNDEFINED) &&
502 (imximage_csf_size != UNDEFINED)) {
e5491f3e
EN
503 uint16_t dcdlen;
504 int offs;
505
506 dcdlen = hdr_v2->data.dcd_table.header.length;
507 offs = (char *)&hdr_v2->data.dcd_table
508 - (char *)hdr_v2;
509
b55e4f48
PF
510 printf("HAB Blocks: %08x %08x %08x\n",
511 (uint32_t)fhdr_v2->self, 0,
512 hdr_v2->boot_data.size - imximage_ivt_offset -
513 imximage_csf_size);
e5491f3e
EN
514 printf("DCD Blocks: 00910000 %08x %08x\n",
515 offs, be16_to_cpu(dcdlen));
b55e4f48
PF
516 }
517 } else {
518 imx_header_v2_t *next_hdr_v2;
519 flash_header_v2_t *next_fhdr_v2;
520
521 /*First Header*/
522 printf("Plugin Data Size: ");
523 genimg_print_size(hdr_v2->boot_data.size);
524 printf("Plugin Code Size: ");
525 genimg_print_size(imximage_plugin_size);
526 printf("Plugin Load Address: %08x\n", hdr_v2->boot_data.start);
527 printf("Plugin Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
528
529 /*Second Header*/
530 next_hdr_v2 = (imx_header_v2_t *)((char *)hdr_v2 +
531 imximage_plugin_size);
532 next_fhdr_v2 = &next_hdr_v2->fhdr;
533 printf("U-Boot Data Size: ");
534 genimg_print_size(next_hdr_v2->boot_data.size);
535 printf("U-Boot Load Address: %08x\n",
536 next_hdr_v2->boot_data.start);
537 printf("U-Boot Entry Point: %08x\n",
538 (uint32_t)next_fhdr_v2->entry);
0187c985 539 }
8edcde5e
SB
540}
541
b55e4f48
PF
542static void copy_plugin_code(struct imx_header *imxhdr, char *plugin_file)
543{
2a380ccc 544 int ifd;
b55e4f48
PF
545 struct stat sbuf;
546 char *plugin_buf = imxhdr->header.hdr_v2.data.plugin_code;
547 char *ptr;
548
549 ifd = open(plugin_file, O_RDONLY|O_BINARY);
2a380ccc
PF
550 if (ifd < 0) {
551 fprintf(stderr, "Can't open %s: %s\n",
552 plugin_file,
553 strerror(errno));
554 exit(EXIT_FAILURE);
555 }
556
b55e4f48
PF
557 if (fstat(ifd, &sbuf) < 0) {
558 fprintf(stderr, "Can't stat %s: %s\n",
559 plugin_file,
560 strerror(errno));
561 exit(EXIT_FAILURE);
562 }
563
564 ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, ifd, 0);
565 if (ptr == MAP_FAILED) {
566 fprintf(stderr, "Can't read %s: %s\n",
567 plugin_file,
568 strerror(errno));
569 exit(EXIT_FAILURE);
570 }
571
572 if (sbuf.st_size > MAX_PLUGIN_CODE_SIZE) {
573 printf("plugin binary size too large\n");
574 exit(EXIT_FAILURE);
575 }
576
577 memcpy(plugin_buf, ptr, sbuf.st_size);
578 imximage_plugin_size = sbuf.st_size;
579
580 (void) munmap((void *)ptr, sbuf.st_size);
581 (void) close(ifd);
582
583 imxhdr->header.hdr_v2.boot_data.plugin = 1;
584}
585
8a1edd7d
LHR
586static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,
587 char *name, int lineno, int fld, int dcd_len)
588{
589 int value;
590 static int cmd_ver_first = ~0;
591
592 switch (cmd) {
593 case CMD_IMAGE_VERSION:
594 imximage_version = get_cfg_value(token, name, lineno);
595 if (cmd_ver_first == 0) {
596 fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION "
597 "command need be the first before other "
598 "valid command in the file\n", name, lineno);
599 exit(EXIT_FAILURE);
600 }
601 cmd_ver_first = 1;
72048bc3 602 set_hdr_func();
8a1edd7d
LHR
603 break;
604 case CMD_BOOT_FROM:
377e367a 605 imximage_ivt_offset = get_table_entry_id(imximage_boot_offset,
8a1edd7d 606 "imximage boot option", token);
3150f92c 607 if (imximage_ivt_offset == -1) {
8a1edd7d
LHR
608 fprintf(stderr, "Error: %s[%d] -Invalid boot device"
609 "(%s)\n", name, lineno, token);
610 exit(EXIT_FAILURE);
611 }
377e367a
SB
612
613 imximage_init_loadsize =
614 get_table_entry_id(imximage_boot_loadsize,
615 "imximage boot option", token);
616
617 if (imximage_init_loadsize == -1) {
618 fprintf(stderr,
619 "Error: %s[%d] -Invalid boot device(%s)\n",
620 name, lineno, token);
621 exit(EXIT_FAILURE);
622 }
01390aff
SB
623
624 /*
625 * The SOC loads from the storage starting at address 0
626 * then ensures that the load size contains the offset
627 */
628 if (imximage_init_loadsize < imximage_ivt_offset)
629 imximage_init_loadsize = imximage_ivt_offset;
8a1edd7d
LHR
630 if (unlikely(cmd_ver_first != 1))
631 cmd_ver_first = 0;
632 break;
6cb83829 633 case CMD_BOOT_OFFSET:
3150f92c 634 imximage_ivt_offset = get_cfg_value(token, name, lineno);
6cb83829
MV
635 if (unlikely(cmd_ver_first != 1))
636 cmd_ver_first = 0;
637 break;
0b7f7c33
AA
638 case CMD_WRITE_DATA:
639 case CMD_WRITE_CLR_BIT:
640 case CMD_CHECK_BITS_SET:
641 case CMD_CHECK_BITS_CLR:
8a1edd7d 642 value = get_cfg_value(token, name, lineno);
0b7f7c33
AA
643 if (set_dcd_param)
644 (*set_dcd_param)(imxhdr, dcd_len, cmd);
8a1edd7d
LHR
645 (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len);
646 if (unlikely(cmd_ver_first != 1))
647 cmd_ver_first = 0;
648 break;
0187c985
SB
649 case CMD_CSF:
650 if (imximage_version != 2) {
651 fprintf(stderr,
652 "Error: %s[%d] - CSF only supported for VERSION 2(%s)\n",
653 name, lineno, token);
654 exit(EXIT_FAILURE);
655 }
656 imximage_csf_size = get_cfg_value(token, name, lineno);
657 if (unlikely(cmd_ver_first != 1))
658 cmd_ver_first = 0;
659 break;
b55e4f48
PF
660 case CMD_PLUGIN:
661 plugin_image = 1;
662 copy_plugin_code(imxhdr, token);
663 break;
8a1edd7d
LHR
664 }
665}
666
667static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd,
668 char *token, char *name, int lineno, int fld, int *dcd_len)
669{
670 int value;
671
672 switch (fld) {
673 case CFG_COMMAND:
674 *cmd = get_table_entry_id(imximage_cmds,
675 "imximage commands", token);
676 if (*cmd < 0) {
677 fprintf(stderr, "Error: %s[%d] - Invalid command"
678 "(%s)\n", name, lineno, token);
679 exit(EXIT_FAILURE);
680 }
681 break;
682 case CFG_REG_SIZE:
683 parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len);
684 break;
685 case CFG_REG_ADDRESS:
686 case CFG_REG_VALUE:
0b7f7c33
AA
687 switch(*cmd) {
688 case CMD_WRITE_DATA:
689 case CMD_WRITE_CLR_BIT:
690 case CMD_CHECK_BITS_SET:
691 case CMD_CHECK_BITS_CLR:
692
693 value = get_cfg_value(token, name, lineno);
694 if (set_dcd_param)
695 (*set_dcd_param)(imxhdr, *dcd_len, *cmd);
696 (*set_dcd_val)(imxhdr, name, lineno, fld, value,
697 *dcd_len);
698
699 if (fld == CFG_REG_VALUE) {
700 (*dcd_len)++;
701 if (*dcd_len > max_dcd_entries) {
702 fprintf(stderr, "Error: %s[%d] -"
703 "DCD table exceeds maximum size(%d)\n",
704 name, lineno, max_dcd_entries);
705 exit(EXIT_FAILURE);
706 }
4d5fa985 707 }
0b7f7c33 708 break;
b55e4f48
PF
709 case CMD_PLUGIN:
710 value = get_cfg_value(token, name, lineno);
711 imximage_iram_free_start = value;
712 break;
0b7f7c33
AA
713 default:
714 break;
4d5fa985 715 }
8a1edd7d
LHR
716 break;
717 default:
718 break;
719 }
720}
721static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name)
8edcde5e
SB
722{
723 FILE *fd = NULL;
724 char *line = NULL;
725 char *token, *saveptr1, *saveptr2;
726 int lineno = 0;
8a1edd7d 727 int fld;
0ad22703 728 size_t len;
8edcde5e 729 int dcd_len = 0;
8edcde5e
SB
730 int32_t cmd;
731
732 fd = fopen(name, "r");
733 if (fd == 0) {
734 fprintf(stderr, "Error: %s - Can't open DCD file\n", name);
735 exit(EXIT_FAILURE);
736 }
737
01390aff
SB
738 /*
739 * Very simple parsing, line starting with # are comments
8edcde5e
SB
740 * and are dropped
741 */
742 while ((getline(&line, &len, fd)) > 0) {
743 lineno++;
744
745 token = strtok_r(line, "\r\n", &saveptr1);
746 if (token == NULL)
747 continue;
748
749 /* Check inside the single line */
750 for (fld = CFG_COMMAND, cmd = CMD_INVALID,
751 line = token; ; line = NULL, fld++) {
752 token = strtok_r(line, " \t", &saveptr2);
753 if (token == NULL)
754 break;
755
756 /* Drop all text starting with '#' as comments */
757 if (token[0] == '#')
758 break;
759
8a1edd7d
LHR
760 parse_cfg_fld(imxhdr, &cmd, token, name,
761 lineno, fld, &dcd_len);
8edcde5e
SB
762 }
763
8edcde5e 764 }
8a1edd7d
LHR
765
766 (*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
8edcde5e
SB
767 fclose(fd);
768
8d8cc828 769 /* Exit if there is no BOOT_FROM field specifying the flash_offset */
3150f92c 770 if (imximage_ivt_offset == FLASH_OFFSET_UNDEFINED) {
8d8cc828
TK
771 fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
772 exit(EXIT_FAILURE);
773 }
5b28e913 774 return dcd_len;
8edcde5e
SB
775}
776
8edcde5e 777
8a1edd7d
LHR
778static int imximage_check_image_types(uint8_t type)
779{
780 if (type == IH_TYPE_IMXIMAGE)
781 return EXIT_SUCCESS;
782 else
783 return EXIT_FAILURE;
784}
8edcde5e 785
8a1edd7d 786static int imximage_verify_header(unsigned char *ptr, int image_size,
f86ed6a8 787 struct image_tool_params *params)
8a1edd7d
LHR
788{
789 struct imx_header *imx_hdr = (struct imx_header *) ptr;
8edcde5e 790
8a1edd7d
LHR
791 if (detect_imximage_version(imx_hdr) == IMXIMAGE_VER_INVALID)
792 return -FDT_ERR_BADSTRUCTURE;
8edcde5e 793
8a1edd7d
LHR
794 return 0;
795}
8edcde5e 796
8a1edd7d
LHR
797static void imximage_print_header(const void *ptr)
798{
799 struct imx_header *imx_hdr = (struct imx_header *) ptr;
800 uint32_t version = detect_imximage_version(imx_hdr);
801
802 switch (version) {
803 case IMXIMAGE_V1:
804 print_hdr_v1(imx_hdr);
805 break;
806 case IMXIMAGE_V2:
807 print_hdr_v2(imx_hdr);
808 break;
809 default:
810 err_imximage_version(version);
811 break;
812 }
813}
8edcde5e 814
8a1edd7d 815static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
f86ed6a8 816 struct image_tool_params *params)
8a1edd7d
LHR
817{
818 struct imx_header *imxhdr = (struct imx_header *)ptr;
819 uint32_t dcd_len;
b55e4f48 820 uint32_t header_size;
8edcde5e 821
8a1edd7d
LHR
822 /*
823 * In order to not change the old imx cfg file
824 * by adding VERSION command into it, here need
825 * set up function ptr group to V1 by default.
826 */
827 imximage_version = IMXIMAGE_V1;
49d3e272 828 /* Be able to detect if the cfg file has no BOOT_FROM tag */
3150f92c 829 imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
0187c985 830 imximage_csf_size = 0;
72048bc3 831 set_hdr_func();
8edcde5e 832
8a1edd7d
LHR
833 /* Parse dcd configuration file */
834 dcd_len = parse_cfg_file(imxhdr, params->imagename);
8edcde5e 835
03ea24b2 836 if (imximage_version == IMXIMAGE_V2) {
b55e4f48
PF
837 header_size = sizeof(flash_header_v2_t) + sizeof(boot_data_t);
838 if (!plugin_image)
839 header_size += sizeof(dcd_v2_t);
840 else
841 header_size += MAX_PLUGIN_CODE_SIZE;
842
843 if (imximage_init_loadsize < imximage_ivt_offset + header_size)
03ea24b2 844 imximage_init_loadsize = imximage_ivt_offset +
b55e4f48 845 header_size;
03ea24b2
YL
846 }
847
8a1edd7d 848 /* Set the imx header */
3150f92c 849 (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imximage_ivt_offset);
1411fb37
FE
850
851 /*
852 * ROM bug alert
895d9966
MV
853 *
854 * MX53 only loads 512 byte multiples in case of SD boot.
855 * MX53 only loads NAND page multiples in case of NAND boot and
856 * supports up to 4096 byte large pages, thus align to 4096.
857 *
858 * The remaining fraction of a block bytes would not be loaded!
1411fb37 859 */
de979804 860 *header_size_ptr = ROUND((sbuf->st_size + imximage_ivt_offset), 4096);
0187c985
SB
861
862 if (csf_ptr && imximage_csf_size) {
863 *csf_ptr = params->ep - imximage_init_loadsize +
864 *header_size_ptr;
865 *header_size_ptr += imximage_csf_size;
866 }
8edcde5e
SB
867}
868
f86ed6a8 869int imximage_check_params(struct image_tool_params *params)
8edcde5e
SB
870{
871 if (!params)
872 return CFG_INVALID;
873 if (!strlen(params->imagename)) {
874 fprintf(stderr, "Error: %s - Configuration file not specified, "
875 "it is needed for imximage generation\n",
876 params->cmdname);
877 return CFG_INVALID;
878 }
879 /*
880 * Check parameters:
881 * XIP is not allowed and verify that incompatible
882 * parameters are not sent at the same time
883 * For example, if list is required a data image must not be provided
884 */
885 return (params->dflag && (params->fflag || params->lflag)) ||
886 (params->fflag && (params->dflag || params->lflag)) ||
887 (params->lflag && (params->dflag || params->fflag)) ||
888 (params->xflag) || !(strlen(params->imagename));
889}
890
f86ed6a8 891static int imximage_generate(struct image_tool_params *params,
01390aff
SB
892 struct image_type_params *tparams)
893{
894 struct imx_header *imxhdr;
895 size_t alloc_len;
896 struct stat sbuf;
897 char *datafile = params->datafile;
b55e4f48 898 uint32_t pad_len, header_size;
01390aff
SB
899
900 memset(&imximage_header, 0, sizeof(imximage_header));
901
902 /*
903 * In order to not change the old imx cfg file
904 * by adding VERSION command into it, here need
905 * set up function ptr group to V1 by default.
906 */
907 imximage_version = IMXIMAGE_V1;
908 /* Be able to detect if the cfg file has no BOOT_FROM tag */
909 imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
910 imximage_csf_size = 0;
72048bc3 911 set_hdr_func();
01390aff
SB
912
913 /* Parse dcd configuration file */
914 parse_cfg_file(&imximage_header, params->imagename);
915
916 /* TODO: check i.MX image V1 handling, for now use 'old' style */
917 if (imximage_version == IMXIMAGE_V1) {
918 alloc_len = 4096;
b55e4f48 919 header_size = 4096;
01390aff 920 } else {
b55e4f48
PF
921 header_size = sizeof(flash_header_v2_t) + sizeof(boot_data_t);
922 if (!plugin_image)
923 header_size += sizeof(dcd_v2_t);
924 else
925 header_size += MAX_PLUGIN_CODE_SIZE;
926
927 if (imximage_init_loadsize < imximage_ivt_offset + header_size)
01390aff 928 imximage_init_loadsize = imximage_ivt_offset +
b55e4f48 929 header_size;
01390aff
SB
930 alloc_len = imximage_init_loadsize - imximage_ivt_offset;
931 }
932
b55e4f48 933 if (alloc_len < header_size) {
01390aff
SB
934 fprintf(stderr, "%s: header error\n",
935 params->cmdname);
936 exit(EXIT_FAILURE);
937 }
938
939 imxhdr = malloc(alloc_len);
940
941 if (!imxhdr) {
942 fprintf(stderr, "%s: malloc return failure: %s\n",
943 params->cmdname, strerror(errno));
944 exit(EXIT_FAILURE);
945 }
946
947 memset(imxhdr, 0, alloc_len);
948
949 tparams->header_size = alloc_len;
950 tparams->hdr = imxhdr;
951
952 /* determine data image file length */
953
954 if (stat(datafile, &sbuf) < 0) {
955 fprintf(stderr, "%s: Can't stat %s: %s\n",
956 params->cmdname, datafile, strerror(errno));
957 exit(EXIT_FAILURE);
958 }
959
960 pad_len = ROUND(sbuf.st_size, 4096) - sbuf.st_size;
961
962 /* TODO: check i.MX image V1 handling, for now use 'old' style */
963 if (imximage_version == IMXIMAGE_V1)
964 return 0;
965 else
966 return pad_len;
967}
968
969
8edcde5e
SB
970/*
971 * imximage parameters
972 */
a93648d1
GMF
973U_BOOT_IMAGE_TYPE(
974 imximage,
975 "Freescale i.MX Boot Image support",
976 0,
977 NULL,
978 imximage_check_params,
979 imximage_verify_header,
980 imximage_print_header,
981 imximage_set_header,
982 NULL,
983 imximage_check_image_types,
984 NULL,
985 imximage_generate
986);