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Merge branch 'dcc' of git://www.denx.de/git/u-boot-microblaze
[people/ms/u-boot.git] / tools / imximage.c
CommitLineData
8edcde5e
SB
1/*
2 * (C) Copyright 2009
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
5 * (C) Copyright 2008
6 * Marvell Semiconductor <www.marvell.com>
7 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8 *
1a459660 9 * SPDX-License-Identifier: GPL-2.0+
8edcde5e
SB
10 */
11
249d4dec
KG
12/* Required to obtain the getline prototype from stdio.h */
13#define _GNU_SOURCE
14
8edcde5e
SB
15#include "mkimage.h"
16#include <image.h>
17#include "imximage.h"
18
19/*
20 * Supported commands for configuration file
21 */
22static table_entry_t imximage_cmds[] = {
8a1edd7d 23 {CMD_BOOT_FROM, "BOOT_FROM", "boot command", },
6cb83829 24 {CMD_BOOT_OFFSET, "BOOT_OFFSET", "Boot offset", },
8a1edd7d
LHR
25 {CMD_DATA, "DATA", "Reg Write Data", },
26 {CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", },
27 {-1, "", "", },
8edcde5e
SB
28};
29
30/*
31 * Supported Boot options for configuration file
32 * this is needed to set the correct flash offset
33 */
34static table_entry_t imximage_bootops[] = {
8edcde5e 35 {FLASH_OFFSET_ONENAND, "onenand", "OneNAND Flash",},
bd25864c 36 {FLASH_OFFSET_NAND, "nand", "NAND Flash", },
19b409c0
DB
37 {FLASH_OFFSET_NOR, "nor", "NOR Flash", },
38 {FLASH_OFFSET_SATA, "sata", "SATA Disk", },
bd25864c
DB
39 {FLASH_OFFSET_SD, "sd", "SD Card", },
40 {FLASH_OFFSET_SPI, "spi", "SPI Flash", },
8edcde5e
SB
41 {-1, "", "Invalid", },
42};
43
8a1edd7d
LHR
44/*
45 * IMXIMAGE version definition for i.MX chips
46 */
47static table_entry_t imximage_versions[] = {
48 {IMXIMAGE_V1, "", " (i.MX25/35/51 compatible)", },
19b409c0 49 {IMXIMAGE_V2, "", " (i.MX53/6 compatible)", },
8a1edd7d
LHR
50 {-1, "", " (Invalid)", },
51};
8edcde5e
SB
52
53static struct imx_header imximage_header;
8a1edd7d
LHR
54static uint32_t imximage_version;
55
56static set_dcd_val_t set_dcd_val;
57static set_dcd_rst_t set_dcd_rst;
58static set_imx_hdr_t set_imx_hdr;
4d5fa985 59static uint32_t max_dcd_entries;
24331982 60static uint32_t *header_size_ptr;
8edcde5e
SB
61
62static uint32_t get_cfg_value(char *token, char *name, int linenr)
63{
64 char *endptr;
65 uint32_t value;
66
67 errno = 0;
68 value = strtoul(token, &endptr, 16);
69 if (errno || (token == endptr)) {
70 fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n",
71 name, linenr, token);
72 exit(EXIT_FAILURE);
73 }
74 return value;
75}
76
8a1edd7d 77static uint32_t detect_imximage_version(struct imx_header *imx_hdr)
8edcde5e 78{
8a1edd7d
LHR
79 imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
80 imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
81 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
82 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
83
84 /* Try to detect V1 */
85 if ((fhdr_v1->app_code_barker == APP_CODE_BARKER) &&
86 (hdr_v1->dcd_table.preamble.barker == DCD_BARKER))
87 return IMXIMAGE_V1;
88
89 /* Try to detect V2 */
90 if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
91 (hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG))
92 return IMXIMAGE_V2;
93
94 return IMXIMAGE_VER_INVALID;
8edcde5e
SB
95}
96
8a1edd7d 97static void err_imximage_version(int version)
8edcde5e 98{
8a1edd7d
LHR
99 fprintf(stderr,
100 "Error: Unsupported imximage version:%d\n", version);
8edcde5e 101
8a1edd7d
LHR
102 exit(EXIT_FAILURE);
103}
8edcde5e 104
8a1edd7d
LHR
105static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno,
106 int fld, uint32_t value, uint32_t off)
107{
108 dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
109
110 switch (fld) {
111 case CFG_REG_SIZE:
112 /* Byte, halfword, word */
113 if ((value != 1) && (value != 2) && (value != 4)) {
114 fprintf(stderr, "Error: %s[%d] - "
115 "Invalid register size " "(%d)\n",
116 name, lineno, value);
117 exit(EXIT_FAILURE);
118 }
119 dcd_v1->addr_data[off].type = value;
120 break;
121 case CFG_REG_ADDRESS:
122 dcd_v1->addr_data[off].addr = value;
123 break;
124 case CFG_REG_VALUE:
125 dcd_v1->addr_data[off].value = value;
126 break;
127 default:
128 break;
8edcde5e 129
8a1edd7d
LHR
130 }
131}
8edcde5e 132
8a1edd7d
LHR
133static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno,
134 int fld, uint32_t value, uint32_t off)
135{
136 dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
137
138 switch (fld) {
139 case CFG_REG_ADDRESS:
140 dcd_v2->addr_data[off].addr = cpu_to_be32(value);
141 break;
142 case CFG_REG_VALUE:
143 dcd_v2->addr_data[off].value = cpu_to_be32(value);
144 break;
145 default:
146 break;
147
148 }
8edcde5e
SB
149}
150
8a1edd7d
LHR
151/*
152 * Complete setting up the rest field of DCD of V1
153 * such as barker code and DCD data length.
154 */
155static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len,
156 char *name, int lineno)
8edcde5e 157{
8a1edd7d
LHR
158 dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
159
8a1edd7d
LHR
160 dcd_v1->preamble.barker = DCD_BARKER;
161 dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t);
162}
163
164/*
165 * Complete setting up the reset field of DCD of V2
166 * such as DCD tag, version, length, etc.
167 */
168static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
169 char *name, int lineno)
170{
171 dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
172
8a1edd7d
LHR
173 dcd_v2->header.tag = DCD_HEADER_TAG;
174 dcd_v2->header.length = cpu_to_be16(
175 dcd_len * sizeof(dcd_addr_data_t) + 8);
176 dcd_v2->header.version = DCD_VERSION;
177 dcd_v2->write_dcd_command.tag = DCD_COMMAND_TAG;
178 dcd_v2->write_dcd_command.length = cpu_to_be16(
179 dcd_len * sizeof(dcd_addr_data_t) + 4);
180 dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM;
181}
182
183static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
ad0826dc 184 uint32_t entry_point, uint32_t flash_offset)
8a1edd7d
LHR
185{
186 imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1;
187 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
188 dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
ab857f26 189 uint32_t hdr_base;
24331982
TK
190 uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr)
191 - ((char *)imxhdr));
8a1edd7d 192
8a1edd7d
LHR
193 /* Set magic number */
194 fhdr_v1->app_code_barker = APP_CODE_BARKER;
195
ab857f26
TK
196 hdr_base = entry_point - sizeof(struct imx_header);
197 fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
ad0826dc 198 fhdr_v1->app_code_jump_vector = entry_point;
8a1edd7d 199
ab857f26
TK
200 fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr);
201 fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
8a1edd7d 202
8a1edd7d
LHR
203 /* Security feature are not supported */
204 fhdr_v1->app_code_csf = 0;
205 fhdr_v1->super_root_key = 0;
24331982 206 header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
8a1edd7d
LHR
207}
208
209static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
ad0826dc 210 uint32_t entry_point, uint32_t flash_offset)
8a1edd7d
LHR
211{
212 imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
213 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
ab857f26 214 uint32_t hdr_base;
8a1edd7d 215
8a1edd7d
LHR
216 /* Set magic number */
217 fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
218 fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
219 fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
220
ad0826dc 221 fhdr_v2->entry = entry_point;
8a1edd7d 222 fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0;
ab857f26 223 fhdr_v2->self = hdr_base = entry_point - sizeof(struct imx_header);
8a1edd7d 224
ab857f26
TK
225 fhdr_v2->dcd_ptr = hdr_base + offsetof(imx_header_v2_t, dcd_table);
226 fhdr_v2->boot_data_ptr = hdr_base
227 + offsetof(imx_header_v2_t, boot_data);
228 hdr_v2->boot_data.start = hdr_base - flash_offset;
8a1edd7d
LHR
229
230 /* Security feature are not supported */
231 fhdr_v2->csf = 0;
24331982 232 header_size_ptr = &hdr_v2->boot_data.size;
8a1edd7d
LHR
233}
234
235static void set_hdr_func(struct imx_header *imxhdr)
236{
237 switch (imximage_version) {
238 case IMXIMAGE_V1:
239 set_dcd_val = set_dcd_val_v1;
240 set_dcd_rst = set_dcd_rst_v1;
241 set_imx_hdr = set_imx_hdr_v1;
4d5fa985 242 max_dcd_entries = MAX_HW_CFG_SIZE_V1;
8a1edd7d
LHR
243 break;
244 case IMXIMAGE_V2:
245 set_dcd_val = set_dcd_val_v2;
246 set_dcd_rst = set_dcd_rst_v2;
247 set_imx_hdr = set_imx_hdr_v2;
4d5fa985 248 max_dcd_entries = MAX_HW_CFG_SIZE_V2;
8a1edd7d
LHR
249 break;
250 default:
251 err_imximage_version(imximage_version);
252 break;
253 }
254}
8edcde5e 255
8a1edd7d
LHR
256static void print_hdr_v1(struct imx_header *imx_hdr)
257{
258 imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
259 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
260 dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
261 uint32_t size, length, ver;
262
263 size = dcd_v1->preamble.length;
264 if (size > (MAX_HW_CFG_SIZE_V1 * sizeof(dcd_type_addr_data_t))) {
8edcde5e
SB
265 fprintf(stderr,
266 "Error: Image corrupt DCD size %d exceed maximum %d\n",
5b28e913 267 (uint32_t)(size / sizeof(dcd_type_addr_data_t)),
8a1edd7d
LHR
268 MAX_HW_CFG_SIZE_V1);
269 exit(EXIT_FAILURE);
270 }
271
272 length = dcd_v1->preamble.length / sizeof(dcd_type_addr_data_t);
273 ver = detect_imximage_version(imx_hdr);
274
275 printf("Image Type: Freescale IMX Boot Image\n");
276 printf("Image Ver: %x", ver);
277 printf("%s\n", get_table_entry_name(imximage_versions, NULL, ver));
278 printf("Data Size: ");
279 genimg_print_size(dcd_v1->addr_data[length].type);
280 printf("Load Address: %08x\n", (uint32_t)fhdr_v1->app_dest_ptr);
281 printf("Entry Point: %08x\n", (uint32_t)fhdr_v1->app_code_jump_vector);
282}
283
284static void print_hdr_v2(struct imx_header *imx_hdr)
285{
286 imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
287 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
288 dcd_v2_t *dcd_v2 = &hdr_v2->dcd_table;
289 uint32_t size, version;
290
291 size = be16_to_cpu(dcd_v2->header.length) - 8;
292 if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) {
293 fprintf(stderr,
294 "Error: Image corrupt DCD size %d exceed maximum %d\n",
295 (uint32_t)(size / sizeof(dcd_addr_data_t)),
296 MAX_HW_CFG_SIZE_V2);
8edcde5e
SB
297 exit(EXIT_FAILURE);
298 }
299
8a1edd7d 300 version = detect_imximage_version(imx_hdr);
8edcde5e
SB
301
302 printf("Image Type: Freescale IMX Boot Image\n");
8a1edd7d
LHR
303 printf("Image Ver: %x", version);
304 printf("%s\n", get_table_entry_name(imximage_versions, NULL, version));
8edcde5e 305 printf("Data Size: ");
8a1edd7d
LHR
306 genimg_print_size(hdr_v2->boot_data.size);
307 printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr);
308 printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
8edcde5e
SB
309}
310
8a1edd7d
LHR
311static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,
312 char *name, int lineno, int fld, int dcd_len)
313{
314 int value;
315 static int cmd_ver_first = ~0;
316
317 switch (cmd) {
318 case CMD_IMAGE_VERSION:
319 imximage_version = get_cfg_value(token, name, lineno);
320 if (cmd_ver_first == 0) {
321 fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION "
322 "command need be the first before other "
323 "valid command in the file\n", name, lineno);
324 exit(EXIT_FAILURE);
325 }
326 cmd_ver_first = 1;
327 set_hdr_func(imxhdr);
328 break;
329 case CMD_BOOT_FROM:
330 imxhdr->flash_offset = get_table_entry_id(imximage_bootops,
331 "imximage boot option", token);
332 if (imxhdr->flash_offset == -1) {
333 fprintf(stderr, "Error: %s[%d] -Invalid boot device"
334 "(%s)\n", name, lineno, token);
335 exit(EXIT_FAILURE);
336 }
337 if (unlikely(cmd_ver_first != 1))
338 cmd_ver_first = 0;
339 break;
6cb83829
MV
340 case CMD_BOOT_OFFSET:
341 imxhdr->flash_offset = get_cfg_value(token, name, lineno);
342 if (unlikely(cmd_ver_first != 1))
343 cmd_ver_first = 0;
344 break;
8a1edd7d
LHR
345 case CMD_DATA:
346 value = get_cfg_value(token, name, lineno);
347 (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len);
348 if (unlikely(cmd_ver_first != 1))
349 cmd_ver_first = 0;
350 break;
351 }
352}
353
354static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd,
355 char *token, char *name, int lineno, int fld, int *dcd_len)
356{
357 int value;
358
359 switch (fld) {
360 case CFG_COMMAND:
361 *cmd = get_table_entry_id(imximage_cmds,
362 "imximage commands", token);
363 if (*cmd < 0) {
364 fprintf(stderr, "Error: %s[%d] - Invalid command"
365 "(%s)\n", name, lineno, token);
366 exit(EXIT_FAILURE);
367 }
368 break;
369 case CFG_REG_SIZE:
370 parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len);
371 break;
372 case CFG_REG_ADDRESS:
373 case CFG_REG_VALUE:
374 if (*cmd != CMD_DATA)
375 return;
376
377 value = get_cfg_value(token, name, lineno);
378 (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len);
379
4d5fa985 380 if (fld == CFG_REG_VALUE) {
8a1edd7d 381 (*dcd_len)++;
4d5fa985
TK
382 if (*dcd_len > max_dcd_entries) {
383 fprintf(stderr, "Error: %s[%d] -"
384 "DCD table exceeds maximum size(%d)\n",
385 name, lineno, max_dcd_entries);
386 exit(EXIT_FAILURE);
387 }
388 }
8a1edd7d
LHR
389 break;
390 default:
391 break;
392 }
393}
394static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name)
8edcde5e
SB
395{
396 FILE *fd = NULL;
397 char *line = NULL;
398 char *token, *saveptr1, *saveptr2;
399 int lineno = 0;
8a1edd7d 400 int fld;
0ad22703 401 size_t len;
8edcde5e 402 int dcd_len = 0;
8edcde5e
SB
403 int32_t cmd;
404
405 fd = fopen(name, "r");
406 if (fd == 0) {
407 fprintf(stderr, "Error: %s - Can't open DCD file\n", name);
408 exit(EXIT_FAILURE);
409 }
410
411 /* Very simple parsing, line starting with # are comments
412 * and are dropped
413 */
414 while ((getline(&line, &len, fd)) > 0) {
415 lineno++;
416
417 token = strtok_r(line, "\r\n", &saveptr1);
418 if (token == NULL)
419 continue;
420
421 /* Check inside the single line */
422 for (fld = CFG_COMMAND, cmd = CMD_INVALID,
423 line = token; ; line = NULL, fld++) {
424 token = strtok_r(line, " \t", &saveptr2);
425 if (token == NULL)
426 break;
427
428 /* Drop all text starting with '#' as comments */
429 if (token[0] == '#')
430 break;
431
8a1edd7d
LHR
432 parse_cfg_fld(imxhdr, &cmd, token, name,
433 lineno, fld, &dcd_len);
8edcde5e
SB
434 }
435
8edcde5e 436 }
8a1edd7d
LHR
437
438 (*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
8edcde5e
SB
439 fclose(fd);
440
8d8cc828
TK
441 /* Exit if there is no BOOT_FROM field specifying the flash_offset */
442 if (imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) {
443 fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
444 exit(EXIT_FAILURE);
445 }
5b28e913 446 return dcd_len;
8edcde5e
SB
447}
448
8edcde5e 449
8a1edd7d
LHR
450static int imximage_check_image_types(uint8_t type)
451{
452 if (type == IH_TYPE_IMXIMAGE)
453 return EXIT_SUCCESS;
454 else
455 return EXIT_FAILURE;
456}
8edcde5e 457
8a1edd7d
LHR
458static int imximage_verify_header(unsigned char *ptr, int image_size,
459 struct mkimage_params *params)
460{
461 struct imx_header *imx_hdr = (struct imx_header *) ptr;
8edcde5e 462
8a1edd7d
LHR
463 if (detect_imximage_version(imx_hdr) == IMXIMAGE_VER_INVALID)
464 return -FDT_ERR_BADSTRUCTURE;
8edcde5e 465
8a1edd7d
LHR
466 return 0;
467}
8edcde5e 468
8a1edd7d
LHR
469static void imximage_print_header(const void *ptr)
470{
471 struct imx_header *imx_hdr = (struct imx_header *) ptr;
472 uint32_t version = detect_imximage_version(imx_hdr);
473
474 switch (version) {
475 case IMXIMAGE_V1:
476 print_hdr_v1(imx_hdr);
477 break;
478 case IMXIMAGE_V2:
479 print_hdr_v2(imx_hdr);
480 break;
481 default:
482 err_imximage_version(version);
483 break;
484 }
485}
8edcde5e 486
8a1edd7d
LHR
487static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
488 struct mkimage_params *params)
489{
490 struct imx_header *imxhdr = (struct imx_header *)ptr;
491 uint32_t dcd_len;
8edcde5e 492
8a1edd7d
LHR
493 /*
494 * In order to not change the old imx cfg file
495 * by adding VERSION command into it, here need
496 * set up function ptr group to V1 by default.
497 */
498 imximage_version = IMXIMAGE_V1;
49d3e272
DB
499 /* Be able to detect if the cfg file has no BOOT_FROM tag */
500 imxhdr->flash_offset = FLASH_OFFSET_UNDEFINED;
8a1edd7d 501 set_hdr_func(imxhdr);
8edcde5e 502
8a1edd7d
LHR
503 /* Parse dcd configuration file */
504 dcd_len = parse_cfg_file(imxhdr, params->imagename);
8edcde5e 505
8a1edd7d 506 /* Set the imx header */
ad0826dc 507 (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imxhdr->flash_offset);
1411fb37
FE
508
509 /*
510 * ROM bug alert
895d9966
MV
511 *
512 * MX53 only loads 512 byte multiples in case of SD boot.
513 * MX53 only loads NAND page multiples in case of NAND boot and
514 * supports up to 4096 byte large pages, thus align to 4096.
515 *
516 * The remaining fraction of a block bytes would not be loaded!
1411fb37 517 */
895d9966 518 *header_size_ptr = ROUND(sbuf->st_size + imxhdr->flash_offset, 4096);
8edcde5e
SB
519}
520
521int imximage_check_params(struct mkimage_params *params)
522{
523 if (!params)
524 return CFG_INVALID;
525 if (!strlen(params->imagename)) {
526 fprintf(stderr, "Error: %s - Configuration file not specified, "
527 "it is needed for imximage generation\n",
528 params->cmdname);
529 return CFG_INVALID;
530 }
531 /*
532 * Check parameters:
533 * XIP is not allowed and verify that incompatible
534 * parameters are not sent at the same time
535 * For example, if list is required a data image must not be provided
536 */
537 return (params->dflag && (params->fflag || params->lflag)) ||
538 (params->fflag && (params->dflag || params->lflag)) ||
539 (params->lflag && (params->dflag || params->fflag)) ||
540 (params->xflag) || !(strlen(params->imagename));
541}
542
543/*
544 * imximage parameters
545 */
546static struct image_type_params imximage_params = {
6e083857 547 .name = "Freescale i.MX Boot Image support",
8edcde5e
SB
548 .header_size = sizeof(struct imx_header),
549 .hdr = (void *)&imximage_header,
550 .check_image_type = imximage_check_image_types,
551 .verify_header = imximage_verify_header,
552 .print_header = imximage_print_header,
553 .set_header = imximage_set_header,
554 .check_params = imximage_check_params,
555};
556
557void init_imx_image_type(void)
558{
559 mkimage_register(&imximage_params);
560}