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tools: rename mximage_flash_offset to imximage_ivt_offset
[thirdparty/u-boot.git] / tools / imximage.c
CommitLineData
8edcde5e
SB
1/*
2 * (C) Copyright 2009
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
5 * (C) Copyright 2008
6 * Marvell Semiconductor <www.marvell.com>
7 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8 *
1a459660 9 * SPDX-License-Identifier: GPL-2.0+
8edcde5e
SB
10 */
11
249d4dec
KG
12/* Required to obtain the getline prototype from stdio.h */
13#define _GNU_SOURCE
14
8edcde5e
SB
15#include "mkimage.h"
16#include <image.h>
17#include "imximage.h"
18
19/*
20 * Supported commands for configuration file
21 */
22static table_entry_t imximage_cmds[] = {
8a1edd7d 23 {CMD_BOOT_FROM, "BOOT_FROM", "boot command", },
6cb83829 24 {CMD_BOOT_OFFSET, "BOOT_OFFSET", "Boot offset", },
8a1edd7d
LHR
25 {CMD_DATA, "DATA", "Reg Write Data", },
26 {CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", },
27 {-1, "", "", },
8edcde5e
SB
28};
29
30/*
31 * Supported Boot options for configuration file
32 * this is needed to set the correct flash offset
33 */
34static table_entry_t imximage_bootops[] = {
8edcde5e 35 {FLASH_OFFSET_ONENAND, "onenand", "OneNAND Flash",},
bd25864c 36 {FLASH_OFFSET_NAND, "nand", "NAND Flash", },
19b409c0
DB
37 {FLASH_OFFSET_NOR, "nor", "NOR Flash", },
38 {FLASH_OFFSET_SATA, "sata", "SATA Disk", },
bd25864c
DB
39 {FLASH_OFFSET_SD, "sd", "SD Card", },
40 {FLASH_OFFSET_SPI, "spi", "SPI Flash", },
8edcde5e
SB
41 {-1, "", "Invalid", },
42};
43
8a1edd7d
LHR
44/*
45 * IMXIMAGE version definition for i.MX chips
46 */
47static table_entry_t imximage_versions[] = {
48 {IMXIMAGE_V1, "", " (i.MX25/35/51 compatible)", },
19b409c0 49 {IMXIMAGE_V2, "", " (i.MX53/6 compatible)", },
8a1edd7d
LHR
50 {-1, "", " (Invalid)", },
51};
8edcde5e
SB
52
53static struct imx_header imximage_header;
8a1edd7d 54static uint32_t imximage_version;
3150f92c
SB
55/* Image Vector Table Offset */
56static uint32_t imximage_ivt_offset;
8a1edd7d
LHR
57
58static set_dcd_val_t set_dcd_val;
59static set_dcd_rst_t set_dcd_rst;
60static set_imx_hdr_t set_imx_hdr;
4d5fa985 61static uint32_t max_dcd_entries;
24331982 62static uint32_t *header_size_ptr;
8edcde5e
SB
63
64static uint32_t get_cfg_value(char *token, char *name, int linenr)
65{
66 char *endptr;
67 uint32_t value;
68
69 errno = 0;
70 value = strtoul(token, &endptr, 16);
71 if (errno || (token == endptr)) {
72 fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n",
73 name, linenr, token);
74 exit(EXIT_FAILURE);
75 }
76 return value;
77}
78
8a1edd7d 79static uint32_t detect_imximage_version(struct imx_header *imx_hdr)
8edcde5e 80{
8a1edd7d
LHR
81 imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
82 imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
83 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
84 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
85
86 /* Try to detect V1 */
87 if ((fhdr_v1->app_code_barker == APP_CODE_BARKER) &&
88 (hdr_v1->dcd_table.preamble.barker == DCD_BARKER))
89 return IMXIMAGE_V1;
90
91 /* Try to detect V2 */
92 if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
93 (hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG))
94 return IMXIMAGE_V2;
95
96 return IMXIMAGE_VER_INVALID;
8edcde5e
SB
97}
98
8a1edd7d 99static void err_imximage_version(int version)
8edcde5e 100{
8a1edd7d
LHR
101 fprintf(stderr,
102 "Error: Unsupported imximage version:%d\n", version);
8edcde5e 103
8a1edd7d
LHR
104 exit(EXIT_FAILURE);
105}
8edcde5e 106
8a1edd7d
LHR
107static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno,
108 int fld, uint32_t value, uint32_t off)
109{
110 dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
111
112 switch (fld) {
113 case CFG_REG_SIZE:
114 /* Byte, halfword, word */
115 if ((value != 1) && (value != 2) && (value != 4)) {
116 fprintf(stderr, "Error: %s[%d] - "
117 "Invalid register size " "(%d)\n",
118 name, lineno, value);
119 exit(EXIT_FAILURE);
120 }
121 dcd_v1->addr_data[off].type = value;
122 break;
123 case CFG_REG_ADDRESS:
124 dcd_v1->addr_data[off].addr = value;
125 break;
126 case CFG_REG_VALUE:
127 dcd_v1->addr_data[off].value = value;
128 break;
129 default:
130 break;
8edcde5e 131
8a1edd7d
LHR
132 }
133}
8edcde5e 134
8a1edd7d
LHR
135static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno,
136 int fld, uint32_t value, uint32_t off)
137{
138 dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
139
140 switch (fld) {
141 case CFG_REG_ADDRESS:
142 dcd_v2->addr_data[off].addr = cpu_to_be32(value);
143 break;
144 case CFG_REG_VALUE:
145 dcd_v2->addr_data[off].value = cpu_to_be32(value);
146 break;
147 default:
148 break;
149
150 }
8edcde5e
SB
151}
152
8a1edd7d
LHR
153/*
154 * Complete setting up the rest field of DCD of V1
155 * such as barker code and DCD data length.
156 */
157static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len,
158 char *name, int lineno)
8edcde5e 159{
8a1edd7d
LHR
160 dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
161
8a1edd7d
LHR
162 dcd_v1->preamble.barker = DCD_BARKER;
163 dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t);
164}
165
166/*
167 * Complete setting up the reset field of DCD of V2
168 * such as DCD tag, version, length, etc.
169 */
170static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
171 char *name, int lineno)
172{
173 dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
174
8a1edd7d
LHR
175 dcd_v2->header.tag = DCD_HEADER_TAG;
176 dcd_v2->header.length = cpu_to_be16(
177 dcd_len * sizeof(dcd_addr_data_t) + 8);
178 dcd_v2->header.version = DCD_VERSION;
179 dcd_v2->write_dcd_command.tag = DCD_COMMAND_TAG;
180 dcd_v2->write_dcd_command.length = cpu_to_be16(
181 dcd_len * sizeof(dcd_addr_data_t) + 4);
182 dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM;
183}
184
185static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
ad0826dc 186 uint32_t entry_point, uint32_t flash_offset)
8a1edd7d
LHR
187{
188 imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1;
189 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
190 dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
ab857f26 191 uint32_t hdr_base;
24331982
TK
192 uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr)
193 - ((char *)imxhdr));
8a1edd7d 194
8a1edd7d
LHR
195 /* Set magic number */
196 fhdr_v1->app_code_barker = APP_CODE_BARKER;
197
ab857f26
TK
198 hdr_base = entry_point - sizeof(struct imx_header);
199 fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
ad0826dc 200 fhdr_v1->app_code_jump_vector = entry_point;
8a1edd7d 201
ab857f26
TK
202 fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr);
203 fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
8a1edd7d 204
8a1edd7d
LHR
205 /* Security feature are not supported */
206 fhdr_v1->app_code_csf = 0;
207 fhdr_v1->super_root_key = 0;
24331982 208 header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
8a1edd7d
LHR
209}
210
211static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
ad0826dc 212 uint32_t entry_point, uint32_t flash_offset)
8a1edd7d
LHR
213{
214 imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
215 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
ab857f26 216 uint32_t hdr_base;
8a1edd7d 217
8a1edd7d
LHR
218 /* Set magic number */
219 fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
220 fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
221 fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
222
ad0826dc 223 fhdr_v2->entry = entry_point;
8a1edd7d 224 fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0;
ab857f26 225 fhdr_v2->self = hdr_base = entry_point - sizeof(struct imx_header);
8a1edd7d 226
ab857f26
TK
227 fhdr_v2->dcd_ptr = hdr_base + offsetof(imx_header_v2_t, dcd_table);
228 fhdr_v2->boot_data_ptr = hdr_base
229 + offsetof(imx_header_v2_t, boot_data);
230 hdr_v2->boot_data.start = hdr_base - flash_offset;
8a1edd7d
LHR
231
232 /* Security feature are not supported */
233 fhdr_v2->csf = 0;
24331982 234 header_size_ptr = &hdr_v2->boot_data.size;
8a1edd7d
LHR
235}
236
237static void set_hdr_func(struct imx_header *imxhdr)
238{
239 switch (imximage_version) {
240 case IMXIMAGE_V1:
241 set_dcd_val = set_dcd_val_v1;
242 set_dcd_rst = set_dcd_rst_v1;
243 set_imx_hdr = set_imx_hdr_v1;
4d5fa985 244 max_dcd_entries = MAX_HW_CFG_SIZE_V1;
8a1edd7d
LHR
245 break;
246 case IMXIMAGE_V2:
247 set_dcd_val = set_dcd_val_v2;
248 set_dcd_rst = set_dcd_rst_v2;
249 set_imx_hdr = set_imx_hdr_v2;
4d5fa985 250 max_dcd_entries = MAX_HW_CFG_SIZE_V2;
8a1edd7d
LHR
251 break;
252 default:
253 err_imximage_version(imximage_version);
254 break;
255 }
256}
8edcde5e 257
8a1edd7d
LHR
258static void print_hdr_v1(struct imx_header *imx_hdr)
259{
260 imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
261 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
262 dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
263 uint32_t size, length, ver;
264
265 size = dcd_v1->preamble.length;
266 if (size > (MAX_HW_CFG_SIZE_V1 * sizeof(dcd_type_addr_data_t))) {
8edcde5e
SB
267 fprintf(stderr,
268 "Error: Image corrupt DCD size %d exceed maximum %d\n",
5b28e913 269 (uint32_t)(size / sizeof(dcd_type_addr_data_t)),
8a1edd7d
LHR
270 MAX_HW_CFG_SIZE_V1);
271 exit(EXIT_FAILURE);
272 }
273
274 length = dcd_v1->preamble.length / sizeof(dcd_type_addr_data_t);
275 ver = detect_imximage_version(imx_hdr);
276
277 printf("Image Type: Freescale IMX Boot Image\n");
278 printf("Image Ver: %x", ver);
279 printf("%s\n", get_table_entry_name(imximage_versions, NULL, ver));
280 printf("Data Size: ");
281 genimg_print_size(dcd_v1->addr_data[length].type);
282 printf("Load Address: %08x\n", (uint32_t)fhdr_v1->app_dest_ptr);
283 printf("Entry Point: %08x\n", (uint32_t)fhdr_v1->app_code_jump_vector);
284}
285
286static void print_hdr_v2(struct imx_header *imx_hdr)
287{
288 imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
289 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
290 dcd_v2_t *dcd_v2 = &hdr_v2->dcd_table;
291 uint32_t size, version;
292
293 size = be16_to_cpu(dcd_v2->header.length) - 8;
294 if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) {
295 fprintf(stderr,
296 "Error: Image corrupt DCD size %d exceed maximum %d\n",
297 (uint32_t)(size / sizeof(dcd_addr_data_t)),
298 MAX_HW_CFG_SIZE_V2);
8edcde5e
SB
299 exit(EXIT_FAILURE);
300 }
301
8a1edd7d 302 version = detect_imximage_version(imx_hdr);
8edcde5e
SB
303
304 printf("Image Type: Freescale IMX Boot Image\n");
8a1edd7d
LHR
305 printf("Image Ver: %x", version);
306 printf("%s\n", get_table_entry_name(imximage_versions, NULL, version));
8edcde5e 307 printf("Data Size: ");
8a1edd7d
LHR
308 genimg_print_size(hdr_v2->boot_data.size);
309 printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr);
310 printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
8edcde5e
SB
311}
312
8a1edd7d
LHR
313static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,
314 char *name, int lineno, int fld, int dcd_len)
315{
316 int value;
317 static int cmd_ver_first = ~0;
318
319 switch (cmd) {
320 case CMD_IMAGE_VERSION:
321 imximage_version = get_cfg_value(token, name, lineno);
322 if (cmd_ver_first == 0) {
323 fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION "
324 "command need be the first before other "
325 "valid command in the file\n", name, lineno);
326 exit(EXIT_FAILURE);
327 }
328 cmd_ver_first = 1;
329 set_hdr_func(imxhdr);
330 break;
331 case CMD_BOOT_FROM:
3150f92c 332 imximage_ivt_offset = get_table_entry_id(imximage_bootops,
8a1edd7d 333 "imximage boot option", token);
3150f92c 334 if (imximage_ivt_offset == -1) {
8a1edd7d
LHR
335 fprintf(stderr, "Error: %s[%d] -Invalid boot device"
336 "(%s)\n", name, lineno, token);
337 exit(EXIT_FAILURE);
338 }
339 if (unlikely(cmd_ver_first != 1))
340 cmd_ver_first = 0;
341 break;
6cb83829 342 case CMD_BOOT_OFFSET:
3150f92c 343 imximage_ivt_offset = get_cfg_value(token, name, lineno);
6cb83829
MV
344 if (unlikely(cmd_ver_first != 1))
345 cmd_ver_first = 0;
346 break;
8a1edd7d
LHR
347 case CMD_DATA:
348 value = get_cfg_value(token, name, lineno);
349 (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len);
350 if (unlikely(cmd_ver_first != 1))
351 cmd_ver_first = 0;
352 break;
353 }
354}
355
356static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd,
357 char *token, char *name, int lineno, int fld, int *dcd_len)
358{
359 int value;
360
361 switch (fld) {
362 case CFG_COMMAND:
363 *cmd = get_table_entry_id(imximage_cmds,
364 "imximage commands", token);
365 if (*cmd < 0) {
366 fprintf(stderr, "Error: %s[%d] - Invalid command"
367 "(%s)\n", name, lineno, token);
368 exit(EXIT_FAILURE);
369 }
370 break;
371 case CFG_REG_SIZE:
372 parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len);
373 break;
374 case CFG_REG_ADDRESS:
375 case CFG_REG_VALUE:
376 if (*cmd != CMD_DATA)
377 return;
378
379 value = get_cfg_value(token, name, lineno);
380 (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len);
381
4d5fa985 382 if (fld == CFG_REG_VALUE) {
8a1edd7d 383 (*dcd_len)++;
4d5fa985
TK
384 if (*dcd_len > max_dcd_entries) {
385 fprintf(stderr, "Error: %s[%d] -"
386 "DCD table exceeds maximum size(%d)\n",
387 name, lineno, max_dcd_entries);
388 exit(EXIT_FAILURE);
389 }
390 }
8a1edd7d
LHR
391 break;
392 default:
393 break;
394 }
395}
396static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name)
8edcde5e
SB
397{
398 FILE *fd = NULL;
399 char *line = NULL;
400 char *token, *saveptr1, *saveptr2;
401 int lineno = 0;
8a1edd7d 402 int fld;
0ad22703 403 size_t len;
8edcde5e 404 int dcd_len = 0;
8edcde5e
SB
405 int32_t cmd;
406
407 fd = fopen(name, "r");
408 if (fd == 0) {
409 fprintf(stderr, "Error: %s - Can't open DCD file\n", name);
410 exit(EXIT_FAILURE);
411 }
412
413 /* Very simple parsing, line starting with # are comments
414 * and are dropped
415 */
416 while ((getline(&line, &len, fd)) > 0) {
417 lineno++;
418
419 token = strtok_r(line, "\r\n", &saveptr1);
420 if (token == NULL)
421 continue;
422
423 /* Check inside the single line */
424 for (fld = CFG_COMMAND, cmd = CMD_INVALID,
425 line = token; ; line = NULL, fld++) {
426 token = strtok_r(line, " \t", &saveptr2);
427 if (token == NULL)
428 break;
429
430 /* Drop all text starting with '#' as comments */
431 if (token[0] == '#')
432 break;
433
8a1edd7d
LHR
434 parse_cfg_fld(imxhdr, &cmd, token, name,
435 lineno, fld, &dcd_len);
8edcde5e
SB
436 }
437
8edcde5e 438 }
8a1edd7d
LHR
439
440 (*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
8edcde5e
SB
441 fclose(fd);
442
8d8cc828 443 /* Exit if there is no BOOT_FROM field specifying the flash_offset */
3150f92c 444 if (imximage_ivt_offset == FLASH_OFFSET_UNDEFINED) {
8d8cc828
TK
445 fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
446 exit(EXIT_FAILURE);
447 }
5b28e913 448 return dcd_len;
8edcde5e
SB
449}
450
8edcde5e 451
8a1edd7d
LHR
452static int imximage_check_image_types(uint8_t type)
453{
454 if (type == IH_TYPE_IMXIMAGE)
455 return EXIT_SUCCESS;
456 else
457 return EXIT_FAILURE;
458}
8edcde5e 459
8a1edd7d
LHR
460static int imximage_verify_header(unsigned char *ptr, int image_size,
461 struct mkimage_params *params)
462{
463 struct imx_header *imx_hdr = (struct imx_header *) ptr;
8edcde5e 464
8a1edd7d
LHR
465 if (detect_imximage_version(imx_hdr) == IMXIMAGE_VER_INVALID)
466 return -FDT_ERR_BADSTRUCTURE;
8edcde5e 467
8a1edd7d
LHR
468 return 0;
469}
8edcde5e 470
8a1edd7d
LHR
471static void imximage_print_header(const void *ptr)
472{
473 struct imx_header *imx_hdr = (struct imx_header *) ptr;
474 uint32_t version = detect_imximage_version(imx_hdr);
475
476 switch (version) {
477 case IMXIMAGE_V1:
478 print_hdr_v1(imx_hdr);
479 break;
480 case IMXIMAGE_V2:
481 print_hdr_v2(imx_hdr);
482 break;
483 default:
484 err_imximage_version(version);
485 break;
486 }
487}
8edcde5e 488
8a1edd7d
LHR
489static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
490 struct mkimage_params *params)
491{
492 struct imx_header *imxhdr = (struct imx_header *)ptr;
493 uint32_t dcd_len;
8edcde5e 494
8a1edd7d
LHR
495 /*
496 * In order to not change the old imx cfg file
497 * by adding VERSION command into it, here need
498 * set up function ptr group to V1 by default.
499 */
500 imximage_version = IMXIMAGE_V1;
49d3e272 501 /* Be able to detect if the cfg file has no BOOT_FROM tag */
3150f92c 502 imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
8a1edd7d 503 set_hdr_func(imxhdr);
8edcde5e 504
8a1edd7d
LHR
505 /* Parse dcd configuration file */
506 dcd_len = parse_cfg_file(imxhdr, params->imagename);
8edcde5e 507
8a1edd7d 508 /* Set the imx header */
3150f92c 509 (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imximage_ivt_offset);
1411fb37
FE
510
511 /*
512 * ROM bug alert
895d9966
MV
513 *
514 * MX53 only loads 512 byte multiples in case of SD boot.
515 * MX53 only loads NAND page multiples in case of NAND boot and
516 * supports up to 4096 byte large pages, thus align to 4096.
517 *
518 * The remaining fraction of a block bytes would not be loaded!
1411fb37 519 */
3150f92c 520 *header_size_ptr = ROUND(sbuf->st_size + imximage_ivt_offset, 4096);
8edcde5e
SB
521}
522
523int imximage_check_params(struct mkimage_params *params)
524{
525 if (!params)
526 return CFG_INVALID;
527 if (!strlen(params->imagename)) {
528 fprintf(stderr, "Error: %s - Configuration file not specified, "
529 "it is needed for imximage generation\n",
530 params->cmdname);
531 return CFG_INVALID;
532 }
533 /*
534 * Check parameters:
535 * XIP is not allowed and verify that incompatible
536 * parameters are not sent at the same time
537 * For example, if list is required a data image must not be provided
538 */
539 return (params->dflag && (params->fflag || params->lflag)) ||
540 (params->fflag && (params->dflag || params->lflag)) ||
541 (params->lflag && (params->dflag || params->fflag)) ||
542 (params->xflag) || !(strlen(params->imagename));
543}
544
545/*
546 * imximage parameters
547 */
548static struct image_type_params imximage_params = {
6e083857 549 .name = "Freescale i.MX Boot Image support",
8edcde5e
SB
550 .header_size = sizeof(struct imx_header),
551 .hdr = (void *)&imximage_header,
552 .check_image_type = imximage_check_image_types,
553 .verify_header = imximage_verify_header,
554 .print_header = imximage_print_header,
555 .set_header = imximage_set_header,
556 .check_params = imximage_check_params,
557};
558
559void init_imx_image_type(void)
560{
561 mkimage_register(&imximage_params);
562}