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CommitLineData
8edcde5e
SB
1/*
2 * (C) Copyright 2009
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
5 * (C) Copyright 2008
6 * Marvell Semiconductor <www.marvell.com>
7 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8 *
3765b3e7 9 * SPDX-License-Identifier: GPL-2.0+
8edcde5e
SB
10 */
11
f86ed6a8 12#include "imagetool.h"
8edcde5e
SB
13#include <image.h>
14#include "imximage.h"
15
0187c985
SB
16#define UNDEFINED 0xFFFFFFFF
17
8edcde5e
SB
18/*
19 * Supported commands for configuration file
20 */
21static table_entry_t imximage_cmds[] = {
8a1edd7d 22 {CMD_BOOT_FROM, "BOOT_FROM", "boot command", },
6cb83829 23 {CMD_BOOT_OFFSET, "BOOT_OFFSET", "Boot offset", },
0b7f7c33
AA
24 {CMD_WRITE_DATA, "DATA", "Reg Write Data", },
25 {CMD_WRITE_CLR_BIT, "CLR_BIT", "Reg clear bit", },
26 {CMD_CHECK_BITS_SET, "CHECK_BITS_SET", "Reg Check bits set", },
27 {CMD_CHECK_BITS_CLR, "CHECK_BITS_CLR", "Reg Check bits clr", },
0187c985 28 {CMD_CSF, "CSF", "Command Sequence File", },
8a1edd7d 29 {CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", },
b55e4f48 30 {CMD_PLUGIN, "PLUGIN", "file plugin_addr", },
8a1edd7d 31 {-1, "", "", },
8edcde5e
SB
32};
33
34/*
35 * Supported Boot options for configuration file
36 * this is needed to set the correct flash offset
37 */
377e367a 38static table_entry_t imximage_boot_offset[] = {
8edcde5e 39 {FLASH_OFFSET_ONENAND, "onenand", "OneNAND Flash",},
bd25864c 40 {FLASH_OFFSET_NAND, "nand", "NAND Flash", },
19b409c0
DB
41 {FLASH_OFFSET_NOR, "nor", "NOR Flash", },
42 {FLASH_OFFSET_SATA, "sata", "SATA Disk", },
bd25864c
DB
43 {FLASH_OFFSET_SD, "sd", "SD Card", },
44 {FLASH_OFFSET_SPI, "spi", "SPI Flash", },
9598f8c3 45 {FLASH_OFFSET_QSPI, "qspi", "QSPI NOR Flash",},
8edcde5e
SB
46 {-1, "", "Invalid", },
47};
48
377e367a
SB
49/*
50 * Supported Boot options for configuration file
51 * this is needed to determine the initial load size
52 */
53static table_entry_t imximage_boot_loadsize[] = {
54 {FLASH_LOADSIZE_ONENAND, "onenand", "OneNAND Flash",},
55 {FLASH_LOADSIZE_NAND, "nand", "NAND Flash", },
56 {FLASH_LOADSIZE_NOR, "nor", "NOR Flash", },
57 {FLASH_LOADSIZE_SATA, "sata", "SATA Disk", },
58 {FLASH_LOADSIZE_SD, "sd", "SD Card", },
59 {FLASH_LOADSIZE_SPI, "spi", "SPI Flash", },
9598f8c3 60 {FLASH_LOADSIZE_QSPI, "qspi", "QSPI NOR Flash",},
377e367a
SB
61 {-1, "", "Invalid", },
62};
63
8a1edd7d
LHR
64/*
65 * IMXIMAGE version definition for i.MX chips
66 */
67static table_entry_t imximage_versions[] = {
68 {IMXIMAGE_V1, "", " (i.MX25/35/51 compatible)", },
0b7f7c33 69 {IMXIMAGE_V2, "", " (i.MX53/6/7 compatible)", },
8a1edd7d
LHR
70 {-1, "", " (Invalid)", },
71};
8edcde5e
SB
72
73static struct imx_header imximage_header;
8a1edd7d 74static uint32_t imximage_version;
0187c985
SB
75/*
76 * Image Vector Table Offset
77 * Initialized to a wrong not 4-bytes aligned address to
78 * check if it is was set by the cfg file.
79 */
80static uint32_t imximage_ivt_offset = UNDEFINED;
81static uint32_t imximage_csf_size = UNDEFINED;
377e367a
SB
82/* Initial Load Region Size */
83static uint32_t imximage_init_loadsize;
b55e4f48
PF
84static uint32_t imximage_iram_free_start;
85static uint32_t imximage_plugin_size;
86static uint32_t plugin_image;
8a1edd7d
LHR
87
88static set_dcd_val_t set_dcd_val;
0b7f7c33 89static set_dcd_param_t set_dcd_param;
8a1edd7d
LHR
90static set_dcd_rst_t set_dcd_rst;
91static set_imx_hdr_t set_imx_hdr;
4d5fa985 92static uint32_t max_dcd_entries;
24331982 93static uint32_t *header_size_ptr;
0187c985 94static uint32_t *csf_ptr;
8edcde5e
SB
95
96static uint32_t get_cfg_value(char *token, char *name, int linenr)
97{
98 char *endptr;
99 uint32_t value;
100
101 errno = 0;
102 value = strtoul(token, &endptr, 16);
103 if (errno || (token == endptr)) {
104 fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n",
105 name, linenr, token);
106 exit(EXIT_FAILURE);
107 }
108 return value;
109}
110
8a1edd7d 111static uint32_t detect_imximage_version(struct imx_header *imx_hdr)
8edcde5e 112{
8a1edd7d
LHR
113 imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
114 imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
115 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
116 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
117
118 /* Try to detect V1 */
119 if ((fhdr_v1->app_code_barker == APP_CODE_BARKER) &&
120 (hdr_v1->dcd_table.preamble.barker == DCD_BARKER))
121 return IMXIMAGE_V1;
122
123 /* Try to detect V2 */
124 if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
b55e4f48
PF
125 (hdr_v2->data.dcd_table.header.tag == DCD_HEADER_TAG))
126 return IMXIMAGE_V2;
127
128 if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
129 hdr_v2->boot_data.plugin)
8a1edd7d
LHR
130 return IMXIMAGE_V2;
131
132 return IMXIMAGE_VER_INVALID;
8edcde5e
SB
133}
134
8a1edd7d 135static void err_imximage_version(int version)
8edcde5e 136{
8a1edd7d
LHR
137 fprintf(stderr,
138 "Error: Unsupported imximage version:%d\n", version);
8edcde5e 139
8a1edd7d
LHR
140 exit(EXIT_FAILURE);
141}
8edcde5e 142
8a1edd7d
LHR
143static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno,
144 int fld, uint32_t value, uint32_t off)
145{
146 dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
147
148 switch (fld) {
149 case CFG_REG_SIZE:
150 /* Byte, halfword, word */
151 if ((value != 1) && (value != 2) && (value != 4)) {
152 fprintf(stderr, "Error: %s[%d] - "
153 "Invalid register size " "(%d)\n",
154 name, lineno, value);
155 exit(EXIT_FAILURE);
156 }
157 dcd_v1->addr_data[off].type = value;
158 break;
159 case CFG_REG_ADDRESS:
160 dcd_v1->addr_data[off].addr = value;
161 break;
162 case CFG_REG_VALUE:
163 dcd_v1->addr_data[off].value = value;
164 break;
165 default:
166 break;
8edcde5e 167
8a1edd7d
LHR
168 }
169}
8edcde5e 170
61903b75
TK
171static struct dcd_v2_cmd *gd_last_cmd;
172
0b7f7c33
AA
173static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
174 int32_t cmd)
175{
b55e4f48 176 dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
61903b75
TK
177 struct dcd_v2_cmd *d = gd_last_cmd;
178 struct dcd_v2_cmd *d2;
179 int len;
180
181 if (!d)
182 d = &dcd_v2->dcd_cmd;
183 d2 = d;
184 len = be16_to_cpu(d->write_dcd_command.length);
185 if (len > 4)
186 d2 = (struct dcd_v2_cmd *)(((char *)d) + len);
0b7f7c33
AA
187
188 switch (cmd) {
189 case CMD_WRITE_DATA:
61903b75
TK
190 if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
191 (d->write_dcd_command.param == DCD_WRITE_DATA_PARAM))
192 break;
193 d = d2;
194 d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
195 d->write_dcd_command.length = cpu_to_be16(4);
196 d->write_dcd_command.param = DCD_WRITE_DATA_PARAM;
0b7f7c33
AA
197 break;
198 case CMD_WRITE_CLR_BIT:
61903b75
TK
199 if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
200 (d->write_dcd_command.param == DCD_WRITE_CLR_BIT_PARAM))
201 break;
202 d = d2;
203 d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
204 d->write_dcd_command.length = cpu_to_be16(4);
205 d->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM;
0b7f7c33
AA
206 break;
207 /*
208 * Check data command only supports one entry,
0b7f7c33
AA
209 */
210 case CMD_CHECK_BITS_SET:
61903b75
TK
211 d = d2;
212 d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
213 d->write_dcd_command.length = cpu_to_be16(4);
214 d->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM;
0b7f7c33
AA
215 break;
216 case CMD_CHECK_BITS_CLR:
61903b75
TK
217 d = d2;
218 d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
219 d->write_dcd_command.length = cpu_to_be16(4);
0782a880 220 d->write_dcd_command.param = DCD_CHECK_BITS_CLR_PARAM;
0b7f7c33
AA
221 break;
222 default:
223 break;
224 }
61903b75 225 gd_last_cmd = d;
0b7f7c33
AA
226}
227
8a1edd7d
LHR
228static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno,
229 int fld, uint32_t value, uint32_t off)
230{
61903b75
TK
231 struct dcd_v2_cmd *d = gd_last_cmd;
232 int len;
233
234 len = be16_to_cpu(d->write_dcd_command.length);
235 off = (len - 4) >> 3;
8a1edd7d
LHR
236
237 switch (fld) {
238 case CFG_REG_ADDRESS:
61903b75 239 d->addr_data[off].addr = cpu_to_be32(value);
8a1edd7d
LHR
240 break;
241 case CFG_REG_VALUE:
61903b75
TK
242 d->addr_data[off].value = cpu_to_be32(value);
243 off++;
244 d->write_dcd_command.length = cpu_to_be16((off << 3) + 4);
8a1edd7d
LHR
245 break;
246 default:
247 break;
248
249 }
8edcde5e
SB
250}
251
8a1edd7d
LHR
252/*
253 * Complete setting up the rest field of DCD of V1
254 * such as barker code and DCD data length.
255 */
256static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len,
257 char *name, int lineno)
8edcde5e 258{
8a1edd7d
LHR
259 dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
260
8a1edd7d
LHR
261 dcd_v1->preamble.barker = DCD_BARKER;
262 dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t);
263}
264
265/*
266 * Complete setting up the reset field of DCD of V2
267 * such as DCD tag, version, length, etc.
268 */
269static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
270 char *name, int lineno)
271{
b55e4f48
PF
272 if (!imxhdr->header.hdr_v2.boot_data.plugin) {
273 dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
274 struct dcd_v2_cmd *d = gd_last_cmd;
275 int len;
276
277 if (!d)
278 d = &dcd_v2->dcd_cmd;
279 len = be16_to_cpu(d->write_dcd_command.length);
280 if (len > 4)
281 d = (struct dcd_v2_cmd *)(((char *)d) + len);
282
283 len = (char *)d - (char *)&dcd_v2->header;
284
285 dcd_v2->header.tag = DCD_HEADER_TAG;
286 dcd_v2->header.length = cpu_to_be16(len);
287 dcd_v2->header.version = DCD_VERSION;
288 }
8a1edd7d
LHR
289}
290
291static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
ad0826dc 292 uint32_t entry_point, uint32_t flash_offset)
8a1edd7d
LHR
293{
294 imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1;
295 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
296 dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
ab857f26 297 uint32_t hdr_base;
24331982
TK
298 uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr)
299 - ((char *)imxhdr));
8a1edd7d 300
8a1edd7d
LHR
301 /* Set magic number */
302 fhdr_v1->app_code_barker = APP_CODE_BARKER;
303
377e367a
SB
304 /* TODO: check i.MX image V1 handling, for now use 'old' style */
305 hdr_base = entry_point - 4096;
ab857f26 306 fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
ad0826dc 307 fhdr_v1->app_code_jump_vector = entry_point;
8a1edd7d 308
ab857f26
TK
309 fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr);
310 fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
8a1edd7d 311
8a1edd7d
LHR
312 /* Security feature are not supported */
313 fhdr_v1->app_code_csf = 0;
314 fhdr_v1->super_root_key = 0;
24331982 315 header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
8a1edd7d
LHR
316}
317
318static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
ad0826dc 319 uint32_t entry_point, uint32_t flash_offset)
8a1edd7d
LHR
320{
321 imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
322 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
ab857f26 323 uint32_t hdr_base;
8a1edd7d 324
8a1edd7d
LHR
325 /* Set magic number */
326 fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
327 fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
328 fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
329
b55e4f48
PF
330 if (!hdr_v2->boot_data.plugin) {
331 fhdr_v2->entry = entry_point;
332 fhdr_v2->reserved1 = 0;
333 fhdr_v2->reserved1 = 0;
334 hdr_base = entry_point - imximage_init_loadsize +
335 flash_offset;
336 fhdr_v2->self = hdr_base;
337 if (dcd_len > 0)
338 fhdr_v2->dcd_ptr = hdr_base +
339 offsetof(imx_header_v2_t, data);
340 else
341 fhdr_v2->dcd_ptr = 0;
342 fhdr_v2->boot_data_ptr = hdr_base
343 + offsetof(imx_header_v2_t, boot_data);
344 hdr_v2->boot_data.start = entry_point - imximage_init_loadsize;
345
346 fhdr_v2->csf = 0;
347
348 header_size_ptr = &hdr_v2->boot_data.size;
349 csf_ptr = &fhdr_v2->csf;
350 } else {
351 imx_header_v2_t *next_hdr_v2;
352 flash_header_v2_t *next_fhdr_v2;
353
354 if (imximage_csf_size != 0) {
355 fprintf(stderr, "Error: Header v2: SECURE_BOOT is only supported in DCD mode!");
356 exit(EXIT_FAILURE);
357 }
358
359 fhdr_v2->entry = imximage_iram_free_start +
360 flash_offset + sizeof(flash_header_v2_t) +
361 sizeof(boot_data_t);
362
363 fhdr_v2->reserved1 = 0;
364 fhdr_v2->reserved2 = 0;
365 fhdr_v2->self = imximage_iram_free_start + flash_offset;
366
b893c989 367 fhdr_v2->dcd_ptr = 0;
8a1edd7d 368
b55e4f48
PF
369 fhdr_v2->boot_data_ptr = fhdr_v2->self +
370 offsetof(imx_header_v2_t, boot_data);
371
372 hdr_v2->boot_data.start = imximage_iram_free_start;
373 /*
374 * The actural size of plugin image is "imximage_plugin_size +
375 * sizeof(flash_header_v2_t) + sizeof(boot_data_t)", plus the
376 * flash_offset space.The ROM code only need to copy this size
377 * to run the plugin code. However, later when copy the whole
378 * U-Boot image to DDR, the ROM code use memcpy to copy the
379 * first part of the image, and use the storage read function
380 * to get the remaining part. This requires the dividing point
381 * must be multiple of storage sector size. Here we set the
382 * first section to be MAX_PLUGIN_CODE_SIZE(64KB) for this
383 * purpose.
384 */
385 hdr_v2->boot_data.size = MAX_PLUGIN_CODE_SIZE;
386
387 /* Security feature are not supported */
388 fhdr_v2->csf = 0;
389
390 next_hdr_v2 = (imx_header_v2_t *)((char *)hdr_v2 +
391 imximage_plugin_size);
392
393 next_fhdr_v2 = &next_hdr_v2->fhdr;
394
395 next_fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
396 next_fhdr_v2->header.length =
397 cpu_to_be16(sizeof(flash_header_v2_t));
398 next_fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
399
400 next_fhdr_v2->entry = entry_point;
401 hdr_base = entry_point - sizeof(struct imx_header);
402 next_fhdr_v2->reserved1 = 0;
403 next_fhdr_v2->reserved2 = 0;
404 next_fhdr_v2->self = hdr_base + imximage_plugin_size;
405
406 next_fhdr_v2->dcd_ptr = 0;
407 next_fhdr_v2->boot_data_ptr = next_fhdr_v2->self +
408 offsetof(imx_header_v2_t, boot_data);
409
410 next_hdr_v2->boot_data.start = hdr_base - flash_offset;
411
412 header_size_ptr = &next_hdr_v2->boot_data.size;
0187c985 413
b55e4f48
PF
414 next_hdr_v2->boot_data.plugin = 0;
415
416 next_fhdr_v2->csf = 0;
417 }
8a1edd7d
LHR
418}
419
72048bc3 420static void set_hdr_func(void)
8a1edd7d
LHR
421{
422 switch (imximage_version) {
423 case IMXIMAGE_V1:
424 set_dcd_val = set_dcd_val_v1;
0b7f7c33 425 set_dcd_param = NULL;
8a1edd7d
LHR
426 set_dcd_rst = set_dcd_rst_v1;
427 set_imx_hdr = set_imx_hdr_v1;
4d5fa985 428 max_dcd_entries = MAX_HW_CFG_SIZE_V1;
8a1edd7d
LHR
429 break;
430 case IMXIMAGE_V2:
61903b75 431 gd_last_cmd = NULL;
8a1edd7d 432 set_dcd_val = set_dcd_val_v2;
0b7f7c33 433 set_dcd_param = set_dcd_param_v2;
8a1edd7d
LHR
434 set_dcd_rst = set_dcd_rst_v2;
435 set_imx_hdr = set_imx_hdr_v2;
4d5fa985 436 max_dcd_entries = MAX_HW_CFG_SIZE_V2;
8a1edd7d
LHR
437 break;
438 default:
439 err_imximage_version(imximage_version);
440 break;
441 }
442}
8edcde5e 443
8a1edd7d
LHR
444static void print_hdr_v1(struct imx_header *imx_hdr)
445{
446 imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
447 flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
448 dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
449 uint32_t size, length, ver;
450
451 size = dcd_v1->preamble.length;
452 if (size > (MAX_HW_CFG_SIZE_V1 * sizeof(dcd_type_addr_data_t))) {
8edcde5e
SB
453 fprintf(stderr,
454 "Error: Image corrupt DCD size %d exceed maximum %d\n",
5b28e913 455 (uint32_t)(size / sizeof(dcd_type_addr_data_t)),
8a1edd7d
LHR
456 MAX_HW_CFG_SIZE_V1);
457 exit(EXIT_FAILURE);
458 }
459
460 length = dcd_v1->preamble.length / sizeof(dcd_type_addr_data_t);
461 ver = detect_imximage_version(imx_hdr);
462
463 printf("Image Type: Freescale IMX Boot Image\n");
464 printf("Image Ver: %x", ver);
465 printf("%s\n", get_table_entry_name(imximage_versions, NULL, ver));
466 printf("Data Size: ");
467 genimg_print_size(dcd_v1->addr_data[length].type);
468 printf("Load Address: %08x\n", (uint32_t)fhdr_v1->app_dest_ptr);
469 printf("Entry Point: %08x\n", (uint32_t)fhdr_v1->app_code_jump_vector);
470}
471
472static void print_hdr_v2(struct imx_header *imx_hdr)
473{
474 imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
475 flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
b55e4f48
PF
476 dcd_v2_t *dcd_v2 = &hdr_v2->data.dcd_table;
477 uint32_t size, version, plugin;
8a1edd7d 478
b55e4f48
PF
479 plugin = hdr_v2->boot_data.plugin;
480 if (!plugin) {
481 size = be16_to_cpu(dcd_v2->header.length);
482 if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) {
483 fprintf(stderr,
484 "Error: Image corrupt DCD size %d exceed maximum %d\n",
485 (uint32_t)(size / sizeof(dcd_addr_data_t)),
486 MAX_HW_CFG_SIZE_V2);
487 exit(EXIT_FAILURE);
488 }
8edcde5e
SB
489 }
490
8a1edd7d 491 version = detect_imximage_version(imx_hdr);
8edcde5e
SB
492
493 printf("Image Type: Freescale IMX Boot Image\n");
8a1edd7d
LHR
494 printf("Image Ver: %x", version);
495 printf("%s\n", get_table_entry_name(imximage_versions, NULL, version));
b55e4f48
PF
496 printf("Mode: %s\n", plugin ? "PLUGIN" : "DCD");
497 if (!plugin) {
498 printf("Data Size: ");
499 genimg_print_size(hdr_v2->boot_data.size);
500 printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr);
501 printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
502 if (fhdr_v2->csf && (imximage_ivt_offset != UNDEFINED) &&
503 (imximage_csf_size != UNDEFINED)) {
504 printf("HAB Blocks: %08x %08x %08x\n",
505 (uint32_t)fhdr_v2->self, 0,
506 hdr_v2->boot_data.size - imximage_ivt_offset -
507 imximage_csf_size);
508 }
509 } else {
510 imx_header_v2_t *next_hdr_v2;
511 flash_header_v2_t *next_fhdr_v2;
512
513 /*First Header*/
514 printf("Plugin Data Size: ");
515 genimg_print_size(hdr_v2->boot_data.size);
516 printf("Plugin Code Size: ");
517 genimg_print_size(imximage_plugin_size);
518 printf("Plugin Load Address: %08x\n", hdr_v2->boot_data.start);
519 printf("Plugin Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
520
521 /*Second Header*/
522 next_hdr_v2 = (imx_header_v2_t *)((char *)hdr_v2 +
523 imximage_plugin_size);
524 next_fhdr_v2 = &next_hdr_v2->fhdr;
525 printf("U-Boot Data Size: ");
526 genimg_print_size(next_hdr_v2->boot_data.size);
527 printf("U-Boot Load Address: %08x\n",
528 next_hdr_v2->boot_data.start);
529 printf("U-Boot Entry Point: %08x\n",
530 (uint32_t)next_fhdr_v2->entry);
0187c985 531 }
8edcde5e
SB
532}
533
b55e4f48
PF
534static void copy_plugin_code(struct imx_header *imxhdr, char *plugin_file)
535{
536 int ifd = -1;
537 struct stat sbuf;
538 char *plugin_buf = imxhdr->header.hdr_v2.data.plugin_code;
539 char *ptr;
540
541 ifd = open(plugin_file, O_RDONLY|O_BINARY);
542 if (fstat(ifd, &sbuf) < 0) {
543 fprintf(stderr, "Can't stat %s: %s\n",
544 plugin_file,
545 strerror(errno));
546 exit(EXIT_FAILURE);
547 }
548
549 ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, ifd, 0);
550 if (ptr == MAP_FAILED) {
551 fprintf(stderr, "Can't read %s: %s\n",
552 plugin_file,
553 strerror(errno));
554 exit(EXIT_FAILURE);
555 }
556
557 if (sbuf.st_size > MAX_PLUGIN_CODE_SIZE) {
558 printf("plugin binary size too large\n");
559 exit(EXIT_FAILURE);
560 }
561
562 memcpy(plugin_buf, ptr, sbuf.st_size);
563 imximage_plugin_size = sbuf.st_size;
564
565 (void) munmap((void *)ptr, sbuf.st_size);
566 (void) close(ifd);
567
568 imxhdr->header.hdr_v2.boot_data.plugin = 1;
569}
570
8a1edd7d
LHR
571static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,
572 char *name, int lineno, int fld, int dcd_len)
573{
574 int value;
575 static int cmd_ver_first = ~0;
576
577 switch (cmd) {
578 case CMD_IMAGE_VERSION:
579 imximage_version = get_cfg_value(token, name, lineno);
580 if (cmd_ver_first == 0) {
581 fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION "
582 "command need be the first before other "
583 "valid command in the file\n", name, lineno);
584 exit(EXIT_FAILURE);
585 }
586 cmd_ver_first = 1;
72048bc3 587 set_hdr_func();
8a1edd7d
LHR
588 break;
589 case CMD_BOOT_FROM:
377e367a 590 imximage_ivt_offset = get_table_entry_id(imximage_boot_offset,
8a1edd7d 591 "imximage boot option", token);
3150f92c 592 if (imximage_ivt_offset == -1) {
8a1edd7d
LHR
593 fprintf(stderr, "Error: %s[%d] -Invalid boot device"
594 "(%s)\n", name, lineno, token);
595 exit(EXIT_FAILURE);
596 }
377e367a
SB
597
598 imximage_init_loadsize =
599 get_table_entry_id(imximage_boot_loadsize,
600 "imximage boot option", token);
601
602 if (imximage_init_loadsize == -1) {
603 fprintf(stderr,
604 "Error: %s[%d] -Invalid boot device(%s)\n",
605 name, lineno, token);
606 exit(EXIT_FAILURE);
607 }
01390aff
SB
608
609 /*
610 * The SOC loads from the storage starting at address 0
611 * then ensures that the load size contains the offset
612 */
613 if (imximage_init_loadsize < imximage_ivt_offset)
614 imximage_init_loadsize = imximage_ivt_offset;
8a1edd7d
LHR
615 if (unlikely(cmd_ver_first != 1))
616 cmd_ver_first = 0;
617 break;
6cb83829 618 case CMD_BOOT_OFFSET:
3150f92c 619 imximage_ivt_offset = get_cfg_value(token, name, lineno);
6cb83829
MV
620 if (unlikely(cmd_ver_first != 1))
621 cmd_ver_first = 0;
622 break;
0b7f7c33
AA
623 case CMD_WRITE_DATA:
624 case CMD_WRITE_CLR_BIT:
625 case CMD_CHECK_BITS_SET:
626 case CMD_CHECK_BITS_CLR:
8a1edd7d 627 value = get_cfg_value(token, name, lineno);
0b7f7c33
AA
628 if (set_dcd_param)
629 (*set_dcd_param)(imxhdr, dcd_len, cmd);
8a1edd7d
LHR
630 (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len);
631 if (unlikely(cmd_ver_first != 1))
632 cmd_ver_first = 0;
633 break;
0187c985
SB
634 case CMD_CSF:
635 if (imximage_version != 2) {
636 fprintf(stderr,
637 "Error: %s[%d] - CSF only supported for VERSION 2(%s)\n",
638 name, lineno, token);
639 exit(EXIT_FAILURE);
640 }
641 imximage_csf_size = get_cfg_value(token, name, lineno);
642 if (unlikely(cmd_ver_first != 1))
643 cmd_ver_first = 0;
644 break;
b55e4f48
PF
645 case CMD_PLUGIN:
646 plugin_image = 1;
647 copy_plugin_code(imxhdr, token);
648 break;
8a1edd7d
LHR
649 }
650}
651
652static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd,
653 char *token, char *name, int lineno, int fld, int *dcd_len)
654{
655 int value;
656
657 switch (fld) {
658 case CFG_COMMAND:
659 *cmd = get_table_entry_id(imximage_cmds,
660 "imximage commands", token);
661 if (*cmd < 0) {
662 fprintf(stderr, "Error: %s[%d] - Invalid command"
663 "(%s)\n", name, lineno, token);
664 exit(EXIT_FAILURE);
665 }
666 break;
667 case CFG_REG_SIZE:
668 parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len);
669 break;
670 case CFG_REG_ADDRESS:
671 case CFG_REG_VALUE:
0b7f7c33
AA
672 switch(*cmd) {
673 case CMD_WRITE_DATA:
674 case CMD_WRITE_CLR_BIT:
675 case CMD_CHECK_BITS_SET:
676 case CMD_CHECK_BITS_CLR:
677
678 value = get_cfg_value(token, name, lineno);
679 if (set_dcd_param)
680 (*set_dcd_param)(imxhdr, *dcd_len, *cmd);
681 (*set_dcd_val)(imxhdr, name, lineno, fld, value,
682 *dcd_len);
683
684 if (fld == CFG_REG_VALUE) {
685 (*dcd_len)++;
686 if (*dcd_len > max_dcd_entries) {
687 fprintf(stderr, "Error: %s[%d] -"
688 "DCD table exceeds maximum size(%d)\n",
689 name, lineno, max_dcd_entries);
690 exit(EXIT_FAILURE);
691 }
4d5fa985 692 }
0b7f7c33 693 break;
b55e4f48
PF
694 case CMD_PLUGIN:
695 value = get_cfg_value(token, name, lineno);
696 imximage_iram_free_start = value;
697 break;
0b7f7c33
AA
698 default:
699 break;
4d5fa985 700 }
8a1edd7d
LHR
701 break;
702 default:
703 break;
704 }
705}
706static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name)
8edcde5e
SB
707{
708 FILE *fd = NULL;
709 char *line = NULL;
710 char *token, *saveptr1, *saveptr2;
711 int lineno = 0;
8a1edd7d 712 int fld;
0ad22703 713 size_t len;
8edcde5e 714 int dcd_len = 0;
8edcde5e
SB
715 int32_t cmd;
716
717 fd = fopen(name, "r");
718 if (fd == 0) {
719 fprintf(stderr, "Error: %s - Can't open DCD file\n", name);
720 exit(EXIT_FAILURE);
721 }
722
01390aff
SB
723 /*
724 * Very simple parsing, line starting with # are comments
8edcde5e
SB
725 * and are dropped
726 */
727 while ((getline(&line, &len, fd)) > 0) {
728 lineno++;
729
730 token = strtok_r(line, "\r\n", &saveptr1);
731 if (token == NULL)
732 continue;
733
734 /* Check inside the single line */
735 for (fld = CFG_COMMAND, cmd = CMD_INVALID,
736 line = token; ; line = NULL, fld++) {
737 token = strtok_r(line, " \t", &saveptr2);
738 if (token == NULL)
739 break;
740
741 /* Drop all text starting with '#' as comments */
742 if (token[0] == '#')
743 break;
744
8a1edd7d
LHR
745 parse_cfg_fld(imxhdr, &cmd, token, name,
746 lineno, fld, &dcd_len);
8edcde5e
SB
747 }
748
8edcde5e 749 }
8a1edd7d
LHR
750
751 (*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
8edcde5e
SB
752 fclose(fd);
753
8d8cc828 754 /* Exit if there is no BOOT_FROM field specifying the flash_offset */
3150f92c 755 if (imximage_ivt_offset == FLASH_OFFSET_UNDEFINED) {
8d8cc828
TK
756 fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
757 exit(EXIT_FAILURE);
758 }
5b28e913 759 return dcd_len;
8edcde5e
SB
760}
761
8edcde5e 762
8a1edd7d
LHR
763static int imximage_check_image_types(uint8_t type)
764{
765 if (type == IH_TYPE_IMXIMAGE)
766 return EXIT_SUCCESS;
767 else
768 return EXIT_FAILURE;
769}
8edcde5e 770
8a1edd7d 771static int imximage_verify_header(unsigned char *ptr, int image_size,
f86ed6a8 772 struct image_tool_params *params)
8a1edd7d
LHR
773{
774 struct imx_header *imx_hdr = (struct imx_header *) ptr;
8edcde5e 775
8a1edd7d
LHR
776 if (detect_imximage_version(imx_hdr) == IMXIMAGE_VER_INVALID)
777 return -FDT_ERR_BADSTRUCTURE;
8edcde5e 778
8a1edd7d
LHR
779 return 0;
780}
8edcde5e 781
8a1edd7d
LHR
782static void imximage_print_header(const void *ptr)
783{
784 struct imx_header *imx_hdr = (struct imx_header *) ptr;
785 uint32_t version = detect_imximage_version(imx_hdr);
786
787 switch (version) {
788 case IMXIMAGE_V1:
789 print_hdr_v1(imx_hdr);
790 break;
791 case IMXIMAGE_V2:
792 print_hdr_v2(imx_hdr);
793 break;
794 default:
795 err_imximage_version(version);
796 break;
797 }
798}
8edcde5e 799
8a1edd7d 800static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
f86ed6a8 801 struct image_tool_params *params)
8a1edd7d
LHR
802{
803 struct imx_header *imxhdr = (struct imx_header *)ptr;
804 uint32_t dcd_len;
b55e4f48 805 uint32_t header_size;
8edcde5e 806
8a1edd7d
LHR
807 /*
808 * In order to not change the old imx cfg file
809 * by adding VERSION command into it, here need
810 * set up function ptr group to V1 by default.
811 */
812 imximage_version = IMXIMAGE_V1;
49d3e272 813 /* Be able to detect if the cfg file has no BOOT_FROM tag */
3150f92c 814 imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
0187c985 815 imximage_csf_size = 0;
72048bc3 816 set_hdr_func();
8edcde5e 817
8a1edd7d
LHR
818 /* Parse dcd configuration file */
819 dcd_len = parse_cfg_file(imxhdr, params->imagename);
8edcde5e 820
03ea24b2 821 if (imximage_version == IMXIMAGE_V2) {
b55e4f48
PF
822 header_size = sizeof(flash_header_v2_t) + sizeof(boot_data_t);
823 if (!plugin_image)
824 header_size += sizeof(dcd_v2_t);
825 else
826 header_size += MAX_PLUGIN_CODE_SIZE;
827
828 if (imximage_init_loadsize < imximage_ivt_offset + header_size)
03ea24b2 829 imximage_init_loadsize = imximage_ivt_offset +
b55e4f48 830 header_size;
03ea24b2
YL
831 }
832
8a1edd7d 833 /* Set the imx header */
3150f92c 834 (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imximage_ivt_offset);
1411fb37
FE
835
836 /*
837 * ROM bug alert
895d9966
MV
838 *
839 * MX53 only loads 512 byte multiples in case of SD boot.
840 * MX53 only loads NAND page multiples in case of NAND boot and
841 * supports up to 4096 byte large pages, thus align to 4096.
842 *
843 * The remaining fraction of a block bytes would not be loaded!
1411fb37 844 */
de979804 845 *header_size_ptr = ROUND((sbuf->st_size + imximage_ivt_offset), 4096);
0187c985
SB
846
847 if (csf_ptr && imximage_csf_size) {
848 *csf_ptr = params->ep - imximage_init_loadsize +
849 *header_size_ptr;
850 *header_size_ptr += imximage_csf_size;
851 }
8edcde5e
SB
852}
853
f86ed6a8 854int imximage_check_params(struct image_tool_params *params)
8edcde5e
SB
855{
856 if (!params)
857 return CFG_INVALID;
858 if (!strlen(params->imagename)) {
859 fprintf(stderr, "Error: %s - Configuration file not specified, "
860 "it is needed for imximage generation\n",
861 params->cmdname);
862 return CFG_INVALID;
863 }
864 /*
865 * Check parameters:
866 * XIP is not allowed and verify that incompatible
867 * parameters are not sent at the same time
868 * For example, if list is required a data image must not be provided
869 */
870 return (params->dflag && (params->fflag || params->lflag)) ||
871 (params->fflag && (params->dflag || params->lflag)) ||
872 (params->lflag && (params->dflag || params->fflag)) ||
873 (params->xflag) || !(strlen(params->imagename));
874}
875
f86ed6a8 876static int imximage_generate(struct image_tool_params *params,
01390aff
SB
877 struct image_type_params *tparams)
878{
879 struct imx_header *imxhdr;
880 size_t alloc_len;
881 struct stat sbuf;
882 char *datafile = params->datafile;
b55e4f48 883 uint32_t pad_len, header_size;
01390aff
SB
884
885 memset(&imximage_header, 0, sizeof(imximage_header));
886
887 /*
888 * In order to not change the old imx cfg file
889 * by adding VERSION command into it, here need
890 * set up function ptr group to V1 by default.
891 */
892 imximage_version = IMXIMAGE_V1;
893 /* Be able to detect if the cfg file has no BOOT_FROM tag */
894 imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
895 imximage_csf_size = 0;
72048bc3 896 set_hdr_func();
01390aff
SB
897
898 /* Parse dcd configuration file */
899 parse_cfg_file(&imximage_header, params->imagename);
900
901 /* TODO: check i.MX image V1 handling, for now use 'old' style */
902 if (imximage_version == IMXIMAGE_V1) {
903 alloc_len = 4096;
b55e4f48 904 header_size = 4096;
01390aff 905 } else {
b55e4f48
PF
906 header_size = sizeof(flash_header_v2_t) + sizeof(boot_data_t);
907 if (!plugin_image)
908 header_size += sizeof(dcd_v2_t);
909 else
910 header_size += MAX_PLUGIN_CODE_SIZE;
911
912 if (imximage_init_loadsize < imximage_ivt_offset + header_size)
01390aff 913 imximage_init_loadsize = imximage_ivt_offset +
b55e4f48 914 header_size;
01390aff
SB
915 alloc_len = imximage_init_loadsize - imximage_ivt_offset;
916 }
917
b55e4f48 918 if (alloc_len < header_size) {
01390aff
SB
919 fprintf(stderr, "%s: header error\n",
920 params->cmdname);
921 exit(EXIT_FAILURE);
922 }
923
924 imxhdr = malloc(alloc_len);
925
926 if (!imxhdr) {
927 fprintf(stderr, "%s: malloc return failure: %s\n",
928 params->cmdname, strerror(errno));
929 exit(EXIT_FAILURE);
930 }
931
932 memset(imxhdr, 0, alloc_len);
933
934 tparams->header_size = alloc_len;
935 tparams->hdr = imxhdr;
936
937 /* determine data image file length */
938
939 if (stat(datafile, &sbuf) < 0) {
940 fprintf(stderr, "%s: Can't stat %s: %s\n",
941 params->cmdname, datafile, strerror(errno));
942 exit(EXIT_FAILURE);
943 }
944
945 pad_len = ROUND(sbuf.st_size, 4096) - sbuf.st_size;
946
947 /* TODO: check i.MX image V1 handling, for now use 'old' style */
948 if (imximage_version == IMXIMAGE_V1)
949 return 0;
950 else
951 return pad_len;
952}
953
954
8edcde5e
SB
955/*
956 * imximage parameters
957 */
a93648d1
GMF
958U_BOOT_IMAGE_TYPE(
959 imximage,
960 "Freescale i.MX Boot Image support",
961 0,
962 NULL,
963 imximage_check_params,
964 imximage_verify_header,
965 imximage_print_header,
966 imximage_set_header,
967 NULL,
968 imximage_check_image_types,
969 NULL,
970 imximage_generate
971);