[people/ms/u-boot.git] / tools / imximage.h

/*
 * (C) Copyright 2009
 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef _IMXIMAGE_H_
#define _IMXIMAGE_H_

#define MAX_HW_CFG_SIZE_V2 121 /* Max number of registers imx can set for v2 */
#define MAX_HW_CFG_SIZE_V1 60  /* Max number of registers imx can set for v1 */
#define APP_CODE_BARKER	0xB1
#define DCD_BARKER	0xB17219E9

#define HEADER_OFFSET	0x400

#define CMD_DATA_STR	"DATA"
#define FLASH_OFFSET_UNDEFINED	0xFFFFFFFF
#define FLASH_OFFSET_STANDARD	0x400
#define FLASH_OFFSET_NAND	FLASH_OFFSET_STANDARD
#define FLASH_OFFSET_SD		FLASH_OFFSET_STANDARD
#define FLASH_OFFSET_SPI	FLASH_OFFSET_STANDARD
#define FLASH_OFFSET_ONENAND	0x100
#define FLASH_OFFSET_NOR	0x1000
#define FLASH_OFFSET_SATA	FLASH_OFFSET_STANDARD

#define IVT_HEADER_TAG 0xD1
#define IVT_VERSION 0x40
#define DCD_HEADER_TAG 0xD2
#define DCD_COMMAND_TAG 0xCC
#define DCD_VERSION 0x40
#define DCD_COMMAND_PARAM 0x4

enum imximage_cmd {
	CMD_INVALID,
	CMD_IMAGE_VERSION,
	CMD_BOOT_FROM,
	CMD_DATA
};

enum imximage_fld_types {
	CFG_INVALID = -1,
	CFG_COMMAND,
	CFG_REG_SIZE,
	CFG_REG_ADDRESS,
	CFG_REG_VALUE
};

enum imximage_version {
	IMXIMAGE_VER_INVALID = -1,
	IMXIMAGE_V1 = 1,
	IMXIMAGE_V2
};

typedef struct {
	uint32_t type; /* Type of pointer (byte, halfword, word, wait/read) */
	uint32_t addr; /* Address to write to */
	uint32_t value; /* Data to write */
} dcd_type_addr_data_t;

typedef struct {
	uint32_t barker; /* Barker for sanity check */
	uint32_t length; /* Device configuration length (without preamble) */
} dcd_preamble_t;

typedef struct {
	dcd_preamble_t preamble;
	dcd_type_addr_data_t addr_data[MAX_HW_CFG_SIZE_V1];
} dcd_v1_t;

typedef struct {
	uint32_t app_code_jump_vector;
	uint32_t app_code_barker;
	uint32_t app_code_csf;
	uint32_t dcd_ptr_ptr;
	uint32_t super_root_key;
	uint32_t dcd_ptr;
	uint32_t app_dest_ptr;
} flash_header_v1_t;

typedef struct {
	uint32_t length; 	/* Length of data to be read from flash */
} flash_cfg_parms_t;

typedef struct {
	flash_header_v1_t fhdr;
	dcd_v1_t dcd_table;
	flash_cfg_parms_t ext_header;
} imx_header_v1_t;

typedef struct {
	uint32_t addr;
	uint32_t value;
} dcd_addr_data_t;

typedef struct {
	uint8_t tag;
	uint16_t length;
	uint8_t version;
} __attribute__((packed)) ivt_header_t;

typedef struct {
	uint8_t tag;
	uint16_t length;
	uint8_t param;
} __attribute__((packed)) write_dcd_command_t;

typedef struct {
	ivt_header_t header;
	write_dcd_command_t write_dcd_command;
	dcd_addr_data_t addr_data[MAX_HW_CFG_SIZE_V2];
} dcd_v2_t;

typedef struct {
	uint32_t start;
	uint32_t size;
	uint32_t plugin;
} boot_data_t;

typedef struct {
	ivt_header_t header;
	uint32_t entry;
	uint32_t reserved1;
	uint32_t dcd_ptr;
	uint32_t boot_data_ptr;
	uint32_t self;
	uint32_t csf;
	uint32_t reserved2;
} flash_header_v2_t;

typedef struct {
	flash_header_v2_t fhdr;
	boot_data_t boot_data;
	dcd_v2_t dcd_table;
} imx_header_v2_t;

struct imx_header {
	union {
		imx_header_v1_t hdr_v1;
		imx_header_v2_t hdr_v2;
	} header;
	uint32_t flash_offset;
};

typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,
					char *name, int lineno,
					int fld, uint32_t value,
					uint32_t off);

typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr,
					uint32_t dcd_len,
					char *name, int lineno);

typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len,
		uint32_t entry_point, uint32_t flash_offset);

#endif /* _IMXIMAGE_H_ */
Commit	Line	Data
8edcde5e SB	1	/*
	2	* (C) Copyright 2009
	3	* Stefano Babic, DENX Software Engineering, sbabic@denx.de.
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	#ifndef _IMXIMAGE_H_
	25	#define _IMXIMAGE_H_
	26
8a1edd7d LHR	27	#define MAX_HW_CFG_SIZE_V2 121 /* Max number of registers imx can set for v2 */
8a1edd7d LHR	28	#define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */
8edcde5e SB	29	#define APP_CODE_BARKER 0xB1
8edcde5e SB	30	#define DCD_BARKER 0xB17219E9
8edcde5e	31
8a1edd7d	32	#define HEADER_OFFSET 0x400
8edcde5e SB	33
8edcde5e SB	34	#define CMD_DATA_STR "DATA"
49d3e272	35	#define FLASH_OFFSET_UNDEFINED 0xFFFFFFFF
8edcde5e SB	36	#define FLASH_OFFSET_STANDARD 0x400
	37	#define FLASH_OFFSET_NAND FLASH_OFFSET_STANDARD
	38	#define FLASH_OFFSET_SD FLASH_OFFSET_STANDARD
	39	#define FLASH_OFFSET_SPI FLASH_OFFSET_STANDARD
	40	#define FLASH_OFFSET_ONENAND 0x100
19b409c0 DB	41	#define FLASH_OFFSET_NOR 0x1000
19b409c0 DB	42	#define FLASH_OFFSET_SATA FLASH_OFFSET_STANDARD
8edcde5e	43
8a1edd7d LHR	44	#define IVT_HEADER_TAG 0xD1
	45	#define IVT_VERSION 0x40
	46	#define DCD_HEADER_TAG 0xD2
	47	#define DCD_COMMAND_TAG 0xCC
	48	#define DCD_VERSION 0x40
	49	#define DCD_COMMAND_PARAM 0x4
	50
8edcde5e SB	51	enum imximage_cmd {
8edcde5e SB	52	CMD_INVALID,
8a1edd7d	53	CMD_IMAGE_VERSION,
8edcde5e SB	54	CMD_BOOT_FROM,
	55	CMD_DATA
	56	};
	57
	58	enum imximage_fld_types {
	59	CFG_INVALID = -1,
	60	CFG_COMMAND,
	61	CFG_REG_SIZE,
	62	CFG_REG_ADDRESS,
	63	CFG_REG_VALUE
	64	};
	65
8a1edd7d LHR	66	enum imximage_version {
	67	IMXIMAGE_VER_INVALID = -1,
	68	IMXIMAGE_V1 = 1,
	69	IMXIMAGE_V2
	70	};
8edcde5e SB	71
	72	typedef struct {
	73	uint32_t type; /* Type of pointer (byte, halfword, word, wait/read) */
	74	uint32_t addr; /* Address to write to */
	75	uint32_t value; /* Data to write */
	76	} dcd_type_addr_data_t;
	77
	78	typedef struct {
	79	uint32_t barker; /* Barker for sanity check */
	80	uint32_t length; /* Device configuration length (without preamble) */
	81	} dcd_preamble_t;
	82
	83	typedef struct {
	84	dcd_preamble_t preamble;
8a1edd7d LHR	85	dcd_type_addr_data_t addr_data[MAX_HW_CFG_SIZE_V1];
8a1edd7d LHR	86	} dcd_v1_t;
8edcde5e SB	87
	88	typedef struct {
	89	uint32_t app_code_jump_vector;
	90	uint32_t app_code_barker;
	91	uint32_t app_code_csf;
	92	uint32_t dcd_ptr_ptr;
5b28e913	93	uint32_t super_root_key;
8edcde5e SB	94	uint32_t dcd_ptr;
8edcde5e SB	95	uint32_t app_dest_ptr;
8a1edd7d	96	} flash_header_v1_t;
8edcde5e SB	97
	98	typedef struct {
	99	uint32_t length; /* Length of data to be read from flash */
	100	} flash_cfg_parms_t;
	101
8a1edd7d LHR	102	typedef struct {
	103	flash_header_v1_t fhdr;
	104	dcd_v1_t dcd_table;
8edcde5e	105	flash_cfg_parms_t ext_header;
8a1edd7d LHR	106	} imx_header_v1_t;
	107
	108	typedef struct {
	109	uint32_t addr;
	110	uint32_t value;
	111	} dcd_addr_data_t;
	112
	113	typedef struct {
	114	uint8_t tag;
	115	uint16_t length;
	116	uint8_t version;
	117	} __attribute__((packed)) ivt_header_t;
	118
	119	typedef struct {
	120	uint8_t tag;
	121	uint16_t length;
	122	uint8_t param;
	123	} __attribute__((packed)) write_dcd_command_t;
	124
	125	typedef struct {
	126	ivt_header_t header;
	127	write_dcd_command_t write_dcd_command;
	128	dcd_addr_data_t addr_data[MAX_HW_CFG_SIZE_V2];
	129	} dcd_v2_t;
	130
	131	typedef struct {
	132	uint32_t start;
	133	uint32_t size;
	134	uint32_t plugin;
	135	} boot_data_t;
	136
	137	typedef struct {
	138	ivt_header_t header;
	139	uint32_t entry;
	140	uint32_t reserved1;
	141	uint32_t dcd_ptr;
	142	uint32_t boot_data_ptr;
	143	uint32_t self;
	144	uint32_t csf;
	145	uint32_t reserved2;
	146	} flash_header_v2_t;
	147
	148	typedef struct {
	149	flash_header_v2_t fhdr;
	150	boot_data_t boot_data;
	151	dcd_v2_t dcd_table;
	152	} imx_header_v2_t;
	153
	154	struct imx_header {
	155	union {
	156	imx_header_v1_t hdr_v1;
	157	imx_header_v2_t hdr_v2;
	158	} header;
8edcde5e SB	159	uint32_t flash_offset;
	160	};
	161
8a1edd7d LHR	162	typedef void (set_dcd_val_t)(struct imx_header imxhdr,
	163	char *name, int lineno,
	164	int fld, uint32_t value,
	165	uint32_t off);
	166
	167	typedef void (set_dcd_rst_t)(struct imx_header imxhdr,
	168	uint32_t dcd_len,
	169	char *name, int lineno);
	170
ad0826dc TK	171	typedef void (set_imx_hdr_t)(struct imx_header imxhdr, uint32_t dcd_len,
ad0826dc TK	172	uint32_t entry_point, uint32_t flash_offset);
8edcde5e SB	173
8edcde5e SB	174	#endif /* _IMXIMAGE_H_ */